Index: uspace/drv/bus/usb/xhci/commands.c
===================================================================
--- uspace/drv/bus/usb/xhci/commands.c	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/commands.c	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -244,6 +244,7 @@
 	cr_set_state(cr, XHCI_CR_STATE_CLOSED);
 
+	/* Some systems, inc. QEMU, need whole 64-bit qword to be written */
 	XHCI_REG_SET(hc->op_regs, XHCI_OP_CS, 1);
-	XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0); // Some systems (incl. QEMU) require 64-bit write
+	XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0);
 
 	while (XHCI_REG_RD(hc->op_regs, XHCI_OP_CRR))
@@ -259,6 +260,7 @@
 static void abort_command_ring(xhci_hc_t *hc)
 {
-	XHCI_REG_WR(hc->op_regs, XHCI_OP_CA, 1);
-	XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0); // Some systems (incl. QEMU) require 64-bit write
+	/* Some systems, inc. QEMU, need whole 64-bit qword to be written */
+	XHCI_REG_SET(hc->op_regs, XHCI_OP_CA, 1);
+	XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0);
 }
 
@@ -370,5 +372,6 @@
 	command->slot_id = TRB_GET_SLOT(*trb);
 
-	usb_log_debug("Completed command %s", xhci_trb_str_type(TRB_TYPE(command->_header.trb)));
+	usb_log_debug("Completed command %s",
+	    xhci_trb_str_type(TRB_TYPE(command->_header.trb)));
 
 	if (code != XHCI_TRBC_SUCCESS) {
@@ -412,5 +415,6 @@
 
 	TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_ENABLE_SLOT_CMD);
-	cmd->_header.trb.control |= host2xhci(32, XHCI_REG_RD(hc->xecp, XHCI_EC_SP_SLOT_TYPE) << 16);
+	cmd->_header.trb.control |=
+	    host2xhci(32, XHCI_REG_RD(hc->xecp, XHCI_EC_SP_SLOT_TYPE) << 16);
 
 	return enqueue_command(hc, cmd);
@@ -683,5 +687,6 @@
 	while (!cmd->_header.completed) {
 
-		rv = fibril_condvar_wait_timeout(&cmd->_header.completed_cv, &cmd->_header.completed_mtx, XHCI_COMMAND_TIMEOUT);
+		rv = fibril_condvar_wait_timeout(&cmd->_header.completed_cv,
+		    &cmd->_header.completed_mtx, XHCI_COMMAND_TIMEOUT);
 
 		/* The waiting timed out. Current command (not necessarily
Index: uspace/drv/bus/usb/xhci/debug.c
===================================================================
--- uspace/drv/bus/usb/xhci/debug.c	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/debug.c	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -264,5 +264,7 @@
 void xhci_dump_trb(const xhci_trb_t *trb)
 {
-	usb_log_debug("TRB(%p): type %s, cycle %u, status 0x%#08" PRIx32 ", parameter 0x%#016" PRIx64, trb, xhci_trb_str_type(TRB_TYPE(*trb)), TRB_CYCLE(*trb), trb->status, trb->parameter);
+	usb_log_debug("TRB(%p): type %s, cycle %u, status 0x%#08" PRIx32 ", "
+	    "parameter 0x%#016" PRIx64, trb, xhci_trb_str_type(TRB_TYPE(*trb)),
+	    TRB_CYCLE(*trb), trb->status, trb->parameter);
 }
 
@@ -330,5 +332,6 @@
 			unsigned psic = XHCI_REG_RD(ec, XHCI_EC_SP_PSIC);
 
-			usb_log_debug("\tProtocol %.4s%u.%u, ports %u-%u, %u protocol speeds", name.str,
+			usb_log_debug("\tProtocol %.4s%u.%u, ports %u-%u, "
+			    "%u protocol speeds", name.str,
 			    XHCI_REG_RD(ec, XHCI_EC_SP_MAJOR),
 			    XHCI_REG_RD(ec, XHCI_EC_SP_MINOR),
Index: uspace/drv/bus/usb/xhci/device.c
===================================================================
--- uspace/drv/bus/usb/xhci/device.c	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/device.c	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -56,5 +56,8 @@
 #include "device.h"
 
-/** Initial descriptor used for control endpoint 0 before more configuration is retrieved. */
+/**
+ * Initial descriptor used for control endpoint 0,
+ * before more configuration is retrieved.
+ */
 static const usb_endpoint_descriptors_t ep0_initial_desc = {
 	.endpoint.max_packet_size = CTRL_PIPE_MIN_PACKET_SIZE,
@@ -87,5 +90,6 @@
 	dev->base.endpoints[0] = ep0_base;
 
-	usb_log_debug("Looking up new device initial MPS: %s", usb_str_speed(dev->base.speed));
+	usb_log_debug("Looking up new device initial MPS: %s",
+	    usb_str_speed(dev->base.speed));
 	ep0_base->max_packet_size = hc_get_ep0_initial_mps(dev->base.speed);
 
@@ -117,5 +121,6 @@
 
 	uint16_t max_packet_size;
-	if ((err = hc_get_ep0_max_packet_size(&max_packet_size, (bus_t *) &hc->bus, &dev->base)))
+	if ((err = hc_get_ep0_max_packet_size(&max_packet_size,
+	    (bus_t *) &hc->bus, &dev->base)))
 		return err;
 
@@ -160,5 +165,6 @@
 	}
 
-	usb_log_debug("Device(%u): recognised USB hub with %u ports", dev->base.address, dev->num_ports);
+	usb_log_debug("Device(%u): recognised USB hub with %u ports",
+	    dev->base.address, dev->num_ports);
 	return EOK;
 }
@@ -197,5 +203,6 @@
 
 	if (err) {
-		usb_log_error("Failed to setup address of the new device: %s", str_error(err));
+		usb_log_error("Failed to setup address of the new device: %s",
+		    str_error(err));
 		return err;
 	}
@@ -208,5 +215,6 @@
 
 	if ((err = setup_ep0_packet_size(bus->hc, xhci_dev))) {
-		usb_log_error("Failed to setup control endpoint of the new device: %s", str_error(err));
+		usb_log_error("Failed to setup control endpoint "
+		    "of the new device: %s", str_error(err));
 		goto err_address;
 	}
@@ -215,14 +223,17 @@
 
 	if ((err = hc_get_device_desc(dev, &desc))) {
-		usb_log_error("Device(%d): failed to get devices descriptor: %s", dev->address, str_error(err));
+		usb_log_error("Device(%d): failed to get device "
+		   "descriptor: %s", dev->address, str_error(err));
 		goto err_address;
 	}
 
 	if ((err = setup_hub(xhci_dev, &desc)))
-		usb_log_warning("Device(%d): failed to setup hub characteristics: %s. "
-		    " Continuing anyway.", dev->address, str_error(err));
+		usb_log_warning("Device(%d): failed to setup hub "
+		    "characteristics: %s.  Continuing anyway.",
+		    dev->address, str_error(err));
 
 	if ((err = hcd_ddf_setup_match_ids(dev, &desc))) {
-		usb_log_error("Device(%d): failed to setup match IDs: %s", dev->address, str_error(err));
+		usb_log_error("Device(%d): failed to setup match IDs: %s",
+		    dev->address, str_error(err));
 		goto err_address;
 	}
@@ -253,6 +264,6 @@
 	const uint32_t slot_id = xhci_dev->slot_id;
 	if ((err = hc_disable_slot(xhci_dev))) {
-		usb_log_warning("Failed to disable slot of device " XHCI_DEV_FMT ": %s",
-		    XHCI_DEV_ARGS(*xhci_dev), str_error(err));
+		usb_log_warning("Failed to disable slot of device " XHCI_DEV_FMT
+		    ": %s", XHCI_DEV_ARGS(*xhci_dev), str_error(err));
 	}
 
@@ -277,5 +288,6 @@
 	/* Transition the device from the Addressed to the Configured state. */
 	if ((err = hc_configure_device(dev))) {
-		usb_log_warning("Failed to configure device " XHCI_DEV_FMT ".", XHCI_DEV_ARGS(*dev));
+		usb_log_warning("Failed to configure device " XHCI_DEV_FMT ".",
+		    XHCI_DEV_ARGS(*dev));
 		return err;
 	}
@@ -302,6 +314,6 @@
 	/* Issue one HC command to simultaneously drop all endpoints except zero. */
 	if ((err = hc_deconfigure_device(dev))) {
-		usb_log_warning("Failed to deconfigure device " XHCI_DEV_FMT ".",
-		    XHCI_DEV_ARGS(*dev));
+		usb_log_warning("Failed to deconfigure device "
+		    XHCI_DEV_FMT ".", XHCI_DEV_ARGS(*dev));
 	}
 }
@@ -339,5 +351,9 @@
 	}
 
-	// As we always allocate space for whole input context, we can set this to maximum
+	/*
+	 * As we always allocate space for whole input context, we can set this
+	 * to maximum. The only exception being Address Device command, which
+	 * explicitly requires this to be se to 1.
+	 */
 	XHCI_SLOT_CTX_ENTRIES_SET(*ctx, 31);
 }
Index: uspace/drv/bus/usb/xhci/endpoint.c
===================================================================
--- uspace/drv/bus/usb/xhci/endpoint.c	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/endpoint.c	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -58,5 +58,6 @@
  * @return Error code.
  */
-static int xhci_endpoint_init(xhci_endpoint_t *xhci_ep, device_t *dev, const usb_endpoint_descriptors_t *desc)
+static int xhci_endpoint_init(xhci_endpoint_t *xhci_ep, device_t *dev,
+    const usb_endpoint_descriptors_t *desc)
 {
 	int rc;
@@ -79,5 +80,6 @@
 		xhci_ep->mult = 1;
 
-	/* In USB 3, the semantics of wMaxPacketSize changed. Now the number of
+	/*
+	 * In USB 3, the semantics of wMaxPacketSize changed. Now the number of
 	 * packets per service interval is determined from max_burst and mult.
 	 */
@@ -93,5 +95,6 @@
 	 * others have 2-based log of it.
 	 */
-	if (dev->speed >= USB_SPEED_HIGH || ep->transfer_type != USB_TRANSFER_INTERRUPT) {
+	if (dev->speed >= USB_SPEED_HIGH
+	    || ep->transfer_type != USB_TRANSFER_INTERRUPT) {
 		xhci_ep->interval = 1 << (xhci_ep->interval - 1);
 	}
@@ -119,5 +122,6 @@
  * Bus callback.
  */
-endpoint_t *xhci_endpoint_create(device_t *dev, const usb_endpoint_descriptors_t *desc)
+endpoint_t *xhci_endpoint_create(device_t *dev,
+    const usb_endpoint_descriptors_t *desc)
 {
 	const usb_transfer_type_t type = USB_ED_GET_TRANSFER_TYPE(desc->endpoint);
@@ -193,6 +197,7 @@
 			const int err = hc_stop_endpoint(xhci_ep);
 			if (err) {
-				usb_log_warning("Failed to stop endpoint %u of device " XHCI_DEV_FMT ": %s",
-				    ep->endpoint, XHCI_DEV_ARGS(*dev), str_error(err));
+				usb_log_warning("Failed to stop endpoint %u of device "
+				    XHCI_DEV_FMT ": %s", ep->endpoint, XHCI_DEV_ARGS(*dev),
+				    str_error(err));
 			}
 
@@ -233,5 +238,6 @@
 
 		if ((err = hc_drop_endpoint(ep))) {
-			usb_log_error("Failed to drop endpoint " XHCI_EP_FMT ": %s", XHCI_EP_ARGS(*ep), str_error(err));
+			usb_log_error("Failed to drop endpoint " XHCI_EP_FMT ": %s",
+			    XHCI_EP_ARGS(*ep), str_error(err));
 		}
 	} else {
@@ -271,5 +277,6 @@
 }
 
-/** Allocate transfer data structures for XHCI endpoint not using streams.
+/**
+ * Allocate transfer data structures for XHCI endpoint not using streams.
  * @param[in] xhci_ep XHCI endpoint to allocate data structures for.
  *
@@ -279,5 +286,6 @@
 {
 	/* Can't use XHCI_EP_FMT because the endpoint may not have device. */
-	usb_log_debug("Allocating main transfer ring for endpoint " XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));
+	usb_log_debug("Allocating main transfer ring for endpoint " XHCI_EP_FMT,
+	    XHCI_EP_ARGS(*xhci_ep));
 
 	xhci_ep->primary_stream_data_array = NULL;
@@ -299,5 +307,6 @@
 }
 
-/** Free transfer data structures for XHCI endpoint.
+/**
+ * Free transfer data structures for XHCI endpoint.
  * @param[in] xhci_ep XHCI endpoint to free data structures for.
  */
@@ -307,5 +316,6 @@
 		xhci_stream_free_ds(xhci_ep);
 	} else {
-		usb_log_debug("Freeing main transfer ring of endpoint " XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));
+		usb_log_debug("Freeing main transfer ring of endpoint " XHCI_EP_FMT,
+		    XHCI_EP_ARGS(*xhci_ep));
 		xhci_trb_ring_fini(&xhci_ep->ring);
 	}
@@ -329,5 +339,6 @@
 }
 
-/** Configure endpoint context of a control endpoint.
+/**
+ * Configure endpoint context of a control endpoint.
  * @param[in] ep XHCI control endpoint.
  * @param[in] ctx Endpoint context to configure.
@@ -344,5 +355,6 @@
 }
 
-/** Configure endpoint context of a bulk endpoint.
+/**
+ * Configure endpoint context of a bulk endpoint.
  * @param[in] ep XHCI bulk endpoint.
  * @param[in] ctx Endpoint context to configure.
@@ -360,5 +372,6 @@
 }
 
-/** Configure endpoint context of a isochronous endpoint.
+/**
+ * Configure endpoint context of a isochronous endpoint.
  * @param[in] ep XHCI isochronous endpoint.
  * @param[in] ctx Endpoint context to configure.
@@ -379,5 +392,6 @@
 }
 
-/** Configure endpoint context of a interrupt endpoint.
+/**
+ * Configure endpoint context of a interrupt endpoint.
  * @param[in] ep XHCI interrupt endpoint.
  * @param[in] ctx Endpoint context to configure.
@@ -399,5 +413,8 @@
 typedef void (*setup_ep_ctx_helper)(xhci_endpoint_t *, xhci_ep_ctx_t *);
 
-/** Static array, which maps USB endpoint types to their respective endpoint context configuration functions. */
+/**
+ * Static array, which maps USB endpoint types to their respective endpoint
+ * context configuration functions.
+ */
 static const setup_ep_ctx_helper setup_ep_ctx_helpers[] = {
 	[USB_TRANSFER_CONTROL] = setup_control_ep_ctx,
Index: uspace/drv/bus/usb/xhci/hc.c
===================================================================
--- uspace/drv/bus/usb/xhci/hc.c	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/hc.c	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -139,12 +139,12 @@
 
 					/*
-					 * Speed is not implied, but using one of default PSIV. This is
-					 * not clearly stated in xHCI spec. There is a clear intention
-					 * to allow xHCI to specify its own speed parameters, but
-					 * throughout the document, they used fixed values for e.g.
-					 * High-speed (3), without stating the controller shall have
-					 * implied default speeds - and for instance Intel controllers
-					 * do not. So let's check if the values match and if so, accept
-					 * the implied USB speed too.
+					 * Speed is not implied, but using one of default PSIV. This
+					 * is not clearly stated in xHCI spec. There is a clear
+					 * intention to allow xHCI to specify its own speed
+					 * parameters, but throughout the document, they used fixed
+					 * values for e.g. High-speed (3), without stating the
+					 * controller shall have implied default speeds - and for
+					 * instance Intel controllers do not. So let's check if the
+					 * values match and if so, accept the implied USB speed too.
 					 *
 					 * The main reason we need this is the usb_speed to have
@@ -157,5 +157,6 @@
 					   && default_psiv_to_port_speed[psiv].tx_bps == bps) {
 						speeds[psiv] = default_psiv_to_port_speed[psiv];
-						usb_log_debug("Assumed default %s speed of USB %u.", usb_str_speed(speeds[psiv].usb_speed), major);
+						usb_log_debug("Assumed default %s speed of USB %u.",
+							usb_str_speed(speeds[psiv].usb_speed), major);
 						continue;
 					}
@@ -171,5 +172,7 @@
 					if (sim == XHCI_PSI_PLT_SYMM || sim == XHCI_PSI_PLT_TX) {
 						speeds[psiv].tx_bps = bps;
-						usb_log_debug("Speed %u set up for bps %" PRIu64 " / %" PRIu64 ".", psiv, speeds[psiv].rx_bps, speeds[psiv].tx_bps);
+						usb_log_debug("Speed %u set up for bps %" PRIu64
+							" / %" PRIu64 ".", psiv, speeds[psiv].rx_bps,
+							speeds[psiv].tx_bps);
 					}
 				}
@@ -395,6 +398,11 @@
 	memcpy(code->cmds, irq_commands, sizeof(irq_commands));
 
-	void *intr0_iman = RNGABSPTR(hc->mmio_range) + XHCI_REG_RD(hc->cap_regs, XHCI_CAP_RTSOFF) + offsetof(xhci_rt_regs_t, ir[0]);
-	void *usbsts = RNGABSPTR(hc->mmio_range) + XHCI_REG_RD(hc->cap_regs, XHCI_CAP_LENGTH) + offsetof(xhci_op_regs_t, usbsts);
+	void *intr0_iman = RNGABSPTR(hc->mmio_range)
+	    + XHCI_REG_RD(hc->cap_regs, XHCI_CAP_RTSOFF)
+	    + offsetof(xhci_rt_regs_t, ir[0]);
+	void *usbsts = RNGABSPTR(hc->mmio_range)
+	    + XHCI_REG_RD(hc->cap_regs, XHCI_CAP_LENGTH)
+	    + offsetof(xhci_op_regs_t, usbsts);
+
 	code->cmds[0].addr = intr0_iman;
 	code->cmds[1].value = host2xhci(32, 1);
@@ -447,5 +455,6 @@
 
 	/* Wait until the HC is halted - it shall take at most 16 ms */
-	if (xhci_reg_wait(&hc->op_regs->usbsts, XHCI_REG_MASK(XHCI_OP_HCH), XHCI_REG_MASK(XHCI_OP_HCH)))
+	if (xhci_reg_wait(&hc->op_regs->usbsts, XHCI_REG_MASK(XHCI_OP_HCH),
+	    XHCI_REG_MASK(XHCI_OP_HCH)))
 		return ETIMEOUT;
 
@@ -533,5 +542,6 @@
 	struct timeval tv;
 	getuptime(&tv);
-	usb_log_debug("Microframe index wrapped (@%lu.%li, %"PRIu64" total).", tv.tv_sec, tv.tv_usec, hc->wrap_count);
+	usb_log_debug("Microframe index wrapped (@%lu.%li, %"PRIu64" total).",
+	    tv.tv_sec, tv.tv_usec, hc->wrap_count);
 	hc->wrap_time = ((uint64_t) tv.tv_sec) * 1000000 + ((uint64_t) tv.tv_usec);
 	++hc->wrap_count;
@@ -596,5 +606,6 @@
 	fibril_mutex_lock(&hc->event_fibril_completion.guard);
 	hc->event_fibril_completion.active = false;
-	fibril_condvar_wait(&hc->event_fibril_completion.cv, &hc->event_fibril_completion.guard);
+	fibril_condvar_wait(&hc->event_fibril_completion.cv,
+	    &hc->event_fibril_completion.guard);
 	fibril_mutex_unlock(&hc->event_fibril_completion.guard);
 
@@ -612,5 +623,6 @@
  * IPC notification will create new event handling fibril for us.
  */
-static void hc_run_event_ring(xhci_hc_t *hc, xhci_event_ring_t *event_ring, xhci_interrupter_regs_t *intr)
+static void hc_run_event_ring(xhci_hc_t *hc, xhci_event_ring_t *event_ring,
+    xhci_interrupter_regs_t *intr)
 {
 	int err;
@@ -666,5 +678,6 @@
 
 	if (status & XHCI_REG_MASK(XHCI_OP_SRE)) {
-		usb_log_error("Save/Restore error occured. WTF, S/R mechanism not implemented!");
+		usb_log_error("Save/Restore error occured. WTF, "
+		    "S/R mechanism not implemented!");
 		status &= ~XHCI_REG_MASK(XHCI_OP_SRE);
 	}
@@ -674,5 +687,6 @@
 
 	if (status) {
-		usb_log_error("Non-zero status after interrupt handling (%08x) - missing something?", status);
+		usb_log_error("Non-zero status after interrupt handling (%08x) "
+			" - missing something?", status);
 	}
 }
@@ -688,5 +702,6 @@
 	fibril_mutex_lock(&hc->event_fibril_completion.guard);
 	while (hc->event_fibril_completion.active)
-		fibril_condvar_wait(&hc->event_fibril_completion.cv, &hc->event_fibril_completion.guard);
+		fibril_condvar_wait(&hc->event_fibril_completion.cv,
+		    &hc->event_fibril_completion.guard);
 	fibril_mutex_unlock(&hc->event_fibril_completion.guard);
 	xhci_sw_ring_fini(&hc->sw_ring);
@@ -830,5 +845,6 @@
 	 * we have to rely on reverse mapping on others. */
 	if (!usb_speed_to_psiv[dev->base.speed]) {
-		usb_log_error("Device reported an USB speed (%s) that cannot be mapped to HC port speed.", usb_str_speed(dev->base.speed));
+		usb_log_error("Device reported an USB speed (%s) that cannot be mapped "
+		    "to HC port speed.", usb_str_speed(dev->base.speed));
 		return EINVAL;
 	}
@@ -850,5 +866,8 @@
 
 	/* Issue Address Device command. */
-	if ((err = xhci_cmd_sync_inline(hc, ADDRESS_DEVICE, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf)))
+	if ((err = xhci_cmd_sync_inline(hc, ADDRESS_DEVICE,
+		.slot_id = dev->slot_id,
+		.input_ctx = ictx_dma_buf
+	    )))
 		return err;
 
@@ -875,5 +894,8 @@
 		return err;
 
-	return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf);
+	return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT,
+		.slot_id = dev->slot_id,
+		.input_ctx = ictx_dma_buf
+	);
 }
 
@@ -888,5 +910,8 @@
 
 	/* Issue configure endpoint command (sec 4.3.5) with the DC flag. */
-	return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = dev->slot_id, .deconfigure = true);
+	return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT,
+		.slot_id = dev->slot_id,
+		.deconfigure = true
+	);
 }
 
@@ -917,5 +942,8 @@
 	xhci_setup_endpoint_context(ep, ep_ctx);
 
-	return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf);
+	return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT,
+		.slot_id = dev->slot_id,
+		.input_ctx = ictx_dma_buf
+	);
 }
 
@@ -941,5 +969,8 @@
 	XHCI_INPUT_CTRL_CTX_DROP_SET(*XHCI_GET_CTRL_CTX(ictx, hc), dci);
 
-	return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf);
+	return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT,
+		.slot_id = dev->slot_id,
+		.input_ctx = ictx_dma_buf
+	);
 }
 
@@ -971,5 +1002,8 @@
 	xhci_setup_endpoint_context(ep, ep_ctx);
 
-	return xhci_cmd_sync_inline(hc, EVALUATE_CONTEXT, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf);
+	return xhci_cmd_sync_inline(hc, EVALUATE_CONTEXT,
+		.slot_id = dev->slot_id,
+		.input_ctx = ictx_dma_buf
+	);
 }
 
@@ -985,5 +1019,8 @@
 	const unsigned dci = endpoint_dci(ep);
 	xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
-	return xhci_cmd_sync_inline(hc, STOP_ENDPOINT, .slot_id = dev->slot_id, .endpoint_id = dci);
+	return xhci_cmd_sync_inline(hc, STOP_ENDPOINT,
+		.slot_id = dev->slot_id,
+		.endpoint_id = dci
+	);
 }
 
@@ -999,5 +1036,8 @@
 	const unsigned dci = endpoint_dci(ep);
 	xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
-	return xhci_cmd_sync_inline(hc, RESET_ENDPOINT, .slot_id = dev->slot_id, .endpoint_id = dci);
+	return xhci_cmd_sync_inline(hc, RESET_ENDPOINT,
+		.slot_id = dev->slot_id,
+		.endpoint_id = dci
+	);
 }
 
@@ -1018,9 +1058,9 @@
 	xhci_hc_t * const hc = bus_to_hc(endpoint_get_bus(&ep->base));
 	return xhci_cmd_sync_inline(hc, SET_TR_DEQUEUE_POINTER,
-			    .slot_id = dev->slot_id,
-			    .endpoint_id = dci,
-			    .stream_id = stream_id,
-			    .dequeue_ptr = addr,
-			);
+		.slot_id = dev->slot_id,
+		.endpoint_id = dci,
+		.stream_id = stream_id,
+		.dequeue_ptr = addr,
+	);
 }
 
Index: uspace/drv/bus/usb/xhci/hw_struct/common.h
===================================================================
--- uspace/drv/bus/usb/xhci/hw_struct/common.h	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/hw_struct/common.h	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -59,6 +59,8 @@
 typedef volatile uint64_t xhci_qword_t __attribute__((aligned(8)));
 
-#define XHCI_DWORD_EXTRACT(field, hi, lo) (BIT_RANGE_EXTRACT(uint32_t, hi, lo, xhci2host(32, field)))
-#define XHCI_QWORD_EXTRACT(field, hi, lo) (BIT_RANGE_EXTRACT(uint64_t, hi, lo, xhci2host(64, field)))
+#define XHCI_DWORD_EXTRACT(field, hi, lo) \
+	(BIT_RANGE_EXTRACT(uint32_t, hi, lo, xhci2host(32, field)))
+#define XHCI_QWORD_EXTRACT(field, hi, lo) \
+	(BIT_RANGE_EXTRACT(uint64_t, hi, lo, xhci2host(64, field)))
 
 /**
@@ -67,5 +69,6 @@
  * Not thread-safe, proper synchronization over this dword must be assured.
  */
-static inline void xhci_dword_set_bits(xhci_dword_t *storage, uint32_t value, unsigned hi, unsigned lo)
+static inline void xhci_dword_set_bits(xhci_dword_t *storage, uint32_t value,
+	unsigned hi, unsigned lo)
 {
 	const uint32_t mask = host2xhci(32, BIT_RANGE(uint32_t, hi, lo));
@@ -82,5 +85,6 @@
 }
 
-static inline void xhci_qword_set_bits(xhci_qword_t *storage, uint64_t value, unsigned hi, unsigned lo)
+static inline void xhci_qword_set_bits(xhci_qword_t *storage, uint64_t value,
+	unsigned hi, unsigned lo)
 {
 	const uint64_t mask = host2xhci(64, BIT_RANGE(uint64_t, hi, lo));
@@ -89,5 +93,6 @@
 }
 
-static inline int xhci_reg_wait(xhci_dword_t *reg, uint32_t mask, uint32_t expected)
+static inline int xhci_reg_wait(xhci_dword_t *reg, uint32_t mask,
+	uint32_t expected)
 {
 	mask = host2xhci(32, mask);
Index: uspace/drv/bus/usb/xhci/hw_struct/regs.h
===================================================================
--- uspace/drv/bus/usb/xhci/hw_struct/regs.h	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/hw_struct/regs.h	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -84,8 +84,12 @@
  * Field handling is the easiest. Just do it with whole field.
  */
-#define XHCI_REG_RD_FIELD(ptr, size)         xhci2host(size, pio_read_##size((ptr)))
-#define XHCI_REG_WR_FIELD(ptr, value, size)  pio_write_##size((ptr), host2xhci(size, value))
-#define XHCI_REG_SET_FIELD(ptr, value, size) pio_set_##size((ptr), host2xhci(size, value), XHCI_PIO_CHANGE_UDELAY);
-#define XHCI_REG_CLR_FIELD(ptr, value, size) pio_clear_##size((ptr), host2xhci(size, value), XHCI_PIO_CHANGE_UDELAY);
+#define XHCI_REG_RD_FIELD(ptr, size) \
+	xhci2host(size, pio_read_##size((ptr)))
+#define XHCI_REG_WR_FIELD(ptr, value, size) \
+	pio_write_##size((ptr), host2xhci(size, value))
+#define XHCI_REG_SET_FIELD(ptr, value, size) \
+	pio_set_##size((ptr), host2xhci(size, value), XHCI_PIO_CHANGE_UDELAY);
+#define XHCI_REG_CLR_FIELD(ptr, value, size) \
+	pio_clear_##size((ptr), host2xhci(size, value), XHCI_PIO_CHANGE_UDELAY);
 #define XHCI_REG_MASK_FIELD(size)            (~((uint##size##_t) 0))
 #define XHCI_REG_SHIFT_FIELD(size)           (0)
@@ -94,8 +98,12 @@
  * Flags are just trivial case of ranges.
  */
-#define XHCI_REG_RD_FLAG(ptr, size, offset)         XHCI_REG_RD_RANGE((ptr), size, (offset), (offset))
-#define XHCI_REG_WR_FLAG(ptr, value, size, offset)  XHCI_REG_WR_RANGE((ptr), (value), size, (offset), (offset))
-#define XHCI_REG_SET_FLAG(ptr, value, size, offset) XHCI_REG_SET_RANGE((ptr), (value), size, (offset), (offset))
-#define XHCI_REG_CLR_FLAG(ptr, value, size, offset) XHCI_REG_CLR_RANGE((ptr), (value), size, (offset), (offset))
+#define XHCI_REG_RD_FLAG(ptr, size, offset) \
+	XHCI_REG_RD_RANGE((ptr), size, (offset), (offset))
+#define XHCI_REG_WR_FLAG(ptr, value, size, offset) \
+	XHCI_REG_WR_RANGE((ptr), (value), size, (offset), (offset))
+#define XHCI_REG_SET_FLAG(ptr, value, size, offset) \
+	XHCI_REG_SET_RANGE((ptr), (value), size, (offset), (offset))
+#define XHCI_REG_CLR_FLAG(ptr, value, size, offset) \
+	XHCI_REG_CLR_RANGE((ptr), (value), size, (offset), (offset))
 #define XHCI_REG_MASK_FLAG(size, offset)            BIT_V(uint##size##_t, offset)
 #define XHCI_REG_SHIFT_FLAG(size, offset)           (offset)
@@ -108,14 +116,17 @@
 
 #define XHCI_REG_WR_RANGE(ptr, value, size, hi, lo) \
-	pio_change_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, (hi), (lo), (value))), \
+	pio_change_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, \
+			(hi), (lo), (value))), \
 		host2xhci(size, BIT_RANGE(uint##size##_t, (hi), (lo))), \
 		XHCI_PIO_CHANGE_UDELAY);
 
 #define XHCI_REG_SET_RANGE(ptr, value, size, hi, lo) \
-	pio_set_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, (hi), (lo), (value))), \
+	pio_set_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, \
+			(hi), (lo), (value))), \
 		XHCI_PIO_CHANGE_UDELAY);
 
 #define XHCI_REG_CLR_RANGE(ptr, value, size, hi, lo) \
-	pio_clear_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, (hi), (lo), (value))), \
+	pio_clear_##size((ptr), host2xhci(size, BIT_RANGE_INSERT(uint##size##_t, \
+			(hi), (lo), (value))), \
 		XHCI_PIO_CHANGE_UDELAY);
 
@@ -409,6 +420,8 @@
 #define XHCI_OP_CA             crcr_lo, 32,  FLAG, 2
 #define XHCI_OP_CRR            crcr_lo, 32,  FLAG, 3
-/* This shall be RANGE, 6, 0, but the value containing CR pointer and RCS flag
- * must be written at once. */
+/*
+ * This shall be RANGE, 6, 0, but the value containing CR pointer and RCS flag
+ * must be written at once.
+ */
 #define XHCI_OP_CRCR_LO        crcr_lo, 32, FIELD
 #define XHCI_OP_CRCR_HI        crcr_hi, 32, FIELD
@@ -466,5 +479,4 @@
 #define XHCI_INTR_ERDP_ESI     erdp_lo, 32, RANGE,  2, 0
 #define XHCI_INTR_ERDP_EHB     erdp_lo, 32,  FLAG,  3
-// TODO: ERDP_LO is supposed to be RANGE 31, 4 (section 5.5.2.3.3).
 #define XHCI_INTR_ERDP_LO      erdp_lo, 32, FIELD
 #define XHCI_INTR_ERDP_HI      erdp_hi, 32, FIELD
@@ -532,15 +544,15 @@
 } xhci_extcap_t;
 
-#define XHCI_EC_CAP_ID                           header, 32, RANGE,  7,  0
-#define XHCI_EC_SIZE                             header, 32, RANGE, 15,  8
+#define XHCI_EC_CAP_ID                  header, 32, RANGE,  7,  0
+#define XHCI_EC_SIZE                    header, 32, RANGE, 15,  8
 
 /* Supported protocol */
-#define XHCI_EC_SP_MINOR                         header, 32, RANGE, 23, 16
-#define XHCI_EC_SP_MAJOR                         header, 32, RANGE, 31, 24
-#define XHCI_EC_SP_NAME                 cap_specific[0], 32, FIELD
-#define XHCI_EC_SP_CP_OFF               cap_specific[1], 32, RANGE,  7,  0
-#define XHCI_EC_SP_CP_COUNT             cap_specific[1], 32, RANGE, 15,  8
-#define XHCI_EC_SP_PSIC                 cap_specific[1], 32, RANGE, 31, 28
-#define XHCI_EC_SP_SLOT_TYPE            cap_specific[2], 32, RANGE,  4,  0
+#define XHCI_EC_SP_MINOR                header, 32, RANGE, 23, 16
+#define XHCI_EC_SP_MAJOR                header, 32, RANGE, 31, 24
+#define XHCI_EC_SP_NAME        cap_specific[0], 32, FIELD
+#define XHCI_EC_SP_CP_OFF      cap_specific[1], 32, RANGE,  7,  0
+#define XHCI_EC_SP_CP_COUNT    cap_specific[1], 32, RANGE, 15,  8
+#define XHCI_EC_SP_PSIC        cap_specific[1], 32, RANGE, 31, 28
+#define XHCI_EC_SP_SLOT_TYPE   cap_specific[2], 32, RANGE,  4,  0
 
 typedef union {
@@ -582,5 +594,6 @@
 	ioport8_t sem_os;
 
-	xhci_dword_t usblegctlsts;	/**< USB Legacy Support Control/Status - RW for BIOS, RO for OS */
+	/** USB Legacy Support Control/Status - RW for BIOS, RO for OS */
+	xhci_dword_t usblegctlsts;
 } xhci_legsup_t;
 
@@ -588,6 +601,7 @@
 #define XHCI_LEGSUP_SEM_OS	sem_os, 8, FLAG, 0
 
-#define XHCI_LEGSUP_POLLING_DELAY_1MS	1000
-#define XHCI_LEGSUP_BIOS_TIMEOUT_US	1000000 /* 4.22.1 BIOS may take up to 1 second to release the device */
+/* 4.22.1 BIOS may take up to 1 second to release the device */
+#define XHCI_LEGSUP_BIOS_TIMEOUT_US   1000000
+#define XHCI_LEGSUP_POLLING_DELAY_1MS    1000
 
 #endif
Index: uspace/drv/bus/usb/xhci/hw_struct/trb.h
===================================================================
--- uspace/drv/bus/usb/xhci/hw_struct/trb.h	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/hw_struct/trb.h	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -208,5 +208,6 @@
 } xhci_erst_entry_t;
 
-static inline void xhci_fill_erst_entry(xhci_erst_entry_t *entry, uintptr_t phys, int segments)
+static inline void xhci_fill_erst_entry(xhci_erst_entry_t *entry,
+    uintptr_t phys, int segments)
 {
 	xhci_qword_set(&entry->rs_base_ptr, phys);
Index: uspace/drv/bus/usb/xhci/isoch.c
===================================================================
--- uspace/drv/bus/usb/xhci/isoch.c	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/isoch.c	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -81,5 +81,6 @@
 	fibril_timer_clear_locked(isoch->feeding_timer);
 	isoch->last_mf = -1U;
-	usb_log_info("[isoch] Endpoint" XHCI_EP_FMT ": Data flow reset.", XHCI_EP_ARGS(*ep));
+	usb_log_info("[isoch] Endpoint" XHCI_EP_FMT ": Data flow reset.",
+	    XHCI_EP_ARGS(*ep));
 }
 
@@ -110,5 +111,6 @@
 static void timer_schedule_reset(xhci_endpoint_t *ep) {
 	xhci_isoch_t * const isoch = ep->isoch;
-	const suseconds_t delay = isoch->buffer_count * ep->interval * 125 + RESET_TIMER_DELAY;
+	const suseconds_t delay = isoch->buffer_count * ep->interval * 125
+	    + RESET_TIMER_DELAY;
 
 	fibril_timer_clear_locked(isoch->reset_timer);
@@ -213,9 +215,11 @@
 	const uint32_t reg_mfindex = XHCI_REG_RD(hc->rt_regs, XHCI_RT_MFINDEX);
 	/*
-	 * If the mfindex is low and the time passed since last mfindex wrap
-	 * is too high, we have entered the new epoch already (and haven't received event yet).
+	 * If the mfindex is low and the time passed since last mfindex wrap is too
+	 * high, we have entered the new epoch already (and haven't received event
+	 * yet).
 	 */
 	uint64_t epoch = hc->wrap_count;
-	if (reg_mfindex < EPOCH_LOW_MFINDEX && get_system_time() - hc->wrap_time > EPOCH_DELAY) {
+	if (reg_mfindex < EPOCH_LOW_MFINDEX
+	    && get_system_time() - hc->wrap_time > EPOCH_DELAY) {
 		++epoch;
 	}
@@ -230,5 +234,8 @@
 		const xhci_hc_t *hc = bus->hc;
 
-		/* Delay the first frame by some time to fill the buffer, but at most 10 miliseconds. */
+		/*
+		 * Delay the first frame by some time to fill the buffer, but at most 10
+		 * miliseconds.
+		 */
 		const uint64_t delay = min(isoch->buffer_count * ep->interval, 10 * 8);
 		it->mfindex = get_current_microframe(hc) + 1 + delay + hc->ist;
@@ -262,5 +269,6 @@
  * uframes it's off.
  */
-static inline void window_decide(window_decision_t *res, xhci_hc_t *hc, uint64_t mfindex)
+static inline void window_decide(window_decision_t *res, xhci_hc_t *hc,
+    uint64_t mfindex)
 {
 	const uint64_t current_mf = get_current_microframe(hc);
@@ -333,7 +341,10 @@
 
 		case WINDOW_TOO_LATE:
-			/* Missed the opportunity to schedule. Just mark this transfer as skipped. */
-			usb_log_debug("[isoch] missed feeding buffer %lu at 0x%llx by %llu uframes",
-			    it - isoch->transfers, it->mfindex, wd.offset);
+			/*
+			 * Missed the opportunity to schedule. Just mark this transfer as
+			 * skipped.
+			 */
+			usb_log_debug("[isoch] missed feeding buffer %lu at 0x%llx by "
+				"%llu uframes", it - isoch->transfers, it->mfindex, wd.offset);
 			it->state = ISOCH_COMPLETE;
 			it->error = EOK;
@@ -348,5 +359,8 @@
 	if (fed) {
 		hc_ring_ep_doorbell(ep, 0);
-		/* The ring may be dead. If no event happens until the delay, reset the endpoint. */
+		/*
+		 * The ring may be dead. If no event happens until the delay, reset the
+		 * endpoint.
+		 */
 		timer_schedule_reset(ep);
 	}
@@ -405,6 +419,6 @@
 
 		case WINDOW_TOO_LATE:
-			usb_log_debug("[isoch] missed feeding buffer %lu at 0x%llx by %llu uframes",
-			    it - isoch->transfers, it->mfindex, wd.offset);
+			usb_log_debug("[isoch] missed feeding buffer %lu at 0x%llx by"
+				"%llu uframes", it - isoch->transfers, it->mfindex, wd.offset);
 			/* Missed the opportunity to schedule. Schedule ASAP. */
 			it->mfindex += wd.offset;
@@ -435,5 +449,8 @@
 	if (fed) {
 		hc_ring_ep_doorbell(ep, 0);
-		/* The ring may be dead. If no event happens until the delay, reset the endpoint. */
+		/*
+		 * The ring may be dead. If no event happens until the delay, reset the
+		 * endpoint.
+		 */
 		timer_schedule_reset(ep);
 	}
@@ -502,5 +519,6 @@
 	calc_next_mfindex(ep, it);
 	isoch->last_mf = it->mfindex;
-	usb_log_debug("[isoch] buffer %zu will be on schedule at 0x%llx", it - isoch->transfers, it->mfindex);
+	usb_log_debug("[isoch] buffer %zu will be on schedule at 0x%llx",
+	    it - isoch->transfers, it->mfindex);
 
 	/* Prepare the transfer. */
@@ -543,5 +561,6 @@
 		isoch_feed_in(ep);
 
-		usb_log_debug("[isoch] waiting for buffer %zu to be completed", it - isoch->transfers);
+		usb_log_debug("[isoch] waiting for buffer %zu to be completed",
+		    it - isoch->transfers);
 		fibril_condvar_wait(&isoch->avail, &isoch->guard);
 
@@ -568,5 +587,6 @@
 }
 
-void isoch_handle_transfer_event(xhci_hc_t *hc, xhci_endpoint_t *ep, xhci_trb_t *trb)
+void isoch_handle_transfer_event(xhci_hc_t *hc, xhci_endpoint_t *ep,
+    xhci_trb_t *trb)
 {
 	assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS);
@@ -581,6 +601,9 @@
 		case XHCI_TRBC_RING_OVERRUN:
 		case XHCI_TRBC_RING_UNDERRUN:
-			/* For OUT, there was nothing to process */
-			/* For IN, the buffer has overfilled, we empty the buffers and readd TRBs */
+			/*
+			 * For OUT, there was nothing to process.
+			 * For IN, the buffer has overfilled.
+			 * In either case, reset the ring.
+			 */
 			usb_log_warning("Ring over/underrun.");
 			isoch_reset_no_timer(ep);
Index: uspace/drv/bus/usb/xhci/rh.c
===================================================================
--- uspace/drv/bus/usb/xhci/rh.c	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/rh.c	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -155,5 +155,6 @@
 		return ENOENT;
 
-	unsigned psiv = (status & XHCI_REG_MASK(XHCI_PORT_PS)) >> XHCI_REG_SHIFT(XHCI_PORT_PS);
+	unsigned psiv = (status & XHCI_REG_MASK(XHCI_PORT_PS))
+	    >> XHCI_REG_SHIFT(XHCI_PORT_PS);
 	const usb_speed_t speed = port->rh->hc->speeds[psiv].usb_speed;
 
@@ -171,5 +172,6 @@
 	port->device->rh_port = dev->port;
 
-	usb_log_debug("Enumerating new %s-speed device on port %u.", usb_str_speed(dev->speed), dev->port);
+	usb_log_debug("Enumerating new %s-speed device on port %u.",
+	    usb_str_speed(dev->speed), dev->port);
 
 	if ((err = bus_device_enumerate(dev))) {
@@ -229,5 +231,6 @@
 		 * standard mechanisms of register handling fails here.
 		 */
-		XHCI_REG_WR_FIELD(&port->regs->portsc, status & ~XHCI_REG_MASK(XHCI_PORT_PED), 32);
+		XHCI_REG_WR_FIELD(&port->regs->portsc,
+		    status & ~XHCI_REG_MASK(XHCI_PORT_PED), 32);
 
 		const bool connected = !!(status & XHCI_REG_MASK(XHCI_PORT_CCS));
@@ -264,5 +267,6 @@
 }
 
-void xhci_rh_set_ports_protocol(xhci_rh_t *rh, unsigned offset, unsigned count, unsigned major)
+void xhci_rh_set_ports_protocol(xhci_rh_t *rh,
+    unsigned offset, unsigned count, unsigned major)
 {
 	for (unsigned i = offset; i < offset + count; i++)
@@ -285,5 +289,6 @@
 		 * such ports.
 		 */
-		if (XHCI_REG_RD(port->regs, XHCI_PORT_CCS) && port->base.state == PORT_DISABLED)
+		if (XHCI_REG_RD(port->regs, XHCI_PORT_CCS)
+		    && port->base.state == PORT_DISABLED)
 			usb_port_connected(&port->base, &rh_enumerate_device);
 	}
Index: uspace/drv/bus/usb/xhci/streams.c
===================================================================
--- uspace/drv/bus/usb/xhci/streams.c	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/streams.c	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -39,5 +39,6 @@
 #include "streams.h"
 
-/** Finds stream data with given stream ID if it exists.
+/**
+ * Finds stream data with given stream ID if it exists.
  * Note that streams with ID 0, 65534 and 65535 are reserved.
  * Splits the ID into primary and secondary context ID and searches the structures.
@@ -52,6 +53,8 @@
 
 	/* See 4.12.2.1 for the calculation of the IDs and dividing the stream_id */
-	uint32_t primary_stream_id = (uint32_t) (stream_id & (ep->primary_stream_data_size - 1));
-	uint32_t secondary_stream_id = (uint32_t) ((stream_id / ep->primary_stream_data_size) & 0xFF);
+	uint32_t primary_stream_id =
+	    (uint32_t) (stream_id & (ep->primary_stream_data_size - 1));
+	uint32_t secondary_stream_id =
+	    (uint32_t) ((stream_id / ep->primary_stream_data_size) & 0xFF);
 
 	if (primary_stream_id >= ep->primary_stream_data_size) {
@@ -59,5 +62,6 @@
 	}
 
-	xhci_stream_data_t *primary_data = &ep->primary_stream_data_array[primary_stream_id];
+	xhci_stream_data_t *primary_data =
+	    &ep->primary_stream_data_array[primary_stream_id];
 	if (secondary_stream_id != 0 && !primary_data->secondary_size) {
 		return NULL;
@@ -76,5 +80,6 @@
 }
 
-/** Initializes primary stream data structures in endpoint.
+/**
+ * Initializes primary stream data structures in endpoint.
  * @param[in] xhci_ep Used XHCI bulk endpoint.
  * @param[in] count Amount of primary streams.
@@ -82,8 +87,9 @@
 static int initialize_primary_structures(xhci_endpoint_t *xhci_ep, unsigned count)
 {
-	usb_log_debug("Allocating primary stream context array of size %u for endpoint " XHCI_EP_FMT,
-		count, XHCI_EP_ARGS(*xhci_ep));
-
-	if ((dma_buffer_alloc(&xhci_ep->primary_stream_ctx_dma, count * sizeof(xhci_stream_ctx_t)))) {
+	usb_log_debug("Allocating primary stream context array of size %u "
+		"for endpoint " XHCI_EP_FMT, count, XHCI_EP_ARGS(*xhci_ep));
+
+	if ((dma_buffer_alloc(&xhci_ep->primary_stream_ctx_dma,
+		count * sizeof(xhci_stream_ctx_t)))) {
 		return ENOMEM;
 	}
@@ -101,10 +107,8 @@
 }
 
-/**
- *
- */
 static void clear_primary_structures(xhci_endpoint_t *xhci_ep)
 {
-	usb_log_debug("Deallocating primary stream structures for endpoint " XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));
+	usb_log_debug("Deallocating primary stream structures for "
+		"endpoint " XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));
 
 	dma_buffer_free(&xhci_ep->primary_stream_ctx_dma);
@@ -133,5 +137,6 @@
 void xhci_stream_free_ds(xhci_endpoint_t *xhci_ep)
 {
-	usb_log_debug("Freeing stream rings and context arrays of endpoint " XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));
+	usb_log_debug("Freeing stream rings and context arrays of endpoint "
+		XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));
 
 	for (size_t index = 0; index < xhci_ep->primary_stream_data_size; ++index) {
@@ -141,10 +146,13 @@
 }
 
-/** Initialize a single primary stream structure with given index.
+/**
+ * Initialize a single primary stream structure with given index.
  * @param[in] hc Host controller of the endpoint.
  * @param[in] xhci_ep XHCI bulk endpoint to use.
  * @param[in] index index of the initialized stream structure.
  */
-static int initialize_primary_stream(xhci_hc_t *hc, xhci_endpoint_t *xhci_ep, unsigned index) {
+static int initialize_primary_stream(xhci_hc_t *hc, xhci_endpoint_t *xhci_ep,
+    unsigned index)
+{
 	xhci_stream_ctx_t *ctx = &xhci_ep->primary_stream_ctx_array[index];
 	xhci_stream_data_t *data = &xhci_ep->primary_stream_data_array[index];
@@ -165,5 +173,6 @@
 }
 
-/** Initialize primary streams of XHCI bulk endpoint.
+/**
+ * Initialize primary streams of XHCI bulk endpoint.
  * @param[in] hc Host controller of the endpoint.
  * @param[in] xhci_ep XHCI bulk endpoint to use.
@@ -189,5 +198,6 @@
 }
 
-/** Initialize secondary streams of XHCI bulk endpoint.
+/**
+ * Initialize secondary streams of XHCI bulk endpoint.
  * @param[in] hc Host controller of the endpoint.
  * @param[in] xhci_epi XHCI bulk endpoint to use.
@@ -195,13 +205,18 @@
  * @param[in] count Number of secondary streams to initialize.
  */
-static int initialize_secondary_streams(xhci_hc_t *hc, xhci_endpoint_t *xhci_ep, unsigned idx, unsigned count)
+static int initialize_secondary_streams(xhci_hc_t *hc, xhci_endpoint_t *xhci_ep,
+    unsigned idx, unsigned count)
 {
 	if (count == 0) {
-		/* The primary stream context can still point to a single ring, not a secondary. */
+		/*
+		 * The primary stream context can still point to a single ring, not
+		 * a secondary.
+		 */
 		return initialize_primary_stream(hc, xhci_ep, idx);
 	}
 
 	if ((count & (count - 1)) != 0 || count < 8 || count > 256) {
-		usb_log_error("The secondary stream array size must be a power of 2 between 8 and 256.");
+		usb_log_error("The secondary stream array size must be a power of 2 "
+			"between 8 and 256.");
 		return EINVAL;
 	}
@@ -217,5 +232,6 @@
 	}
 
-	if ((dma_buffer_alloc(&data->secondary_stream_ctx_dma, count * sizeof(xhci_stream_ctx_t)))) {
+	if ((dma_buffer_alloc(&data->secondary_stream_ctx_dma,
+		count * sizeof(xhci_stream_ctx_t)))) {
 		free(data->secondary_data);
 		return ENOMEM;
@@ -251,5 +267,6 @@
 }
 
-/** Configure XHCI bulk endpoint's stream context.
+/**
+ * Configure XHCI bulk endpoint's stream context.
  * @param[in] xhci_ep Associated XHCI bulk endpoint.
  * @param[in] ctx Endpoint context to configure.
@@ -257,5 +274,6 @@
  * @param[in] lsa Specifies if the stream IDs point to primary stream array.
  */
-static void setup_stream_context(xhci_endpoint_t *xhci_ep, xhci_ep_ctx_t *ctx, unsigned pstreams, unsigned lsa)
+static void setup_stream_context(xhci_endpoint_t *xhci_ep, xhci_ep_ctx_t *ctx,
+    unsigned pstreams, unsigned lsa)
 {
 	XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(xhci_ep));
@@ -269,5 +287,6 @@
 }
 
-/** Verifies if all the common preconditions are satisfied.
+/**
+ * Verifies if all the common preconditions are satisfied.
  * @param[in] hc Host controller of the endpoint.
  * @param[in] dev Used device.
@@ -285,5 +304,6 @@
 
 	if (xhci_ep->max_streams <= 1) {
-		usb_log_error("Streams are not supported by endpoint " XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));
+		usb_log_error("Streams are not supported by endpoint "
+		    XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));
 		return EINVAL;
 	}
@@ -294,8 +314,12 @@
 	}
 
-	/* The maximum amount of primary streams is 2 ^ (MaxPSA + 1) (See table 26 of XHCI specification) */
+	/*
+	 * The maximum amount of primary streams is 2 ^ (MaxPSA + 1)
+	 * See table 26 of XHCI specification.
+	 */
 	uint8_t max_psa_size = 1 << (XHCI_REG_RD(hc->cap_regs, XHCI_CAP_MAX_PSA_SIZE) + 1);
 	if (count > max_psa_size) {
-		usb_log_error("Host controller only supports %u primary streams.", max_psa_size);
+		usb_log_error("Host controller only supports "
+			"%u primary streams.", max_psa_size);
 		return EINVAL;
 	}
@@ -315,10 +339,12 @@
 }
 
-/** Cancels streams and reconfigures endpoint back to single ring no stream endpoint.
+/**
+ * Cancels streams and reconfigures endpoint back to single ring no stream endpoint.
  * @param[in] hc Host controller of the endpoint.
  * @param[in] dev Used device.
  * @param[in] xhci_ep Associated XHCI bulk endpoint.
  */
-int xhci_endpoint_remove_streams(xhci_hc_t *hc, xhci_device_t *dev, xhci_endpoint_t *xhci_ep)
+int xhci_endpoint_remove_streams(xhci_hc_t *hc, xhci_device_t *dev,
+    xhci_endpoint_t *xhci_ep)
 {
 	if (!xhci_ep->primary_stream_data_size) {
@@ -340,5 +366,6 @@
 }
 
-/** Initialize, setup and register primary streams.
+/**
+ * Initialize, setup and register primary streams.
  * @param[in] hc Host controller of the endpoint.
  * @param[in] dev Used device.
@@ -374,5 +401,8 @@
 
 	xhci_ep_ctx_t ep_ctx;
-	/* Allowed values are 1-15, where 2 ^ pstreams is the actual amount of streams. */
+	/*
+	 * Allowed values are 1-15, where 2 ^ pstreams is the actual amount of
+	 * streams.
+	 */
 	const size_t pstreams = fnzb32(count) - 1;
 	setup_stream_context(xhci_ep, &ep_ctx, pstreams, 1);
@@ -381,11 +411,12 @@
 }
 
-/** Initialize, setup and register secondary streams.
+/**
+ * Initialize, setup and register secondary streams.
  * @param[in] hc Host controller of the endpoint.
  * @param[in] dev Used device.
  * @param[in] xhci_ep Associated XHCI bulk endpoint.
- * @param[in] sizes Amount of secondary streams in each primary stream.
- 					This array should have exactly count elements.
-					If the size is 0, then a primary ring is created with that index.
+ * @param[in] sizes Amount of secondary streams in each of the primary streams.
+ *                  This array should have exactly count elements. If the size
+ *                  is 0, then a primary ring is created with that index.
  * @param[in] count Amount of primary streams requested.
  */
Index: uspace/drv/bus/usb/xhci/transfers.c
===================================================================
--- uspace/drv/bus/usb/xhci/transfers.c	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/transfers.c	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -151,5 +151,6 @@
 	TRB_CTRL_SET_IDT(*trb_setup, 1);
 	TRB_CTRL_SET_TRB_TYPE(*trb_setup, XHCI_TRB_TYPE_SETUP_STAGE);
-	TRB_CTRL_SET_TRT(*trb_setup, get_transfer_type(trb_setup, setup->request_type, setup->length));
+	TRB_CTRL_SET_TRT(*trb_setup,
+	    get_transfer_type(trb_setup, setup->request_type, setup->length));
 
 	/* Data stage */
@@ -178,10 +179,8 @@
 	xhci_trb_clean(trb_status);
 
-	// FIXME: Evaluate next TRB? 4.12.3
-	// TRB_CTRL_SET_ENT(*trb_status, 1);
-
 	TRB_CTRL_SET_IOC(*trb_status, 1);
 	TRB_CTRL_SET_TRB_TYPE(*trb_status, XHCI_TRB_TYPE_STATUS_STAGE);
-	TRB_CTRL_SET_DIR(*trb_status, get_status_direction_flag(trb_setup, setup->request_type, setup->length));
+	TRB_CTRL_SET_DIR(*trb_status, get_status_direction_flag(trb_setup,
+	    setup->request_type, setup->length));
 
 	// Issue a Configure Endpoint command, if needed.
@@ -192,5 +191,6 @@
 	}
 
-	return xhci_trb_ring_enqueue_multiple(get_ring(transfer), trbs, trbs_used, &transfer->interrupt_trb_phys);
+	return xhci_trb_ring_enqueue_multiple(get_ring(transfer), trbs,
+	    trbs_used, &transfer->interrupt_trb_phys);
 }
 
@@ -303,5 +303,6 @@
 		/* We are received transfer pointer instead - work with that */
 		transfer = (xhci_transfer_t *) addr;
-		xhci_trb_ring_update_dequeue(get_ring(transfer), transfer->interrupt_trb_phys);
+		xhci_trb_ring_update_dequeue(get_ring(transfer),
+		    transfer->interrupt_trb_phys);
 		batch = &transfer->batch;
 
@@ -453,5 +454,6 @@
 	 * the Reset Endpoint command.
 	 */
-	if (batch->ep->transfer_type == USB_TRANSFER_CONTROL && batch->dir == USB_DIRECTION_OUT) {
+	if (batch->ep->transfer_type == USB_TRANSFER_CONTROL
+	    && batch->dir == USB_DIRECTION_OUT) {
 		const usb_device_request_setup_packet_t *request = &batch->setup.packet;
 		if (request->request == USB_DEVREQ_CLEAR_FEATURE
@@ -460,15 +462,19 @@
 			const uint16_t index = uint16_usb2host(request->index);
 			const usb_endpoint_t ep_num = index & 0xf;
-			const usb_direction_t dir = (index >> 7) ? USB_DIRECTION_IN : USB_DIRECTION_OUT;
+			const usb_direction_t dir = (index >> 7)
+			    ? USB_DIRECTION_IN
+			    : USB_DIRECTION_OUT;
 			endpoint_t *halted_ep = bus_find_endpoint(&xhci_dev->base, ep_num, dir);
 			if (halted_ep) {
 				/*
-				 * TODO: Find out how to come up with stream_id. It
-				 * might be possible that we have to clear all of them.
+				 * TODO: Find out how to come up with stream_id. It might be
+				 * possible that we have to clear all of them.
 				 */
 				xhci_endpoint_clear_halt(xhci_endpoint_get(halted_ep), 0);
 				endpoint_del_ref(halted_ep);
 			} else {
-				usb_log_warning("Device(%u): Resetting unregistered endpoint %u %s.", xhci_dev->base.address, ep_num, usb_str_direction(dir));
+				usb_log_warning("Device(%u): Resetting unregistered endpoint"
+					" %u %s.", xhci_dev->base.address, ep_num,
+					usb_str_direction(dir));
 			}
 		}
@@ -487,7 +493,4 @@
 
 	hc_ring_ep_doorbell(xhci_ep, batch->target.stream);
-
-	/* After the critical section, the transfer can already be finished or aborted. */
-	transfer = NULL; batch = NULL;
 	fibril_mutex_unlock(&ep->guard);
 	return EOK;
Index: uspace/drv/bus/usb/xhci/trb_ring.c
===================================================================
--- uspace/drv/bus/usb/xhci/trb_ring.c	(revision e546142884db710c4bffe9c0af82cc76fa71a930)
+++ uspace/drv/bus/usb/xhci/trb_ring.c	(revision 8033f891a5db64bf70d7b58c3ae97e1b72e52042)
@@ -156,5 +156,6 @@
 
 	list_foreach_safe(ring->segments, cur, next) {
-		trb_segment_t *segment = list_get_instance(cur, trb_segment_t, segments_link);
+		trb_segment_t *segment =
+		    list_get_instance(cur, trb_segment_t, segments_link);
 		trb_segment_free(segment);
 	}
@@ -171,10 +172,12 @@
 static void trb_ring_resolve_link(xhci_trb_ring_t *ring)
 {
-	link_t *next_segment = list_next(&ring->enqueue_segment->segments_link, &ring->segments);
+	link_t *next_segment =
+	    list_next(&ring->enqueue_segment->segments_link, &ring->segments);
 	if (!next_segment)
 		next_segment = list_first(&ring->segments);
 	assert(next_segment);
 
-	ring->enqueue_segment = list_get_instance(next_segment, trb_segment_t, segments_link);
+	ring->enqueue_segment =
+	    list_get_instance(next_segment, trb_segment_t, segments_link);
 	ring->enqueue_trb = segment_begin(ring->enqueue_segment);
 }
@@ -206,5 +209,6 @@
  * The copied TRBs must be contiguous in memory, and must not contain Link TRBs.
  *
- * We cannot avoid the copying, because the TRB in ring should be updated atomically.
+ * We cannot avoid the copying, because the TRB in ring should be updated
+ * atomically.
  *
  * @param first_trb the first TRB
@@ -405,5 +409,6 @@
 	/* Wrapping around segment boundary */
 	if (index >= SEGMENT_TRB_COUNT) {
-		link_t *next_segment = list_next(&ring->dequeue_segment->segments_link, &ring->segments);
+		link_t *next_segment =
+		    list_next(&ring->dequeue_segment->segments_link, &ring->segments);
 
 		/* Wrapping around table boundary */
@@ -413,5 +418,6 @@
 		}
 
-		ring->dequeue_segment = list_get_instance(next_segment, trb_segment_t, segments_link);
+		ring->dequeue_segment =
+		    list_get_instance(next_segment, trb_segment_t, segments_link);
 		ring->dequeue_trb = segment_begin(ring->dequeue_segment);
 	}