Index: arch/ia64/include/asm.h
===================================================================
--- arch/ia64/include/asm.h	(revision abbc16e9bc4db4ecd88808e50f3cf7b37cb85310)
+++ arch/ia64/include/asm.h	(revision 7f1c620c9e5bd00a90322b5118b47b8b033b5152)
@@ -46,7 +46,7 @@
  * The stack must start on page boundary.
  */
-static inline __address get_stack_base(void)
-{
-	__u64 v;
+static inline uintptr_t get_stack_base(void)
+{
+	uint64_t v;
 
 	__asm__ volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
@@ -59,7 +59,7 @@
  * @return PSR.
  */
-static inline __u64 psr_read(void)
-{
-	__u64 v;
+static inline uint64_t psr_read(void)
+{
+	uint64_t v;
 	
 	__asm__ volatile ("mov %0 = psr\n" : "=r" (v));
@@ -72,7 +72,7 @@
  * @return Return location of interruption vector table.
  */
-static inline __u64 iva_read(void)
-{
-	__u64 v;
+static inline uint64_t iva_read(void)
+{
+	uint64_t v;
 	
 	__asm__ volatile ("mov %0 = cr.iva\n" : "=r" (v));
@@ -85,5 +85,5 @@
  * @param v New location of interruption vector table.
  */
-static inline void iva_write(__u64 v)
+static inline void iva_write(uint64_t v)
 {
 	__asm__ volatile ("mov cr.iva = %0\n" : : "r" (v));
@@ -95,7 +95,7 @@
  * @return Highest priority, pending, unmasked external interrupt vector.
  */
-static inline __u64 ivr_read(void)
-{
-	__u64 v;
+static inline uint64_t ivr_read(void)
+{
+	uint64_t v;
 	
 	__asm__ volatile ("mov %0 = cr.ivr\n" : "=r" (v));
@@ -108,5 +108,5 @@
  * @param v New counter value.
  */
-static inline void itc_write(__u64 v)
+static inline void itc_write(uint64_t v)
 {
 	__asm__ volatile ("mov ar.itc = %0\n" : : "r" (v));
@@ -117,7 +117,7 @@
  * @return Current counter value.
  */
-static inline __u64 itc_read(void)
-{
-	__u64 v;
+static inline uint64_t itc_read(void)
+{
+	uint64_t v;
 	
 	__asm__ volatile ("mov %0 = ar.itc\n" : "=r" (v));
@@ -130,5 +130,5 @@
  * @param v New match value.
  */
-static inline void itm_write(__u64 v)
+static inline void itm_write(uint64_t v)
 {
 	__asm__ volatile ("mov cr.itm = %0\n" : : "r" (v));
@@ -139,7 +139,7 @@
  * @return Match value.
  */
-static inline __u64 itm_read(void)
-{
-	__u64 v;
+static inline uint64_t itm_read(void)
+{
+	uint64_t v;
 	
 	__asm__ volatile ("mov %0 = cr.itm\n" : "=r" (v));
@@ -152,7 +152,7 @@
  * @return Current vector and mask bit.
  */
-static inline __u64 itv_read(void)
-{
-	__u64 v;
+static inline uint64_t itv_read(void)
+{
+	uint64_t v;
 	
 	__asm__ volatile ("mov %0 = cr.itv\n" : "=r" (v));
@@ -165,5 +165,5 @@
  * @param v New vector and mask bit.
  */
-static inline void itv_write(__u64 v)
+static inline void itv_write(uint64_t v)
 {
 	__asm__ volatile ("mov cr.itv = %0\n" : : "r" (v));
@@ -174,5 +174,5 @@
  * @param v This value is ignored.
  */
-static inline void eoi_write(__u64 v)
+static inline void eoi_write(uint64_t v)
 {
 	__asm__ volatile ("mov cr.eoi = %0\n" : : "r" (v));
@@ -183,7 +183,7 @@
  * @return Current value of TPR.
  */
-static inline __u64 tpr_read(void)
-{
-	__u64 v;
+static inline uint64_t tpr_read(void)
+{
+	uint64_t v;
 
 	__asm__ volatile ("mov %0 = cr.tpr\n"  : "=r" (v));
@@ -196,5 +196,5 @@
  * @param v New value of TPR.
  */
-static inline void tpr_write(__u64 v)
+static inline void tpr_write(uint64_t v)
 {
 	__asm__ volatile ("mov cr.tpr = %0\n" : : "r" (v));
@@ -210,5 +210,5 @@
 static ipl_t interrupts_disable(void)
 {
-	__u64 v;
+	uint64_t v;
 	
 	__asm__ volatile (
@@ -231,5 +231,5 @@
 static ipl_t interrupts_enable(void)
 {
-	__u64 v;
+	uint64_t v;
 	
 	__asm__ volatile (
@@ -276,7 +276,7 @@
 extern void cpu_halt(void);
 extern void cpu_sleep(void);
-extern void asm_delay_loop(__u32 t);
-
-extern void switch_to_userspace(__address entry, __address sp, __address bsp, __address uspace_uarg, __u64 ipsr, __u64 rsc);
+extern void asm_delay_loop(uint32_t t);
+
+extern void switch_to_userspace(uintptr_t entry, uintptr_t sp, uintptr_t bsp, uintptr_t uspace_uarg, uint64_t ipsr, uint64_t rsc);
 
 #endif
