Changeset 7cb53f62 in mainline for arch/sparc64/include


Ignore:
Timestamp:
2006-02-26T12:02:25Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
4767721
Parents:
7a255e69
Message:

sparc64 work.
Switch console to framebuffer (needs proper detection and initialization).
No native keyboard support, so far.
Memory management trap handler fixes.
Do not use OpenFirmware trap table anymore.

Location:
arch/sparc64/include
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • arch/sparc64/include/asm.h

    r7a255e69 r7cb53f62  
    250250}
    251251
     252/** Read Trap Level register.
     253 *
     254 * @return Current value in TL.
     255 */
     256static inline __u64 tl_read(void)
     257{
     258        __u64 v;
     259       
     260        __asm__ volatile ("rdpr %%tl, %0\n" : "=r" (v));
     261       
     262        return v;
     263}
    252264
    253265/** Write Trap Base Address register.
  • arch/sparc64/include/barrier.h

    r7a255e69 r7cb53f62  
    4848         * However, JPS1 implementations are free to ignore the trap.
    4949         */
    50         __asm__ volatile ("flush %sp\n");
     50         
     51        /*
     52         * %i7 should provide address that is always mapped in DTLB
     53         * as it is a pointer to kernel code.
     54         */
     55        __asm__ volatile ("flush %i7\n");
    5156}
    5257
  • arch/sparc64/include/console.h

    r7a255e69 r7cb53f62  
    3030#define __sparc64_CONSOLE_H__
    3131
    32 extern void kofwinput(void *arg);
    33 extern void ofw_sparc64_console_init(void);
     32extern void fb_sparc64_console_init(void);
    3433
    3534#endif
  • arch/sparc64/include/trap/exception.h

    r7a255e69 r7cb53f62  
    3131
    3232#define TT_INSTRUCTION_ACCESS_EXCEPTION         0x08
     33#define TT_ILLEGAL_INSTRUCTION                  0x10
    3334#define TT_MEM_ADDRESS_NOT_ALIGNED              0x34
    3435
     
    3637extern void do_instruction_access_exc(void);
    3738extern void do_mem_address_not_aligned(void);
     39extern void do_illegal_instruction(void);
    3840#endif /* !__ASM__ */
    3941
  • arch/sparc64/include/trap/mmu.h

    r7a255e69 r7cb53f62  
    3434#define __sparc64_MMU_TRAP_H__
    3535
     36#include <arch/stack.h>
     37
    3638#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS     0x64
    3739#define TT_FAST_DATA_ACCESS_MMU_MISS            0x68
     
    4244#ifdef __ASM__
    4345.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
     46        save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
    4447        call fast_instruction_access_mmu_miss
    4548        nop
     49        restore
    4650        retry   
    4751.endm
    4852
    4953.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER
     54        save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
    5055        call fast_data_access_mmu_miss
    5156        nop
     57        restore
    5258        retry
    5359.endm
    5460
    5561.macro FAST_DATA_ACCESS_PROTECTION_HANDLER
     62        save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
    5663        call fast_data_access_protection
    5764        nop
     65        restore
    5866        retry
    5967.endm
  • arch/sparc64/include/trap/trap.h

    r7a255e69 r7cb53f62  
    4141
    4242extern void trap_init(void);
    43 extern void trap_install_handler(index_t tt, size_t len, bool tlnonz);
    4443
    4544#endif
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