Changeset 7ca51cc in mainline for uspace/lib/c

Timestamp:

2018-07-05T21:41:25Z (7 years ago)

Author:

Dzejrou <dzejrou@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

1bf924a

Parents:

a853075

git-author:

Dzejrou <dzejrou@…> (2018-07-03 21:52:55)

git-committer:

Dzejrou <dzejrou@…> (2018-07-05 21:41:25)

Message:

removed whitespace changes and opted to change types of variables instead of casting in tls headers

Location:

uspace/lib/c

Files:

• arch/amd64/include/libarch/tls.h (modified) (1 diff)
• arch/ia32/include/libarch/tls.h (modified) (1 diff)
• arch/ia64/include/libarch/tls.h (modified) (1 diff)
• arch/sparc64/include/libarch/tls.h (modified) (1 diff)
• include/loader/pcb.h (modified) (1 diff)

uspace/lib/c/arch/amd64/include/libarch/tls.h

@@ -52 +52 @@
 static inline tcb_t *__tcb_get(void)
 {
-        void *retval;
+        tcb_t *retval;
 
         asm volatile ("movq %%fs:0, %0" : "=r" (retval));
-        return (tcb_t *)retval;
+        return retval;
 }
 

uspace/lib/c/arch/ia32/include/libarch/tls.h

@@ -53 +53 @@
 static inline tcb_t *__tcb_get(void)
 {
-        void *retval;
+        tcb_t *retval;
 
         asm volatile ("movl %%gs:0, %0" : "=r" (retval));
 
-        return (tcb_t *)retval;
+        return retval;
 }
 

uspace/lib/c/arch/ia64/include/libarch/tls.h

@@ -52 +52 @@
 static inline tcb_t *__tcb_get(void)
 {
-        void *retval;
+        tcb_t *retval;
 
         asm volatile ("mov %0 = r13\n" : "=r" (retval));
 
-        return (tcb_t *)retval;
+        return retval;
 }
 

uspace/lib/c/arch/sparc64/include/libarch/tls.h

@@ -53 +53 @@
 static inline tcb_t *__tcb_get(void)
 {
-        void *retval;
+        tcb_t *retval;
 
         asm volatile ("mov %%g7, %0\n" : "=r" (retval));
 
-        return (tcb_t *)retval;
+        return retval;
 }
 

uspace/lib/c/include/loader/pcb.h

@@ -36 +36 @@
 #ifndef LIBC_PCB_H_
 #define LIBC_PCB_H_
+
 
 typedef void (*entry_point_t)(void);