Changeset 7c3fb9b in mainline for uspace/lib/c/arch
- Timestamp:
- 2018-05-17T08:29:01Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 6ff23ff
- Parents:
- fac0ac7
- git-author:
- Jiri Svoboda <jiri@…> (2018-05-16 17:28:17)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-05-17 08:29:01)
- Location:
- uspace/lib/c/arch
- Files:
-
- 12 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/lib/c/arch/abs32le/include/libarch/atomic.h
rfac0ac7 r7c3fb9b 55 55 static inline void atomic_inc(atomic_t *val) 56 56 { 57 /* On real hardware the increment has to be done 58 as an atomic action. */ 57 /* 58 * On real hardware the increment has to be done 59 * as an atomic action. 60 */ 59 61 60 62 val->count++; … … 63 65 static inline void atomic_dec(atomic_t *val) 64 66 { 65 /* On real hardware the decrement has to be done 66 as an atomic action. */ 67 /* 68 * On real hardware the decrement has to be done 69 * as an atomic action. 70 */ 67 71 68 72 val->count++; … … 71 75 static inline atomic_count_t atomic_postinc(atomic_t *val) 72 76 { 73 /* On real hardware both the storing of the previous 74 value and the increment have to be done as a single 75 atomic action. */ 77 /* 78 * On real hardware both the storing of the previous 79 * value and the increment have to be done as a single 80 * atomic action. 81 */ 76 82 77 83 atomic_count_t prev = val->count; … … 83 89 static inline atomic_count_t atomic_postdec(atomic_t *val) 84 90 { 85 /* On real hardware both the storing of the previous 86 value and the decrement have to be done as a single 87 atomic action. */ 91 /* 92 * On real hardware both the storing of the previous 93 * value and the decrement have to be done as a single 94 * atomic action. 95 */ 88 96 89 97 atomic_count_t prev = val->count; -
uspace/lib/c/arch/amd64/include/libarch/fibril_context.h
rfac0ac7 r7c3fb9b 1 /* Copyright (c) 2014 Jakub Jermar 1 /* 2 * Copyright (c) 2014 Jakub Jermar 2 3 * All rights reserved. 3 4 * … … 45 46 46 47 typedef struct context { 47 /* We include only registers that must be preserved 48 /* 49 * We include only registers that must be preserved 48 50 * during function call. 49 51 */ -
uspace/lib/c/arch/arm32/include/libarch/fibril_context.h
rfac0ac7 r7c3fb9b 1 /* Copyright (c) 2014 Jakub Jermar 1 /* 2 * Copyright (c) 2014 Jakub Jermar 2 3 * All rights reserved. 3 4 * -
uspace/lib/c/arch/ia32/include/libarch/fibril_context.h
rfac0ac7 r7c3fb9b 1 /* Copyright (c) 2014 Jakub Jermar 1 /* 2 * Copyright (c) 2014 Jakub Jermar 2 3 * All rights preserved. 3 4 * -
uspace/lib/c/arch/ia64/include/libarch/fibril_context.h
rfac0ac7 r7c3fb9b 1 /* Copyright (c) 2014 Jakub Jermar 1 /* 2 * Copyright (c) 2014 Jakub Jermar 2 3 * All rights preserved. 3 4 * -
uspace/lib/c/arch/mips32/include/libarch/atomic.h
rfac0ac7 r7c3fb9b 50 50 #define atomic_predec(x) atomic_add(x, -1) 51 51 52 /* Atomic addition of immediate value.52 /** Atomic addition of immediate value. 53 53 * 54 54 * @param val Memory location to which will be the immediate value added. -
uspace/lib/c/arch/mips32/include/libarch/fibril_context.h
rfac0ac7 r7c3fb9b 1 /* Copyright (c) 2014 Jakub Jermar 1 /* 2 * Copyright (c) 2014 Jakub Jermar 2 3 * All rights reserved. 3 4 * -
uspace/lib/c/arch/mips32/include/libarch/tls.h
rfac0ac7 r7c3fb9b 46 46 #define CONFIG_TLS_VARIANT_1 47 47 48 /* I did not find any specification (neither MIPS nor PowerPC), but 48 /* 49 * I did not find any specification (neither MIPS nor PowerPC), but 49 50 * as I found it 50 51 * - it uses Variant II -
uspace/lib/c/arch/ppc32/include/libarch/fibril_context.h
rfac0ac7 r7c3fb9b 1 /* Copyright (c) 2014 Jakub Jermar 1 /* 2 * Copyright (c) 2014 Jakub Jermar 2 3 * All rights reserved. 3 4 * -
uspace/lib/c/arch/riscv64/include/libarch/atomic.h
rfac0ac7 r7c3fb9b 57 57 static inline void atomic_inc(atomic_t *val) 58 58 { 59 /* On real hardware the increment has to be done 60 as an atomic action. */ 59 /* 60 * On real hardware the increment has to be done 61 * as an atomic action. 62 */ 61 63 62 64 val->count++; … … 65 67 static inline void atomic_dec(atomic_t *val) 66 68 { 67 /* On real hardware the decrement has to be done 68 as an atomic action. */ 69 /* 70 * On real hardware the decrement has to be done 71 * as an atomic action. 72 */ 69 73 70 74 val->count++; … … 73 77 static inline atomic_count_t atomic_postinc(atomic_t *val) 74 78 { 75 /* On real hardware both the storing of the previous 76 value and the increment have to be done as a single 77 atomic action. */ 79 /* 80 * On real hardware both the storing of the previous 81 * value and the increment have to be done as a single 82 * atomic action. 83 */ 78 84 79 85 atomic_count_t prev = val->count; … … 85 91 static inline atomic_count_t atomic_postdec(atomic_t *val) 86 92 { 87 /* On real hardware both the storing of the previous 88 value and the decrement have to be done as a single 89 atomic action. */ 93 /* 94 * On real hardware both the storing of the previous 95 * value and the decrement have to be done as a single 96 * atomic action. 97 */ 90 98 91 99 atomic_count_t prev = val->count; -
uspace/lib/c/arch/riscv64/include/libarch/fibril_context.h
rfac0ac7 r7c3fb9b 1 /* Copyright (c) 2016 Martin Decky 1 /* 2 * Copyright (c) 2016 Martin Decky 2 3 * All rights reserved. 3 4 * -
uspace/lib/c/arch/sparc64/include/libarch/fibril_context.h
rfac0ac7 r7c3fb9b 1 /* Copyright (c) 2014 Jakub Jermar 1 /* 2 * Copyright (c) 2014 Jakub Jermar 2 3 * All rights reserved. 3 4 *
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