Changeset 7c3fb9b in mainline for uspace/drv/bus/usb/ehci
- Timestamp:
- 2018-05-17T08:29:01Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 6ff23ff
- Parents:
- fac0ac7
- git-author:
- Jiri Svoboda <jiri@…> (2018-05-16 17:28:17)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-05-17 08:29:01)
- Location:
- uspace/drv/bus/usb/ehci
- Files:
-
- 5 edited
-
ehci_batch.c (modified) (3 diffs)
-
ehci_rh.c (modified) (3 diffs)
-
hc.c (modified) (2 diffs)
-
hw_struct/queue_head.c (modified) (3 diffs)
-
res.c (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/ehci/ehci_batch.c
rfac0ac7 r7c3fb9b 47 47 #include "ehci_bus.h" 48 48 49 /* The buffer pointer list in the qTD is long enough to support a maximum 49 /* 50 * The buffer pointer list in the qTD is long enough to support a maximum 50 51 * transfer size of 20K bytes. This case occurs when all five buffer pointers 51 52 * are used and the first offset is zero. A qTD handles a 16Kbyte buffer 52 * with any starting buffer alignment. EHCI specs p. 87 (pdf p. 97) */ 53 * with any starting buffer alignment. EHCI specs p. 87 (pdf p. 97) 54 */ 53 55 #define EHCI_TD_MAX_TRANSFER (16 * 1024) 54 56 … … 177 179 return false; 178 180 179 /* Now we may be sure that either the ED is inactive because of errors 180 * or all transfer descriptors completed successfully */ 181 /* 182 * Now we may be sure that either the ED is inactive because of errors 183 * or all transfer descriptors completed successfully 184 */ 181 185 182 186 /* Assume all data got through */ … … 192 196 ehci_batch->base.error = td_error(&ehci_batch->tds[i]); 193 197 if (ehci_batch->base.error == EOK) { 194 /* If the TD got all its data through, it will report 198 /* 199 * If the TD got all its data through, it will report 195 200 * 0 bytes remain, the sole exception is INPUT with 196 201 * data rounding flag (short), i.e. every INPUT. -
uspace/drv/bus/usb/ehci/ehci_rh.c
rfac0ac7 r7c3fb9b 72 72 instance->hub_descriptor.header.descriptor_type = USB_DESCTYPE_HUB; 73 73 instance->hub_descriptor.header.port_count = instance->port_count; 74 /* Bits 0,1 indicate power switching mode 74 /* 75 * Bits 0,1 indicate power switching mode 75 76 * Bit 2 indicates device type (compound device) 76 * Bits 3,4 indicate over-current protection mode */ 77 * Bits 3,4 indicate over-current protection mode 78 */ 77 79 instance->hub_descriptor.header.characteristics = 0 | 78 80 ((hcs & EHCI_CAPS_HCS_PPC_FLAG) ? 0x09 : 0x12) | … … 313 315 EHCI2USB(reg, USB_PORTSC_OC_CHANGE_FLAG, USB_HUB_PORT_STATUS_C_OC) | 314 316 (hub->reset_flag[port] ? USB_HUB_PORT_STATUS_C_RESET : 0)); 315 /* Note feature numbers for test and indicator feature do not 316 * correspond to the port status bit locations */ 317 /* 318 * Note feature numbers for test and indicator feature do not 319 * correspond to the port status bit locations 320 */ 317 321 usb_log_debug2("RH(%p-%u) port status: %" PRIx32 "(%" PRIx32 ")", hub, port, 318 322 status, reg); … … 340 344 } 341 345 usb_log_debug("RH(%p-%u): Reset complete", job->hub, job->port); 342 /* Handle port ownership, if the port is not enabled 343 * after reset it's a full speed device */ 346 /* 347 * Handle port ownership, if the port is not enabled 348 * after reset it's a full speed device 349 */ 344 350 if (!(EHCI_RD(job->hub->registers->portsc[job->port]) & 345 351 USB_PORTSC_ENABLED_FLAG)) { -
uspace/drv/bus/usb/ehci/hc.c
rfac0ac7 r7c3fb9b 395 395 usb_log_debug("HC(%p): Starting HW.", instance); 396 396 397 /* Turn off the HC if it's running, Reseting a running device is 398 * undefined */ 397 /* 398 * Turn off the HC if it's running, Reseting a running device is 399 * undefined 400 */ 399 401 if (!(EHCI_RD(instance->registers->usbsts) & USB_STS_HC_HALTED_FLAG)) { 400 402 /* disable all interrupts */ … … 487 489 return ret; 488 490 } 489 /* Specs say "Software must set queue head horizontal pointer T-bits to 491 /* 492 * Specs say "Software must set queue head horizontal pointer T-bits to 490 493 * a zero for queue heads in the asynchronous schedule" (4.4.0). 491 494 * So we must maintain circular buffer (all horizontal pointers 492 * have to be valid */ 495 * have to be valid 496 */ 493 497 endpoint_list_chain(&instance->async_list, &instance->async_list); 494 498 -
uspace/drv/bus/usb/ehci/hw_struct/queue_head.c
rfac0ac7 r7c3fb9b 61 61 EHCI_MEM32_WR(instance->alternate, LINK_POINTER_TERM); 62 62 if (ep == NULL) { 63 /* Mark as halted and list head, 64 * used by endpoint lists as dummy */ 63 /* 64 * Mark as halted and list head, 65 * used by endpoint lists as dummy 66 */ 65 67 EHCI_MEM32_WR(instance->ep_char, QH_EP_CHAR_H_FLAG); 66 68 EHCI_MEM32_WR(instance->status, QH_STATUS_HALTED_FLAG); … … 76 78 if (ep->device->speed != USB_SPEED_HIGH) 77 79 EHCI_MEM32_SET(instance->ep_char, QH_EP_CHAR_C_FLAG); 78 /* Let BULK and INT use queue head managed toggle, 79 * CONTROL needs special toggle handling anyway */ 80 /* 81 * Let BULK and INT use queue head managed toggle, 82 * CONTROL needs special toggle handling anyway 83 */ 80 84 EHCI_MEM32_SET(instance->ep_char, QH_EP_CHAR_DTC_FLAG); 81 85 } … … 96 100 EHCI_MEM32_WR(instance->ep_cap, ep_cap); 97 101 98 /* The rest of the fields are transfer working area, it should be ok to 99 * leave it NULL */ 102 /* 103 * The rest of the fields are transfer working area, it should be ok to 104 * leave it NULL 105 */ 100 106 } 101 107 -
uspace/drv/bus/usb/ehci/res.c
rfac0ac7 r7c3fb9b 80 80 usb_log_debug2("USBLEGSUP: %" PRIx32 ".", usblegsup); 81 81 82 /* Request control from firmware/BIOS by writing 1 to highest 83 * byte. (OS Control semaphore)*/ 82 /* 83 * Request control from firmware/BIOS by writing 1 to highest 84 * byte. (OS Control semaphore) 85 */ 84 86 usb_log_debug("Requesting OS control."); 85 87 ret = pci_config_space_write_8(parent_sess, … … 187 189 usb_log_debug2("Value of hcc params register: %x.", hcc_params); 188 190 189 /* Read value of EHCI Extended Capabilities Pointer 190 * position of EEC registers (points to PCI config space) */ 191 /* 192 * Read value of EHCI Extended Capabilities Pointer 193 * position of EEC registers (points to PCI config space) 194 */ 191 195 const uint32_t eecp = 192 196 (hcc_params >> EHCI_CAPS_HCC_EECP_SHIFT) & EHCI_CAPS_HCC_EECP_MASK;
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