Changeset 7c3fb9b in mainline for kernel/arch/arm32/include

Timestamp:

2018-05-17T08:29:01Z (8 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

6ff23ff

Parents:

fac0ac7

git-author:

Jiri Svoboda <jiri@…> (2018-05-16 17:28:17)

git-committer:

Jiri Svoboda <jiri@…> (2018-05-17 08:29:01)

Message:

Fix block comment formatting (ccheck).

Location:

kernel/arch/arm32/include/arch

Files:

• context_struct.h (modified) (1 diff)
• fpu_context.h (modified) (1 diff)
• mm/page_armv4.h (modified) (2 diffs)
• mm/page_armv6.h (modified) (2 diffs)

kernel/arch/arm32/include/arch/context_struct.h

@@ -34 +34 @@
 // XXX: This struct must match assembly code in src/context.S
 
-/* Thread context containing registers that must be preserved across
+/*
+ * Thread context containing registers that must be preserved across
  * function calls.
  */

kernel/arch/arm32/include/arch/fpu_context.h

@@ -42 +42 @@
 #define FPU_CONTEXT_ALIGN    8
 
-/* ARM Architecture reference manual, p B-1529.
+/*
+ * ARM Architecture reference manual, p B-1529.
  */
 typedef struct {

kernel/arch/arm32/include/arch/mm/page_armv4.h

@@ -64 +64 @@
         unsigned should_be_zero : 1;
 
-        /* Pointer to the coarse 2nd level page table (holding entries for small
+        /*
+         * Pointer to the coarse 2nd level page table (holding entries for small
          * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page
          * tables that may hold even tiny pages (1KB) but they are bigger (4KB
@@ -80 +81 @@
         unsigned cacheable : 1;
 
-        /* access permissions for each of 4 subparts of a page
-         * (for each 1KB when small pages used */
+        /*
+         * access permissions for each of 4 subparts of a page
+         * (for each 1KB when small pages used
+         */
         unsigned access_permission_0 : 2;
         unsigned access_permission_1 : 2;

kernel/arch/arm32/include/arch/mm/page_armv6.h

@@ -66 +66 @@
         unsigned should_be_zero_1 : 1;
 
-        /* Pointer to the coarse 2nd level page table (holding entries for small
+        /*
+         * Pointer to the coarse 2nd level page table (holding entries for small
          * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page
          * tables that may hold even tiny pages (1KB) but they are bigger (4KB
@@ -279 +280 @@
         }
 
-        /* Shareable is ignored for devices (non-cacheable),
-         * turn it off for normal memory. */
+        /*
+         * Shareable is ignored for devices (non-cacheable),
+         * turn it off for normal memory.
+         */
         p->shareable = 0;