Changeset 7a0359b in mainline for kernel/arch/sparc64/include/sun4u


Ignore:
Timestamp:
2010-07-02T15:42:19Z (16 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
bbfdf62
Parents:
e3ee9b9
Message:

improve kernel function tracing

  • add support for more generic kernel sources
  • replace attribute((no_instrument_function)) with NO_TRACE macro (shorter and for future compatibility with different compilers)
  • to be on the safe side, do not instrument most of the inline and static functions (plus some specific non-static functions)

collateral code cleanup (no change in functionality)

Location:
kernel/arch/sparc64/include/sun4u
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/include/sun4u/asm.h

    re3ee9b9 r7a0359b  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */
    … …  
    3636#define KERN_sparc64_sun4u_ASM_H_
    3737
    38 extern uint64_t read_from_ag_g7(void);
    39 extern void write_to_ag_g6(uint64_t val);
    40 extern void write_to_ag_g7(uint64_t val);
    41 extern void write_to_ig_g6(uint64_t val);
    42 
     38#include <trace.h>
    4339
    4440/** Read Version Register.
    4541 *
    4642 * @return Value of VER register.
     43 *
    4744 */
    48 static inline uint64_t ver_read(void)
     45NO_TRACE static inline uint64_t ver_read(void)
    4946{
    5047        uint64_t v;
    5148       
    52         asm volatile ("rdpr %%ver, %0\n" : "=r" (v));
     49        asm volatile (
     50                "rdpr %%ver, %[v]\n"
     51                : [v] "=r" (v)
     52        );
    5353       
    5454        return v;
    5555}
     56
     57extern uint64_t read_from_ag_g7(void);
     58extern void write_to_ag_g6(uint64_t);
     59extern void write_to_ag_g7(uint64_t);
     60extern void write_to_ig_g6(uint64_t);
    5661
    5762#endif

  • kernel/arch/sparc64/include/sun4u/cpu.h

    re3ee9b9 r7a0359b  
    3636#define KERN_sparc64_sun4u_CPU_H_
    3737
    38 #define MANUF_FUJITSU           0x04
    39 #define MANUF_ULTRASPARC        0x17    /**< UltraSPARC I, UltraSPARC II */
    40 #define MANUF_SUN               0x3e
     38#define MANUF_FUJITSU     0x04
     39#define MANUF_ULTRASPARC  0x17  /**< UltraSPARC I, UltraSPARC II */
     40#define MANUF_SUN         0x3e
    4141
    42 #define IMPL_ULTRASPARCI        0x10
    43 #define IMPL_ULTRASPARCII       0x11
    44 #define IMPL_ULTRASPARCII_I     0x12
    45 #define IMPL_ULTRASPARCII_E     0x13
    46 #define IMPL_ULTRASPARCIII      0x14
    47 #define IMPL_ULTRASPARCIII_PLUS 0x15
    48 #define IMPL_ULTRASPARCIII_I    0x16
    49 #define IMPL_ULTRASPARCIV       0x18
    50 #define IMPL_ULTRASPARCIV_PLUS  0x19
     42#define IMPL_ULTRASPARCI         0x10
     43#define IMPL_ULTRASPARCII        0x11
     44#define IMPL_ULTRASPARCII_I      0x12
     45#define IMPL_ULTRASPARCII_E      0x13
     46#define IMPL_ULTRASPARCIII       0x14
     47#define IMPL_ULTRASPARCIII_PLUS  0x15
     48#define IMPL_ULTRASPARCIII_I     0x16
     49#define IMPL_ULTRASPARCIV        0x18
     50#define IMPL_ULTRASPARCIV_PLUS   0x19
    5151
    52 #define IMPL_SPARC64V           0x5
     52#define IMPL_SPARC64V  0x5
    5353
    5454#ifndef __ASM__
    … …  
    5858#include <arch/regdef.h>
    5959#include <arch/asm.h>
     60#include <trace.h>
    6061
    6162#ifdef CONFIG_SMP
    … …  
    6465
    6566typedef struct {
    66         uint32_t mid;                   /**< Processor ID as read from
    67                                              UPA_CONFIG/FIREPLANE_CONFIG. */
     67        uint32_t mid;              /**< Processor ID as read from
     68                                        UPA_CONFIG/FIREPLANE_CONFIG. */
    6869        ver_reg_t ver;
    69         uint32_t clock_frequency;       /**< Processor frequency in Hz. */
    70         uint64_t next_tick_cmpr;        /**< Next clock interrupt should be
    71                                              generated when the TICK register
    72                                              matches this value. */
     70        uint32_t clock_frequency;  /**< Processor frequency in Hz. */
     71        uint64_t next_tick_cmpr;   /**< Next clock interrupt should be
     72                                        generated when the TICK register
     73                                        matches this value. */
    7374} cpu_arch_t;
    7475
    75 
    76 /**
    77  * Reads the module ID (agent ID/CPUID) of the current CPU.
     76/** Read the module ID (agent ID/CPUID) of the current CPU.
     77 *
    7878 */
    79 static inline uint32_t read_mid(void)
     79NO_TRACE static inline uint32_t read_mid(void)
    8080{
    8181        uint64_t icbus_config = asi_u64_read(ASI_ICBUS_CONFIG, 0);
    8282        icbus_config = icbus_config >> ICBUS_CONFIG_MID_SHIFT;
     83       
    8384#if defined (US)
    8485        return icbus_config & 0x1f;
    … …  
    9192}
    9293
    93 #endif 
     94#endif
    9495
    9596#endif
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