Changeset 7a0359b in mainline for kernel/arch/ppc32/include
- Timestamp:
- 2010-07-02T15:42:19Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- bbfdf62
- Parents:
- e3ee9b9
- Location:
- kernel/arch/ppc32/include
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ppc32/include/asm.h
re3ee9b9 r7a0359b 40 40 #include <arch/cpu.h> 41 41 #include <arch/mm/asid.h> 42 43 static inline uint32_t msr_read(void) 42 #include <trace.h> 43 44 NO_TRACE static inline uint32_t msr_read(void) 44 45 { 45 46 uint32_t msr; … … 53 54 } 54 55 55 static inline void msr_write(uint32_t msr)56 NO_TRACE static inline void msr_write(uint32_t msr) 56 57 { 57 58 asm volatile ( … … 61 62 } 62 63 63 static inline void sr_set(uint32_t flags, asid_t asid, uint32_t sr)64 NO_TRACE static inline void sr_set(uint32_t flags, asid_t asid, uint32_t sr) 64 65 { 65 66 asm volatile ( … … 70 71 } 71 72 72 static inline uint32_t sr_get(uint32_t vaddr)73 NO_TRACE static inline uint32_t sr_get(uint32_t vaddr) 73 74 { 74 75 uint32_t vsid; … … 83 84 } 84 85 85 static inline uint32_t sdr1_get(void)86 NO_TRACE static inline uint32_t sdr1_get(void) 86 87 { 87 88 uint32_t sdr1; … … 103 104 * 104 105 */ 105 static inline ipl_t interrupts_enable(void)106 NO_TRACE static inline ipl_t interrupts_enable(void) 106 107 { 107 108 ipl_t ipl = msr_read(); … … 118 119 * 119 120 */ 120 static inline ipl_t interrupts_disable(void)121 NO_TRACE static inline ipl_t interrupts_disable(void) 121 122 { 122 123 ipl_t ipl = msr_read(); … … 132 133 * 133 134 */ 134 static inline void interrupts_restore(ipl_t ipl)135 NO_TRACE static inline void interrupts_restore(ipl_t ipl) 135 136 { 136 137 msr_write((msr_read() & (~MSR_EE)) | (ipl & MSR_EE)); … … 144 145 * 145 146 */ 146 static inline ipl_t interrupts_read(void)147 NO_TRACE static inline ipl_t interrupts_read(void) 147 148 { 148 149 return msr_read(); … … 154 155 * 155 156 */ 156 static inline bool interrupts_disabled(void)157 NO_TRACE static inline bool interrupts_disabled(void) 157 158 { 158 159 return ((msr_read() & MSR_EE) == 0); … … 166 167 * 167 168 */ 168 static inline uintptr_t get_stack_base(void)169 NO_TRACE static inline uintptr_t get_stack_base(void) 169 170 { 170 171 uintptr_t base; … … 179 180 } 180 181 181 static inline void cpu_sleep(void) 182 { 182 NO_TRACE static inline void cpu_sleep(void) 183 { 184 } 185 186 NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) 187 { 188 *port = v; 189 } 190 191 NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) 192 { 193 *port = v; 194 } 195 196 NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) 197 { 198 *port = v; 199 } 200 201 NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) 202 { 203 return *port; 204 } 205 206 NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) 207 { 208 return *port; 209 } 210 211 NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) 212 { 213 return *port; 183 214 } 184 215 … … 187 218 extern void userspace_asm(uintptr_t uspace_uarg, uintptr_t stack, uintptr_t entry); 188 219 189 static inline void pio_write_8(ioport8_t *port, uint8_t v)190 {191 *port = v;192 }193 194 static inline void pio_write_16(ioport16_t *port, uint16_t v)195 {196 *port = v;197 }198 199 static inline void pio_write_32(ioport32_t *port, uint32_t v)200 {201 *port = v;202 }203 204 static inline uint8_t pio_read_8(ioport8_t *port)205 {206 return *port;207 }208 209 static inline uint16_t pio_read_16(ioport16_t *port)210 {211 return *port;212 }213 214 static inline uint32_t pio_read_32(ioport32_t *port)215 {216 return *port;217 }218 219 220 #endif 220 221 -
kernel/arch/ppc32/include/atomic.h
re3ee9b9 r7a0359b 36 36 #define KERN_ppc32_ATOMIC_H_ 37 37 38 static inline void atomic_inc(atomic_t *val) 38 #include <trace.h> 39 40 NO_TRACE static inline void atomic_inc(atomic_t *val) 39 41 { 40 42 atomic_count_t tmp; … … 54 56 } 55 57 56 static inline void atomic_dec(atomic_t *val)58 NO_TRACE static inline void atomic_dec(atomic_t *val) 57 59 { 58 60 atomic_count_t tmp; … … 72 74 } 73 75 74 static inline atomic_count_t atomic_postinc(atomic_t *val)76 NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) 75 77 { 76 78 atomic_inc(val); … … 78 80 } 79 81 80 static inline atomic_count_t atomic_postdec(atomic_t *val)82 NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) 81 83 { 82 84 atomic_dec(val); … … 84 86 } 85 87 86 static inline atomic_count_t atomic_preinc(atomic_t *val)88 NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) 87 89 { 88 90 atomic_inc(val); … … 90 92 } 91 93 92 static inline atomic_count_t atomic_predec(atomic_t *val)94 NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) 93 95 { 94 96 atomic_dec(val); -
kernel/arch/ppc32/include/barrier.h
re3ee9b9 r7a0359b 36 36 #define KERN_ppc32_BARRIER_H_ 37 37 38 #include <trace.h> 39 38 40 #define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") 39 41 #define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") … … 58 60 */ 59 61 60 static inline void smc_coherence(void *addr)62 NO_TRACE static inline void smc_coherence(void *addr) 61 63 { 62 64 asm volatile ( … … 70 72 } 71 73 72 static inline void smc_coherence_block(void *addr, unsigned int len)74 NO_TRACE static inline void smc_coherence_block(void *addr, unsigned int len) 73 75 { 74 76 unsigned int i; -
kernel/arch/ppc32/include/cpu.h
re3ee9b9 r7a0359b 52 52 53 53 #include <typedefs.h> 54 #include <trace.h> 54 55 55 56 typedef struct { … … 58 59 } __attribute__ ((packed)) cpu_arch_t; 59 60 60 static inline void cpu_version(cpu_arch_t *info)61 NO_TRACE static inline void cpu_version(cpu_arch_t *info) 61 62 { 62 63 asm volatile ( -
kernel/arch/ppc32/include/cycle.h
re3ee9b9 r7a0359b 36 36 #define KERN_ppc32_CYCLE_H_ 37 37 38 static inline uint64_t get_cycle(void) 38 #include <trace.h> 39 40 NO_TRACE static inline uint64_t get_cycle(void) 39 41 { 40 42 uint32_t lower; -
kernel/arch/ppc32/include/exception.h
re3ee9b9 r7a0359b 38 38 #include <typedefs.h> 39 39 #include <arch/cpu.h> 40 #include <trace.h> 40 41 41 42 typedef struct istate { … … 81 82 } istate_t; 82 83 83 static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr) 84 NO_TRACE static inline void istate_set_retaddr(istate_t *istate, 85 uintptr_t retaddr) 84 86 { 85 87 istate->pc = retaddr; … … 91 93 * 92 94 */ 93 static inline int istate_from_uspace(istate_t *istate)95 NO_TRACE static inline int istate_from_uspace(istate_t *istate) 94 96 { 95 97 return (istate->srr1 & MSR_PR) != 0; 96 98 } 97 99 98 static inline unative_t istate_get_pc(istate_t *istate)100 NO_TRACE static inline unative_t istate_get_pc(istate_t *istate) 99 101 { 100 102 return istate->pc; 101 103 } 102 104 103 static inline unative_t istate_get_fp(istate_t *istate)105 NO_TRACE static inline unative_t istate_get_fp(istate_t *istate) 104 106 { 105 107 return istate->sp; -
kernel/arch/ppc32/include/mm/frame.h
re3ee9b9 r7a0359b 43 43 44 44 #include <typedefs.h> 45 #include <trace.h> 45 46 46 47 extern uintptr_t last_frame; 47 48 48 static inline uint32_t physmem_top(void)49 NO_TRACE static inline uint32_t physmem_top(void) 49 50 { 50 51 uint32_t physmem; -
kernel/arch/ppc32/include/mm/page.h
re3ee9b9 r7a0359b 37 37 38 38 #include <arch/mm/frame.h> 39 #include <trace.h> 39 40 40 41 #define PAGE_WIDTH FRAME_WIDTH … … 153 154 } pte_t; 154 155 155 static inline unsigned int get_pt_flags(pte_t *pt, size_t i)156 NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) 156 157 { 157 158 pte_t *entry = &pt[i]; … … 166 167 } 167 168 168 static inline void set_pt_flags(pte_t *pt, size_t i, int flags)169 NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) 169 170 { 170 171 pte_t *entry = &pt[i];
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