Changeset 7a0359b in mainline for kernel/arch/ia32


Ignore:
Timestamp:
2010-07-02T15:42:19Z (15 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
bbfdf62
Parents:
e3ee9b9
Message:

improve kernel function tracing

  • add support for more generic kernel sources
  • replace attribute((no_instrument_function)) with NO_TRACE macro (shorter and for future compatibility with different compilers)
  • to be on the safe side, do not instrument most of the inline and static functions (plus some specific non-static functions)

collateral code cleanup (no change in functionality)

Location:
kernel/arch/ia32/include
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/ia32/include/asm.h

    re3ee9b9 r7a0359b  
    4141#include <typedefs.h>
    4242#include <config.h>
     43#include <trace.h>
    4344
    4445extern uint32_t interrupt_handler_size;
    4546
    46 extern void paging_on(void);
    47 
    48 extern void interrupt_handlers(void);
    49 
    50 extern void enable_l_apic_in_msr(void);
    51 
    52 
    53 extern void asm_delay_loop(uint32_t t);
    54 extern void asm_fake_loop(uint32_t t);
    55 
    56 
    5747/** Halt CPU
    5848 *
    … …  
    6050 *
    6151 */
    62 static inline __attribute__((noreturn)) void cpu_halt(void)
     52NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void)
    6353{
    6454        while (true) {
    … …  
    6959}
    7060
    71 static inline void cpu_sleep(void)
    72 {
    73         asm volatile ("hlt\n");
    74 }
    75 
    76 #define GEN_READ_REG(reg) static inline unative_t read_ ##reg (void) \
     61NO_TRACE static inline void cpu_sleep(void)
     62{
     63        asm volatile (
     64                "hlt\n"
     65        );
     66}
     67
     68#define GEN_READ_REG(reg) NO_TRACE static inline unative_t read_ ##reg (void) \
    7769        { \
    7870                unative_t res; \
    … …  
    8476        }
    8577
    86 #define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \
     78#define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (unative_t regn) \
    8779        { \
    8880                asm volatile ( \
    … …  
    119111 *
    120112 */
    121 static inline void pio_write_8(ioport8_t *port, uint8_t val)
     113NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val)
    122114{
    123115        asm volatile (
    124116                "outb %b[val], %w[port]\n"
    125                 :: [val] "a" (val), [port] "d" (port)
     117                :: [val] "a" (val),
     118                   [port] "d" (port)
    126119        );
    127120}
    … …  
    135128 *
    136129 */
    137 static inline void pio_write_16(ioport16_t *port, uint16_t val)
     130NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val)
    138131{
    139132        asm volatile (
    140133                "outw %w[val], %w[port]\n"
    141                 :: [val] "a" (val), [port] "d" (port)
     134                :: [val] "a" (val),
     135                   [port] "d" (port)
    142136        );
    143137}
    … …  
    151145 *
    152146 */
    153 static inline void pio_write_32(ioport32_t *port, uint32_t val)
     147NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val)
    154148{
    155149        asm volatile (
    156150                "outl %[val], %w[port]\n"
    157                 :: [val] "a" (val), [port] "d" (port)
     151                :: [val] "a" (val),
     152                   [port] "d" (port)
    158153        );
    159154}
    … …  
    167162 *
    168163 */
    169 static inline uint8_t pio_read_8(ioport8_t *port)
     164NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
    170165{
    171166        uint8_t val;
    … …  
    188183 *
    189184 */
    190 static inline uint16_t pio_read_16(ioport16_t *port)
     185NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
    191186{
    192187        uint16_t val;
    … …  
    209204 *
    210205 */
    211 static inline uint32_t pio_read_32(ioport32_t *port)
     206NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
    212207{
    213208        uint32_t val;
    … …  
    230225 *
    231226 */
    232 static inline ipl_t interrupts_enable(void)
     227NO_TRACE static inline ipl_t interrupts_enable(void)
    233228{
    234229        ipl_t v;
    … …  
    252247 *
    253248 */
    254 static inline ipl_t interrupts_disable(void)
     249NO_TRACE static inline ipl_t interrupts_disable(void)
    255250{
    256251        ipl_t v;
    … …  
    273268 *
    274269 */
    275 static inline void interrupts_restore(ipl_t ipl)
     270NO_TRACE static inline void interrupts_restore(ipl_t ipl)
    276271{
    277272        asm volatile (
    … …  
    287282 *
    288283 */
    289 static inline ipl_t interrupts_read(void)
     284NO_TRACE static inline ipl_t interrupts_read(void)
    290285{
    291286        ipl_t v;
    … …  
    305300 *
    306301 */
    307 static inline bool interrupts_disabled(void)
     302NO_TRACE static inline bool interrupts_disabled(void)
    308303{
    309304        ipl_t v;
    … …  
    319314
    320315/** Write to MSR */
    321 static inline void write_msr(uint32_t msr, uint64_t value)
     316NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value)
    322317{
    323318        asm volatile (
    324319                "wrmsr"
    325                 :: "c" (msr), "a" ((uint32_t) (value)),
     320                :: "c" (msr),
     321                   "a" ((uint32_t) (value)),
    326322                   "d" ((uint32_t) (value >> 32))
    327323        );
    328324}
    329325
    330 static inline uint64_t read_msr(uint32_t msr)
     326NO_TRACE static inline uint64_t read_msr(uint32_t msr)
    331327{
    332328        uint32_t ax, dx;
    … …  
    334330        asm volatile (
    335331                "rdmsr"
    336                 : "=a" (ax), "=d" (dx)
     332                : "=a" (ax),
     333                  "=d" (dx)
    337334                : "c" (msr)
    338335        );
    … …  
    349346 *
    350347 */
    351 static inline uintptr_t get_stack_base(void)
     348NO_TRACE static inline uintptr_t get_stack_base(void)
    352349{
    353350        uintptr_t v;
    … …  
    367364 *
    368365 */
    369 static inline void invlpg(uintptr_t addr)
     366NO_TRACE static inline void invlpg(uintptr_t addr)
    370367{
    371368        asm volatile (
    … …  
    380377 *
    381378 */
    382 static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
     379NO_TRACE static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
    383380{
    384381        asm volatile (
    … …  
    393390 *
    394391 */
    395 static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
     392NO_TRACE static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
    396393{
    397394        asm volatile (
    … …  
    406403 *
    407404 */
    408 static inline void idtr_load(ptr_16_32_t *idtr_reg)
     405NO_TRACE static inline void idtr_load(ptr_16_32_t *idtr_reg)
    409406{
    410407        asm volatile (
    … …  
    419416 *
    420417 */
    421 static inline void tr_load(uint16_t sel)
     418NO_TRACE static inline void tr_load(uint16_t sel)
    422419{
    423420        asm volatile (
    … …  
    427424}
    428425
     426extern void paging_on(void);
     427extern void interrupt_handlers(void);
     428extern void enable_l_apic_in_msr(void);
     429
     430extern void asm_delay_loop(uint32_t);
     431extern void asm_fake_loop(uint32_t);
     432
    429433#endif
    430434

  • kernel/arch/ia32/include/atomic.h

    re3ee9b9 r7a0359b  
    3939#include <arch/barrier.h>
    4040#include <preemption.h>
     41#include <trace.h>
    4142
    42 static inline void atomic_inc(atomic_t *val)
     43NO_TRACE static inline void atomic_inc(atomic_t *val)
    4344{
    4445#ifdef CONFIG_SMP
    … …  
    5556}
    5657
    57 static inline void atomic_dec(atomic_t *val)
     58NO_TRACE static inline void atomic_dec(atomic_t *val)
    5859{
    5960#ifdef CONFIG_SMP
    … …  
    7071}
    7172
    72 static inline atomic_count_t atomic_postinc(atomic_t *val)
     73NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val)
    7374{
    7475        atomic_count_t r = 1;
    … …  
    8384}
    8485
    85 static inline atomic_count_t atomic_postdec(atomic_t *val)
     86NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val)
    8687{
    8788        atomic_count_t r = -1;
    … …  
    99100#define atomic_predec(val)  (atomic_postdec(val) - 1)
    100101
    101 static inline atomic_count_t test_and_set(atomic_t *val)
     102NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val)
    102103{
    103104        atomic_count_t v = 1;
    … …  
    113114
    114115/** ia32 specific fast spinlock */
    115 static inline void atomic_lock_arch(atomic_t *val)
     116NO_TRACE static inline void atomic_lock_arch(atomic_t *val)
    116117{
    117118        atomic_count_t tmp;

  • kernel/arch/ia32/include/barrier.h

    re3ee9b9 r7a0359b  
    3636#define KERN_ia32_BARRIER_H_
    3737
     38#include <trace.h>
     39
    3840/*
    3941 * NOTE:
    … …  
    5052#define CS_LEAVE_BARRIER()  asm volatile ("" ::: "memory")
    5153
    52 static inline void cpuid_serialization(void)
     54NO_TRACE static inline void cpuid_serialization(void)
    5355{
    5456        asm volatile (

  • kernel/arch/ia32/include/cycle.h

    re3ee9b9 r7a0359b  
    2727 */
    2828
    29 /** @addtogroup ia32   
     29/** @addtogroup ia32
    3030 * @{
    3131 */
    … …  
    3636#define KERN_ia32_CYCLE_H_
    3737
    38 static inline uint64_t get_cycle(void)
     38#include <trace.h>
     39
     40NO_TRACE static inline uint64_t get_cycle(void)
    3941{
    4042        uint64_t v;

  • kernel/arch/ia32/include/interrupt.h

    re3ee9b9 r7a0359b  
    3838#include <typedefs.h>
    3939#include <arch/pm.h>
     40#include <trace.h>
    4041
    41 #define IVT_ITEMS       IDT_ITEMS
    42 #define IVT_FIRST       0
     42#define IVT_ITEMS  IDT_ITEMS
     43#define IVT_FIRST  0
    4344
    44 #define EXC_COUNT       32
    45 #define IRQ_COUNT       16
     45#define EXC_COUNT  32
     46#define IRQ_COUNT  16
    4647
    47 #define IVT_EXCBASE     0
    48 #define IVT_IRQBASE     (IVT_EXCBASE + EXC_COUNT)
    49 #define IVT_FREEBASE    (IVT_IRQBASE + IRQ_COUNT)
     48#define IVT_EXCBASE   0
     49#define IVT_IRQBASE   (IVT_EXCBASE + EXC_COUNT)
     50#define IVT_FREEBASE  (IVT_IRQBASE + IRQ_COUNT)
    5051
    51 #define IRQ_CLK         0
    52 #define IRQ_KBD         1
    53 #define IRQ_PIC1        2
    54 #define IRQ_PIC_SPUR    7
    55 #define IRQ_MOUSE       12
    56 #define IRQ_DP8390      9
     52#define IRQ_CLK       0
     53#define IRQ_KBD       1
     54#define IRQ_PIC1      2
     55#define IRQ_PIC_SPUR  7
     56#define IRQ_MOUSE     12
     57#define IRQ_DP8390    9
    5758
    58 /* this one must have four least significant bits set to ones */
    59 #define VECTOR_APIC_SPUR        (IVT_ITEMS - 1)
     59/* This one must have four least significant bits set to ones */
     60#define VECTOR_APIC_SPUR  (IVT_ITEMS - 1)
    6061
    6162#if (((VECTOR_APIC_SPUR + 1) % 16) || VECTOR_APIC_SPUR >= IVT_ITEMS)
    … …  
    6364#endif
    6465
    65 #define VECTOR_DEBUG                    1
    66 #define VECTOR_CLK                      (IVT_IRQBASE + IRQ_CLK)
    67 #define VECTOR_PIC_SPUR                 (IVT_IRQBASE + IRQ_PIC_SPUR)
    68 #define VECTOR_SYSCALL                  IVT_FREEBASE
    69 #define VECTOR_TLB_SHOOTDOWN_IPI        (IVT_FREEBASE + 1)
    70 #define VECTOR_DEBUG_IPI                (IVT_FREEBASE + 2)
     66#define VECTOR_DEBUG              1
     67#define VECTOR_CLK                (IVT_IRQBASE + IRQ_CLK)
     68#define VECTOR_PIC_SPUR           (IVT_IRQBASE + IRQ_PIC_SPUR)
     69#define VECTOR_SYSCALL            IVT_FREEBASE
     70#define VECTOR_TLB_SHOOTDOWN_IPI  (IVT_FREEBASE + 1)
     71#define VECTOR_DEBUG_IPI          (IVT_FREEBASE + 2)
    7172
    7273typedef struct istate {
    … …  
    7980        uint32_t ebp;
    8081       
    81         uint32_t ebp_frame;     /* imitation of frame pointer linkage */
    82         uint32_t eip_frame;     /* imitation of return address linkage */
    83 
     82        uint32_t ebp_frame;  /* imitation of frame pointer linkage */
     83        uint32_t eip_frame;  /* imitation of return address linkage */
     84       
    8485        uint32_t gs;
    8586        uint32_t fs;
    8687        uint32_t es;
    8788        uint32_t ds;
    88 
    89         uint32_t error_word;    /* real or fake error word */
     89       
     90        uint32_t error_word;  /* real or fake error word */
    9091        uint32_t eip;
    9192        uint32_t cs;
    9293        uint32_t eflags;
    93         uint32_t esp;           /* only if istate_t is from uspace */
    94         uint32_t ss;            /* only if istate_t is from uspace */
     94        uint32_t esp;         /* only if istate_t is from uspace */
     95        uint32_t ss;          /* only if istate_t is from uspace */
    9596} istate_t;
    9697
    9798/** Return true if exception happened while in userspace */
    98 static inline int istate_from_uspace(istate_t *istate)
     99NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    99100{
    100101        return !(istate->eip & 0x80000000);
    101102}
    102103
    103 static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
     104NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
     105    uintptr_t retaddr)
    104106{
    105107        istate->eip = retaddr;
    106108}
    107109
    108 static inline unative_t istate_get_pc(istate_t *istate)
     110NO_TRACE static inline unative_t istate_get_pc(istate_t *istate)
    109111{
    110112        return istate->eip;
    111113}
    112114
    113 static inline unative_t istate_get_fp(istate_t *istate)
     115NO_TRACE static inline unative_t istate_get_fp(istate_t *istate)
    114116{
    115117        return istate->ebp;
    116118}
    117119
    118 extern void (* disable_irqs_function)(uint16_t irqmask);
    119 extern void (* enable_irqs_function)(uint16_t irqmask);
     120extern void (* disable_irqs_function)(uint16_t);
     121extern void (* enable_irqs_function)(uint16_t);
    120122extern void (* eoi_function)(void);
    121123
    122124extern void interrupt_init(void);
    123 extern void trap_virtual_enable_irqs(uint16_t irqmask);
    124 extern void trap_virtual_disable_irqs(uint16_t irqmask);
     125extern void trap_virtual_enable_irqs(uint16_t);
     126extern void trap_virtual_disable_irqs(uint16_t);
    125127
    126128#endif

  • kernel/arch/ia32/include/mm/page.h

    re3ee9b9 r7a0359b  
    3737
    3838#include <arch/mm/frame.h>
     39#include <trace.h>
    3940
    4041#define PAGE_WIDTH      FRAME_WIDTH
    … …  
    161162} __attribute__ ((packed)) pte_t;
    162163
    163 static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
     164NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
    164165{
    165166        pte_t *p = &pt[i];
    … …  
    174175}
    175176
    176 static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
     177NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
    177178{
    178179        pte_t *p = &pt[i];
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