Changeset 76cec1e in mainline for arch/ia32/src/drivers
- Timestamp:
- 2005-07-15T21:57:30Z (21 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- b4a4c5e3
- Parents:
- e41c47e
- Location:
- arch/ia32/src/drivers
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia32/src/drivers/ega.c
re41c47e r76cec1e 70 70 { 71 71 if (ega_cursor < SCREEN) 72 return;72 return; 73 73 74 74 memcopy(PA2KA(VIDEORAM) + ROW*2, PA2KA(VIDEORAM), (SCREEN - ROW)*2); … … 86 86 switch (ch) { 87 87 case '\n': 88 ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;89 break;88 ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW; 89 break; 90 90 case '\t': 91 ega_cursor = (ega_cursor + 8) - ega_cursor % 8;92 break;91 ega_cursor = (ega_cursor + 8) - ega_cursor % 8; 92 break; 93 93 default: 94 ega_display_char(ch);95 ega_cursor++;96 break;94 ega_display_char(ch); 95 ega_cursor++; 96 break; 97 97 } 98 98 ega_check_cursor(); 99 99 ega_move_cursor(); 100 100 101 101 spinlock_unlock(&egalock); 102 102 cpu_priority_restore(pri); -
arch/ia32/src/drivers/i8254.c
re41c47e r76cec1e 84 84 85 85 do { 86 /* will read both status and count */86 /* will read both status and count */ 87 87 outb(CLK_PORT4, 0xc2); 88 88 not_ok = (inb(CLK_PORT1)>>6)&1; … … 110 110 o2 |= inb(CLK_PORT1) << 8; 111 111 112 113 CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + 114 (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0); 115 112 CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0); 116 113 117 114 clk1 = rdtsc(); -
arch/ia32/src/drivers/i8259.c
re41c47e r76cec1e 45 45 /* ICW2: IRQ 0 maps to INT IRQBASE */ 46 46 outb(PIC_PIC0PORT2, IVT_IRQBASE); 47 47 48 48 /* ICW3: pic1 using IRQ IRQ_PIC1 */ 49 49 outb(PIC_PIC0PORT2, 1 << IRQ_PIC1); 50 51 /* ICW4: i8086 mode */ 50 51 /* ICW4: i8086 mode */ 52 52 outb(PIC_PIC0PORT2, 1); 53 53 … … 55 55 outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4); 56 56 57 /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */ 57 /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */ 58 58 outb(PIC_PIC1PORT2, IVT_IRQBASE + 8); 59 59 … … 61 61 outb(PIC_PIC1PORT2, PIC_PIC1ID); 62 62 63 /* ICW4: i8086 mode */ 63 /* ICW4: i8086 mode */ 64 64 outb(PIC_PIC1PORT2, 1); 65 65 … … 76 76 disable_irqs_function = pic_disable_irqs; 77 77 eoi_function = pic_eoi; 78 78 79 79 pic_disable_irqs(0xffff); /* disable all irq's */ 80 80 pic_enable_irqs(1<<IRQ_PIC1); /* but enable pic1 */ … … 84 84 { 85 85 __u8 x; 86 86 87 87 if (irqmask & 0xff) { 88 x = inb(PIC_PIC0PORT2);88 x = inb(PIC_PIC0PORT2); 89 89 outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff))); 90 90 } 91 91 if (irqmask >> 8) { 92 x = inb(PIC_PIC1PORT2);92 x = inb(PIC_PIC1PORT2); 93 93 outb(PIC_PIC1PORT2, x & (~(irqmask >> 8))); 94 94 } … … 98 98 { 99 99 __u8 x; 100 100 101 101 if (irqmask & 0xff) { 102 x = inb(PIC_PIC0PORT2);102 x = inb(PIC_PIC0PORT2); 103 103 outb(PIC_PIC0PORT2, x | (irqmask & 0xff)); 104 104 } 105 105 if (irqmask >> 8) { 106 x = inb(PIC_PIC1PORT2);106 x = inb(PIC_PIC1PORT2); 107 107 outb(PIC_PIC1PORT2, x | (irqmask >> 8)); 108 108 } … … 112 112 { 113 113 outb(0x20,0x20); 114 outb(0xa0,0x20);114 outb(0xa0,0x20); 115 115 } 116 116
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