Index: kernel/arch/ia64/include/arch.h =================================================================== --- kernel/arch/ia64/include/arch.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,43 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ARCH_H_ -#define KERN_ia64_ARCH_H_ - -extern void arch_pre_main(void); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/arch/arch.h =================================================================== --- kernel/arch/ia64/include/arch/arch.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/arch.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ARCH_H_ +#define KERN_ia64_ARCH_H_ + +extern void arch_pre_main(void); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/asm.h =================================================================== --- kernel/arch/ia64/include/arch/asm.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/asm.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,492 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ASM_H_ +#define KERN_ia64_ASM_H_ + +#include +#include +#include +#include +#include + +#define IO_SPACE_BOUNDARY ((void *) (64 * 1024)) + +/** Map the I/O port address to a legacy I/O address. */ +NO_TRACE static inline uintptr_t p2a(volatile void *p) +{ + uintptr_t prt = (uintptr_t) p; + + return legacyio_virt_base + (((prt >> 2) << 12) | (prt & 0xfff)); +} + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) +{ + if (port < (ioport8_t *) IO_SPACE_BOUNDARY) + *((ioport8_t *) p2a(port)) = v; + else + *port = v; + + asm volatile ( + "mf\n" + "mf.a\n" + ::: "memory" + ); +} + +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) +{ + if (port < (ioport16_t *) IO_SPACE_BOUNDARY) + *((ioport16_t *) p2a(port)) = v; + else + *port = v; + + asm volatile ( + "mf\n" + "mf.a\n" + ::: "memory" + ); +} + +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) +{ + if (port < (ioport32_t *) IO_SPACE_BOUNDARY) + *((ioport32_t *) p2a(port)) = v; + else + *port = v; + + asm volatile ( + "mf\n" + "mf.a\n" + ::: "memory" + ); +} + +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + uint8_t v; + + asm volatile ( + "mf\n" + ::: "memory" + ); + + if (port < (ioport8_t *) IO_SPACE_BOUNDARY) + v = *((ioport8_t *) p2a(port)); + else + v = *port; + + asm volatile ( + "mf.a\n" + ::: "memory" + ); + + return v; +} + +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + uint16_t v; + + asm volatile ( + "mf\n" + ::: "memory" + ); + + if (port < (ioport16_t *) IO_SPACE_BOUNDARY) + v = *((ioport16_t *) p2a(port)); + else + v = *port; + + asm volatile ( + "mf.a\n" + ::: "memory" + ); + + return v; +} + +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + uint32_t v; + + asm volatile ( + "mf\n" + ::: "memory" + ); + + if (port < (ioport32_t *) IO_SPACE_BOUNDARY) + v = *((ioport32_t *) p2a(port)); + else + v = *port; + + asm volatile ( + "mf.a\n" + ::: "memory" + ); + + return v; +} + +/** Return base address of current memory stack. + * + * The memory stack is assumed to be STACK_SIZE / 2 long. Note that there is + * also the RSE stack, which takes up the upper half of STACK_SIZE. + * The memory stack must start on page boundary. + */ +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uint64_t value; + + asm volatile ( + "mov %[value] = r12" + : [value] "=r" (value) + ); + + return (value & (~(STACK_SIZE / 2 - 1))); +} + +/** Return Processor State Register. + * + * @return PSR. + * + */ +NO_TRACE static inline uint64_t psr_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = psr\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Read IVA (Interruption Vector Address). + * + * @return Return location of interruption vector table. + * + */ +NO_TRACE static inline uint64_t iva_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr.iva\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Write IVA (Interruption Vector Address) register. + * + * @param v New location of interruption vector table. + * + */ +NO_TRACE static inline void iva_write(uint64_t v) +{ + asm volatile ( + "mov cr.iva = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Read IVR (External Interrupt Vector Register). + * + * @return Highest priority, pending, unmasked external + * interrupt vector. + * + */ +NO_TRACE static inline uint64_t ivr_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr.ivr\n" + : [value] "=r" (v) + ); + + return v; +} + +NO_TRACE static inline uint64_t cr64_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr64\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Write ITC (Interval Timer Counter) register. + * + * @param v New counter value. + * + */ +NO_TRACE static inline void itc_write(uint64_t v) +{ + asm volatile ( + "mov ar.itc = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Read ITC (Interval Timer Counter) register. + * + * @return Current counter value. + * + */ +NO_TRACE static inline uint64_t itc_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = ar.itc\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Write ITM (Interval Timer Match) register. + * + * @param v New match value. + * + */ +NO_TRACE static inline void itm_write(uint64_t v) +{ + asm volatile ( + "mov cr.itm = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Read ITM (Interval Timer Match) register. + * + * @return Match value. + * + */ +NO_TRACE static inline uint64_t itm_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr.itm\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Read ITV (Interval Timer Vector) register. + * + * @return Current vector and mask bit. + * + */ +NO_TRACE static inline uint64_t itv_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr.itv\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Write ITV (Interval Timer Vector) register. + * + * @param v New vector and mask bit. + * + */ +NO_TRACE static inline void itv_write(uint64_t v) +{ + asm volatile ( + "mov cr.itv = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Write EOI (End Of Interrupt) register. + * + * @param v This value is ignored. + * + */ +NO_TRACE static inline void eoi_write(uint64_t v) +{ + asm volatile ( + "mov cr.eoi = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Read TPR (Task Priority Register). + * + * @return Current value of TPR. + * + */ +NO_TRACE static inline uint64_t tpr_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr.tpr\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Write TPR (Task Priority Register). + * + * @param v New value of TPR. + * + */ +NO_TRACE static inline void tpr_write(uint64_t v) +{ + asm volatile ( + "mov cr.tpr = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Disable interrupts. + * + * Disable interrupts and return previous + * value of PSR. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static ipl_t interrupts_disable(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = psr\n" + "rsm %[mask]\n" + : [value] "=r" (v) + : [mask] "i" (PSR_I_MASK) + ); + + return (ipl_t) v; +} + +/** Enable interrupts. + * + * Enable interrupts and return previous + * value of PSR. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static ipl_t interrupts_enable(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = psr\n" + "ssm %[mask]\n" + ";;\n" + "srlz.d\n" + : [value] "=r" (v) + : [mask] "i" (PSR_I_MASK) + ); + + return (ipl_t) v; +} + +/** Restore interrupt priority level. + * + * Restore PSR. + * + * @param ipl Saved interrupt priority level. + * + */ +NO_TRACE static inline void interrupts_restore(ipl_t ipl) +{ + if (ipl & PSR_I_MASK) + (void) interrupts_enable(); + else + (void) interrupts_disable(); +} + +/** Return interrupt priority level. + * + * @return PSR. + * + */ +NO_TRACE static inline ipl_t interrupts_read(void) +{ + return (ipl_t) psr_read(); +} + +/** Check interrupts state. + * + * @return True if interrupts are disabled. + * + */ +NO_TRACE static inline bool interrupts_disabled(void) +{ + return !(psr_read() & PSR_I_MASK); +} + +/** Disable protection key checking. */ +NO_TRACE static inline void pk_disable(void) +{ + asm volatile ( + "rsm %[mask]\n" + ";;\n" + "srlz.d\n" + :: [mask] "i" (PSR_PK_MASK) + ); +} + +extern void cpu_halt(void) __attribute__((noreturn)); +extern void cpu_sleep(void); +extern void asm_delay_loop(uint32_t t); + +extern void switch_to_userspace(uintptr_t, uintptr_t, uintptr_t, uintptr_t, + uint64_t, uint64_t); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/atomic.h =================================================================== --- kernel/arch/ia64/include/arch/atomic.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/atomic.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,138 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ATOMIC_H_ +#define KERN_ia64_ATOMIC_H_ + +#include + +NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "movl %[v] = 0x1;;\n" + "xchg8 %[v] = %[count], %[v];;\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); + + return v; +} + +NO_TRACE static inline void atomic_lock_arch(atomic_t *val) +{ + do { + while (val->count); + } while (test_and_set(val)); +} + +NO_TRACE static inline void atomic_inc(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], 1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); +} + +NO_TRACE static inline void atomic_dec(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], -1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); +} + +NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], 1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); + + return (v + 1); +} + +NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], -1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); + + return (v - 1); +} + +NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], 1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); + + return v; +} + +NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], -1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); + + return v; +} + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/barrier.h =================================================================== --- kernel/arch/ia64/include/arch/barrier.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/barrier.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_BARRIER_H_ +#define KERN_ia64_BARRIER_H_ + +/* + * TODO: Implement true IA-64 memory barriers for macros below. + */ +#define CS_ENTER_BARRIER() memory_barrier() +#define CS_LEAVE_BARRIER() memory_barrier() + +#define memory_barrier() asm volatile ("mf\n" ::: "memory") +#define read_barrier() memory_barrier() +#define write_barrier() memory_barrier() + +#define srlz_i() \ + asm volatile (";; srlz.i ;;\n" ::: "memory") +#define srlz_d() \ + asm volatile (";; srlz.d\n" ::: "memory") + +#define fc_i(a) \ + asm volatile ("fc.i %0\n" :: "r" ((a)) : "memory") +#define sync_i() \ + asm volatile (";; sync.i\n" ::: "memory") + +#define smc_coherence(a) \ +{ \ + fc_i((a)); \ + sync_i(); \ + srlz_i(); \ +} + +#define FC_INVAL_MIN 32 +#define smc_coherence_block(a, l) \ +{ \ + unsigned long i; \ + for (i = 0; i < (l); i += FC_INVAL_MIN) \ + fc_i((void *)(a) + i); \ + sync_i(); \ + srlz_i(); \ +} + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/bootinfo.h =================================================================== --- kernel/arch/ia64/include/arch/bootinfo.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/bootinfo.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_ia64_BOOTINFO_H_ +#define KERN_ia64_BOOTINFO_H_ + +#define TASKMAP_MAX_RECORDS 32 + +#define MEMMAP_ITEMS 128 + +#define MEMMAP_FREE_MEM 0 + +/** Size of buffer for storing task name in binit_task_t. */ +#define BOOTINFO_TASK_NAME_BUFLEN 32 + +typedef struct { + void *addr; + size_t size; + char name[BOOTINFO_TASK_NAME_BUFLEN]; +} binit_task_t; + +typedef struct { + size_t cnt; + binit_task_t tasks[TASKMAP_MAX_RECORDS]; +} binit_t; + +typedef struct { + unsigned int type; + unsigned long base; + unsigned long size; +} memmap_item_t; + +typedef struct { + binit_t taskmap; + + memmap_item_t memmap[MEMMAP_ITEMS]; + unsigned int memmap_items; + + sysarg_t *sapic; + unsigned long sys_freq; + unsigned long freq_scale; + unsigned int wakeup_intno; +} bootinfo_t; + +extern bootinfo_t *bootinfo; + +#endif Index: kernel/arch/ia64/include/arch/context.h =================================================================== --- kernel/arch/ia64/include/arch/context.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/context.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_CONTEXT_H_ +#define KERN_ia64_CONTEXT_H_ + +#include +#include +#include +#include + +/* + * context_save_arch() and context_restore_arch() are both leaf procedures. + * No need to allocate scratch area. + * + * One item is put onto the stack to support get_stack_base(). + */ +#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) + +/* RSE stack starts at the bottom of memory stack, hence the division by 2. */ +#define context_set(c, _pc, stack, size) \ + do { \ + (c)->pc = (uintptr_t) _pc; \ + (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size / 2), REGISTER_STACK_ALIGNMENT); \ + (c)->ar_pfs &= PFM_MASK; \ + (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size / 2), STACK_ALIGNMENT) - SP_DELTA; \ + } while (0) + +/* + * Only save registers that must be preserved across + * function calls. + */ +typedef struct { + + /* + * Application registers + */ + uint64_t ar_pfs; + uint64_t ar_unat_caller; + uint64_t ar_unat_callee; + uint64_t ar_rsc; + uintptr_t bsp; /* ar_bsp */ + uint64_t ar_rnat; + uint64_t ar_lc; + + /* + * General registers + */ + uint64_t r1; + uint64_t r4; + uint64_t r5; + uint64_t r6; + uint64_t r7; + uintptr_t sp; /* r12 */ + uint64_t r13; + + /* + * Branch registers + */ + uintptr_t pc; /* b0 */ + uint64_t b1; + uint64_t b2; + uint64_t b3; + uint64_t b4; + uint64_t b5; + + /* + * Predicate registers + */ + uint64_t pr; + + uint128_t f2 __attribute__ ((aligned(16))); + uint128_t f3; + uint128_t f4; + uint128_t f5; + + uint128_t f16; + uint128_t f17; + uint128_t f18; + uint128_t f19; + uint128_t f20; + uint128_t f21; + uint128_t f22; + uint128_t f23; + uint128_t f24; + uint128_t f25; + uint128_t f26; + uint128_t f27; + uint128_t f28; + uint128_t f29; + uint128_t f30; + uint128_t f31; + + ipl_t ipl; +} context_t; + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/cpu.h =================================================================== --- kernel/arch/ia64/include/arch/cpu.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/cpu.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_CPU_H_ +#define KERN_ia64_CPU_H_ + +#include +#include +#include +#include +#include + +#define FAMILY_ITANIUM 0x7 +#define FAMILY_ITANIUM2 0x1f + +#define CR64_ID_SHIFT 24 +#define CR64_ID_MASK 0xff000000 +#define CR64_EID_SHIFT 16 +#define CR64_EID_MASK 0xff0000 + +typedef struct { + uint64_t cpuid0; + uint64_t cpuid1; + cpuid3_t cpuid3; +} cpu_arch_t; + +/** Read CPUID register. + * + * @param n CPUID register number. + * + * @return Value of CPUID[n] register. + * + */ +NO_TRACE static inline uint64_t cpuid_read(int n) +{ + uint64_t v; + + asm volatile ( + "mov %[v] = cpuid[%[r]]\n" + : [v] "=r" (v) + : [r] "r" (n) + ); + + return v; +} + +NO_TRACE static inline int ia64_get_cpu_id(void) +{ + uint64_t cr64 = cr64_read(); + return ((CR64_ID_MASK) &cr64) >> CR64_ID_SHIFT; +} + +NO_TRACE static inline int ia64_get_cpu_eid(void) +{ + uint64_t cr64 = cr64_read(); + return ((CR64_EID_MASK) &cr64) >> CR64_EID_SHIFT; +} + +NO_TRACE static inline void ipi_send_ipi(int id, int eid, int intno) +{ + (bootinfo->sapic)[2 * (id * 256 + eid)] = intno; + srlz_d(); +} + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/cycle.h =================================================================== --- kernel/arch/ia64/include/arch/cycle.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/cycle.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_CYCLE_H_ +#define KERN_ia64_CYCLE_H_ + +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ + return 0; +} + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/drivers/it.h =================================================================== --- kernel/arch/ia64/include/arch/drivers/it.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/drivers/it.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_IT_H_ +#define KERN_ia64_IT_H_ + +/* + * Unfortunately, Ski does not emulate PAL, + * so we can't read the real frequency ratios + * from firmware. + * + */ +#define IT_DELTA it_delta + +extern void it_init(void); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/drivers/kbd.h =================================================================== --- kernel/arch/ia64/include/arch/drivers/kbd.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/drivers/kbd.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2006 Jakub Jermar, Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia6464 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_KBD_H_ +#define KERN_ia64_KBD_H_ + +#define KBD_UNKNOWN 0 +#define KBD_SKI 1 +#define KBD_LEGACY 2 +#define KBD_NS16550 3 + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/drivers/ski.h =================================================================== --- kernel/arch/ia64/include/arch/drivers/ski.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/drivers/ski.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_SKI_H_ +#define KERN_ia64_SKI_H_ + +#include +#include + +typedef struct { + thread_t *thread; + indev_t *srlnin; +} ski_instance_t; + +extern outdev_t *skiout_init(void); + +extern ski_instance_t *skiin_init(void); +extern void skiin_wire(ski_instance_t *, indev_t *); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/elf.h =================================================================== --- kernel/arch/ia64/include/arch/elf.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/elf.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ELF_H_ +#define KERN_ia64_ELF_H_ + +#define ELF_MACHINE EM_IA_64 +#define ELF_DATA_ENCODING ELFDATA2LSB +#define ELF_CLASS ELFCLASS64 + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/faddr.h =================================================================== --- kernel/arch/ia64/include/arch/faddr.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/faddr.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_FADDR_H_ +#define KERN_ia64_FADDR_H_ + +#include + +/** + * + * Calculate absolute address of function + * referenced by fptr pointer. + * + * @param fptr Function pointer. + * + */ +#define FADDR(fptr) (((fncptr_t *) (fptr))->fnc) + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/fpu_context.h =================================================================== --- kernel/arch/ia64/include/arch/fpu_context.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/fpu_context.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2005 Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_FPU_CONTEXT_H_ +#define KERN_ia64_FPU_CONTEXT_H_ + +#define FPU_CONTEXT_ALIGN 16 + +#include + +#define FRS 96 + +typedef struct { + uint128_t fr[FRS]; +} fpu_context_t; + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/interrupt.h =================================================================== --- kernel/arch/ia64/include/arch/interrupt.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/interrupt.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_INTERRUPT_H_ +#define KERN_ia64_INTERRUPT_H_ + +#include +#include + +/** ia64 has 256 INRs. */ +#define INR_COUNT 256 + +/* + * We need to keep this just to compile. + * We might eventually move interrupt/ stuff + * to genarch. + */ +#define IVT_ITEMS 0 +#define IVT_FIRST 0 + +/** External Interrupt vectors. */ + +#define VECTOR_TLB_SHOOTDOWN_IPI 0xf0 + +#define INTERRUPT_SPURIOUS 15 +#define INTERRUPT_TIMER 255 + +#define LEGACY_INTERRUPT_BASE 0x20 + +#define IRQ_KBD (0x01 + LEGACY_INTERRUPT_BASE) +#define IRQ_MOUSE (0x0c + LEGACY_INTERRUPT_BASE) + +/** General Exception codes. */ +#define GE_ILLEGALOP 0 +#define GE_PRIVOP 1 +#define GE_PRIVREG 2 +#define GE_RESREGFLD 3 +#define GE_DISBLDISTRAN 4 +#define GE_ILLEGALDEP 8 + +#define EOI 0 /**< The actual value doesn't matter. */ + +extern void *ivt; + +extern void general_exception(uint64_t, istate_t *); +extern int break_instruction(uint64_t, istate_t *); +extern void universal_handler(uint64_t, istate_t *); +extern void nop_handler(uint64_t, istate_t *); +extern void external_interrupt(uint64_t, istate_t *); +extern void disabled_fp_register(uint64_t, istate_t *); + +extern void trap_virtual_enable_irqs(uint16_t); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/istate.h =================================================================== --- kernel/arch/ia64/include/arch/istate.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/istate.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,137 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ISTATE_H_ +#define KERN_ia64_ISTATE_H_ + +#include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +typedef struct istate { + uint128_t f2; + uint128_t f3; + uint128_t f4; + uint128_t f5; + uint128_t f6; + uint128_t f7; + uint128_t f8; + uint128_t f9; + uint128_t f10; + uint128_t f11; + uint128_t f12; + uint128_t f13; + uint128_t f14; + uint128_t f15; + uint128_t f16; + uint128_t f17; + uint128_t f18; + uint128_t f19; + uint128_t f20; + uint128_t f21; + uint128_t f22; + uint128_t f23; + uint128_t f24; + uint128_t f25; + uint128_t f26; + uint128_t f27; + uint128_t f28; + uint128_t f29; + uint128_t f30; + uint128_t f31; + + uintptr_t ar_bsp; + uintptr_t ar_bspstore; + uintptr_t ar_bspstore_new; + uint64_t ar_rnat; + uint64_t ar_ifs; + uint64_t ar_pfs; + uint64_t ar_rsc; + uintptr_t cr_ifa; + cr_isr_t cr_isr; + uintptr_t cr_iipa; + psr_t cr_ipsr; + uintptr_t cr_iip; + uint64_t pr; + uintptr_t sp; + + /* + * The following variables are defined only for break_instruction + * handler. + */ + uint64_t in0; + uint64_t in1; + uint64_t in2; + uint64_t in3; + uint64_t in4; + uint64_t in5; + uint64_t in6; +} istate_t; + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->cr_iip = retaddr; + istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */ +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + return istate->cr_iip; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + /* FIXME */ + + return 0; +} + +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return (istate->cr_iip) < 0xe000000000000000ULL; +} + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/legacyio.h =================================================================== --- kernel/arch/ia64/include/arch/legacyio.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/legacyio.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_LEGACYIO_H_ +#define KERN_ia64_LEGACYIO_H_ + +#include + +#define LEGACYIO_PHYS_BASE 0x00000FFFFC000000ULL + +/* Legacy I/O space - static uspace address, FIXME */ +#define LEGACYIO_USER_BASE 0x0001000000000000ULL + +#define LEGACYIO_PAGE_WIDTH 26 /* 64M */ +#define LEGACYIO_SINGLE_PAGE_WIDTH 12 /* 4K */ + +#define LEGACYIO_SIZE (1ULL << LEGACYIO_PAGE_WIDTH) + +extern uintptr_t legacyio_virt_base; + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/as.h =================================================================== --- kernel/arch/ia64/include/arch/mm/as.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/mm/as.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_AS_H_ +#define KERN_ia64_AS_H_ + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0xe000000000000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT64_C(0xdfffffffffffffff) + +#define USTACK_ADDRESS_ARCH UINT64_C(0x0000000ff0000000) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/asid.h =================================================================== --- kernel/arch/ia64/include/arch/mm/asid.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/mm/asid.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ASID_H_ +#define KERN_ia64_ASID_H_ + +#ifndef __ASM__ + +#include + +typedef uint16_t asid_t; +typedef uint32_t rid_t; + +#endif /* __ASM__ */ + +/** + * Number of ia64 RIDs (Region Identifiers) per kernel ASID. + * Note that some architectures may support more bits, + * but those extra bits are not used by the kernel. + */ +#define RIDS_PER_ASID 8 + +#define RID_MAX 262143 /* 2^18 - 1 */ +#define RID_KERNEL7 7 + +#define ASID2RID(asid, vrn) \ + ((asid) * RIDS_PER_ASID + (vrn)) + +#define RID2ASID(rid) \ + ((rid) / RIDS_PER_ASID) + +#define ASID_MAX_ARCH (RID_MAX / RIDS_PER_ASID) + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/frame.h =================================================================== --- kernel/arch/ia64/include/arch/mm/frame.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/mm/frame.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_FRAME_H_ +#define KERN_ia64_FRAME_H_ + +#define FRAME_WIDTH 14 /* 16K */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +#include + +extern uintptr_t end_of_identity; + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +#define physmem_print() + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/km.h =================================================================== --- kernel/arch/ia64/include/arch/mm/km.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/mm/km.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_KM_H_ +#define KERN_ia64_KM_H_ + +#include + +/* + * Be conservative and assume the minimal (3 + 51)-bit virtual address width + * of the Itanium CPU even if running on CPU with full 64-bit virtual + * address width, such as Itanium 2. + */ + +#define KM_IA64_IDENTITY_START UINT64_C(0xe000000000000000) +#define KM_IA64_IDENTITY_SIZE UINT64_C(0x0004000000000000) + +#define KM_IA64_NON_IDENTITY_START UINT64_C(0xfffc000000000000) +#define KM_IA64_NON_IDENTITY_SIZE UINT64_C(0x0004000000000000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/page.h =================================================================== --- kernel/arch/ia64/include/arch/mm/page.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/mm/page.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,300 @@ +/* + * Copyright (c) 2005 - 2006 Jakub Jermar + * Copyright (c) 2006 Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_PAGE_H_ +#define KERN_ia64_PAGE_H_ + +#include + +#define PAGE_SIZE FRAME_SIZE +#define PAGE_WIDTH FRAME_WIDTH + +/** Bit width of the TLB-locked portion of kernel address space. */ +#define KERNEL_PAGE_WIDTH 28 /* 256M */ + +#define PPN_SHIFT 12 + +#define VRN_SHIFT 61 +#define VRN_MASK (7ULL << VRN_SHIFT) +#define VA2VRN(va) ((va) >> VRN_SHIFT) + +#ifdef __ASM__ + #define VRN_KERNEL 7 +#else + #define VRN_KERNEL 7ULL +#endif + +#define REGION_REGISTERS 8 + +#define KA2PA(x) ((uintptr_t) ((x) - (VRN_KERNEL << VRN_SHIFT))) +#define PA2KA(x) ((uintptr_t) ((x) + (VRN_KERNEL << VRN_SHIFT))) + +#define VHPT_WIDTH 20 /* 1M */ +#define VHPT_SIZE (1 << VHPT_WIDTH) + +#define PTA_BASE_SHIFT 15 + +/** Memory Attributes. */ +#define MA_WRITEBACK 0x00 +#define MA_UNCACHEABLE 0x04 + +/** Privilege Levels. Only the most and the least privileged ones are ever used. */ +#define PL_KERNEL 0x00 +#define PL_USER 0x03 + +/* Access Rigths. Only certain combinations are used by the kernel. */ +#define AR_READ 0x00 +#define AR_EXECUTE 0x01 +#define AR_WRITE 0x02 + +#ifndef __ASM__ + +#include +#include +#include +#include +#include +#include +#include + +struct vhpt_tag_info { + unsigned long long tag : 63; + unsigned int ti : 1; +} __attribute__ ((packed)); + +union vhpt_tag { + struct vhpt_tag_info tag_info; + unsigned tag_word; +}; + +struct vhpt_entry_present { + /* Word 0 */ + unsigned int p : 1; + unsigned int : 1; + unsigned int ma : 3; + unsigned int a : 1; + unsigned int d : 1; + unsigned int pl : 2; + unsigned int ar : 3; + unsigned long long ppn : 38; + unsigned int : 2; + unsigned int ed : 1; + unsigned int ig1 : 11; + + /* Word 1 */ + unsigned int : 2; + unsigned int ps : 6; + unsigned int key : 24; + unsigned int : 32; + + /* Word 2 */ + union vhpt_tag tag; + + /* Word 3 */ + uint64_t ig3 : 64; +} __attribute__ ((packed)); + +struct vhpt_entry_not_present { + /* Word 0 */ + unsigned int p : 1; + unsigned long long ig0 : 52; + unsigned int ig1 : 11; + + /* Word 1 */ + unsigned int : 2; + unsigned int ps : 6; + unsigned long long ig2 : 56; + + /* Word 2 */ + union vhpt_tag tag; + + /* Word 3 */ + uint64_t ig3 : 64; +} __attribute__ ((packed)); + +typedef union { + struct vhpt_entry_present present; + struct vhpt_entry_not_present not_present; + uint64_t word[4]; +} vhpt_entry_t; + +struct region_register_map { + unsigned int ve : 1; + unsigned int : 1; + unsigned int ps : 6; + unsigned int rid : 24; + unsigned int : 32; +} __attribute__ ((packed)); + +typedef union { + struct region_register_map map; + unsigned long long word; +} region_register_t; + +struct pta_register_map { + unsigned int ve : 1; + unsigned int : 1; + unsigned int size : 6; + unsigned int vf : 1; + unsigned int : 6; + unsigned long long base : 49; +} __attribute__ ((packed)); + +typedef union pta_register { + struct pta_register_map map; + uint64_t word; +} pta_register_t; + +/** Return Translation Hashed Entry Address. + * + * VRN bits are used to read RID (ASID) from one + * of the eight region registers registers. + * + * @param va Virtual address including VRN bits. + * + * @return Address of the head of VHPT collision chain. + */ +NO_TRACE static inline uint64_t thash(uint64_t va) +{ + uint64_t ret; + + asm volatile ( + "thash %[ret] = %[va]\n" + : [ret] "=r" (ret) + : [va] "r" (va) + ); + + return ret; +} + +/** Return Translation Hashed Entry Tag. + * + * VRN bits are used to read RID (ASID) from one + * of the eight region registers. + * + * @param va Virtual address including VRN bits. + * + * @return The unique tag for VPN and RID in the collision chain returned by thash(). + */ +NO_TRACE static inline uint64_t ttag(uint64_t va) +{ + uint64_t ret; + + asm volatile ( + "ttag %[ret] = %[va]\n" + : [ret] "=r" (ret) + : [va] "r" (va) + ); + + return ret; +} + +/** Read Region Register. + * + * @param i Region register index. + * + * @return Current contents of rr[i]. + */ +NO_TRACE static inline uint64_t rr_read(size_t i) +{ + uint64_t ret; + + ASSERT(i < REGION_REGISTERS); + + asm volatile ( + "mov %[ret] = rr[%[index]]\n" + : [ret] "=r" (ret) + : [index] "r" (i << VRN_SHIFT) + ); + + return ret; +} + +/** Write Region Register. + * + * @param i Region register index. + * @param v Value to be written to rr[i]. + */ +NO_TRACE static inline void rr_write(size_t i, uint64_t v) +{ + ASSERT(i < REGION_REGISTERS); + + asm volatile ( + "mov rr[%[index]] = %[value]\n" + :: [index] "r" (i << VRN_SHIFT), + [value] "r" (v) + ); +} + +/** Read Page Table Register. + * + * @return Current value stored in PTA. + */ +NO_TRACE static inline uint64_t pta_read(void) +{ + uint64_t ret; + + asm volatile ( + "mov %[ret] = cr.pta\n" + : [ret] "=r" (ret) + ); + + return ret; +} + +/** Write Page Table Register. + * + * @param v New value to be stored in PTA. + */ +NO_TRACE static inline void pta_write(uint64_t v) +{ + asm volatile ( + "mov cr.pta = %[value]\n" + :: [value] "r" (v) + ); +} + +extern void page_arch_init(void); + +extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid); +extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v); +extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/tlb.h =================================================================== --- kernel/arch/ia64/include/arch/mm/tlb.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/mm/tlb.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_TLB_H_ +#define KERN_ia64_TLB_H_ + +#include +#include +#include +#include + +/** Data and instruction Translation Register indices. */ +#define DTR_KERNEL 0 +#define ITR_KERNEL 0 +#define DTR_KSTACK1 4 +#define DTR_KSTACK2 5 + +/** Portion of TLB insertion format data structure. */ +typedef union { + uint64_t word[2]; + struct { + /* Word 0 */ + unsigned int p : 1; /**< Present. */ + unsigned int : 1; + unsigned int ma : 3; /**< Memory attribute. */ + unsigned int a : 1; /**< Accessed. */ + unsigned int d : 1; /**< Dirty. */ + unsigned int pl : 2; /**< Privilege level. */ + unsigned int ar : 3; /**< Access rights. */ + unsigned long long ppn : 38; /**< Physical Page Number, a.k.a. PFN. */ + unsigned int : 2; + unsigned int ed : 1; + unsigned int ig1 : 11; + + /* Word 1 */ + unsigned int : 2; + unsigned int ps : 6; /**< Page size will be 2^ps. */ + unsigned int key : 24; /**< Protection key, unused. */ + unsigned int : 32; + } __attribute__ ((packed)); +} __attribute__ ((packed)) tlb_entry_t; + +extern void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc); +extern void dtc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); +extern void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); + +extern void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, size_t tr); +extern void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr); +extern void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr); + +extern void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, size_t tr); +extern void dtr_purge(uintptr_t page, size_t width); + +extern void dtc_pte_copy(pte_t *t); +extern void itc_pte_copy(pte_t *t); + +extern void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate); +extern void alternate_data_tlb_fault(uint64_t vector, istate_t *istate); +extern void data_nested_tlb_fault(uint64_t vector, istate_t *istate); +extern void data_dirty_bit_fault(uint64_t vector, istate_t *istate); +extern void instruction_access_bit_fault(uint64_t vector, istate_t *istate); +extern void data_access_bit_fault(uint64_t vector, istate_t *istate); +extern void data_access_rights_fault(uint64_t vector, istate_t *istate); +extern void page_not_present(uint64_t vector, istate_t *istate); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/vhpt.h =================================================================== --- kernel/arch/ia64/include/arch/mm/vhpt.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/mm/vhpt.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2006 Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file +*/ + +#ifndef KERN_ia64_VHPT_H_ +#define KERN_ia64_VHPT_H_ + +#include +#include + +uintptr_t vhpt_set_up(void); + +static inline vhpt_entry_t tlb_entry_t2vhpt_entry_t(tlb_entry_t tentry) +{ + vhpt_entry_t ventry; + + ventry.word[0] = tentry.word[0]; + ventry.word[1] = tentry.word[1]; + + return ventry; +} + +void vhpt_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); +void vhpt_invalidate_all(void); +void vhpt_invalidate_asid(asid_t asid); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/pal/pal.h =================================================================== --- kernel/arch/ia64/include/arch/pal/pal.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/pal/pal.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_PAL_H_ +#define KERN_ia64_PAL_H_ + +#define PAL_OK 0 /**< Call completed without error. */ +#define PAL_UNIMPL -1 /**< Unimplemented procedure. */ +#define PAL_INVARG -2 /**< Invalid argument. */ +#define PAL_ERR -3 /**< Can not compete call without error. */ + +/** These are the indices for PAL_PROC. */ +#define PAL_CACHE_FLUSH 1 +#define PAL_CACHE_INFO 2 +#define PAL_CACHE_INIT 3 +#define PAL_CACHE_PROT_INFO 38 +#define PAL_CACHE_SHARED_INFO 43 +#define PAL_CACHE_SUMMARY 4 + +#define PAL_MEM_ATTRIB 5 +#define PAL_PREFETCH_VISIBILITY 41 +#define PAL_PTCE_INFO 6 +#define PAL_VM_INFO 7 +#define PAL_VM_PAGE_SIZE 34 +#define PAL_VM_SUMMARY 8 +#define PAL_VM_TR_READ 261 + +#define PAL_BUS_GET_FEATURES 9 +#define PAL_BUS_SET_FEATURES 10 +#define PAL_DEBUG_INFO 11 +#define PAL_FIXED_ADDR 12 +#define PAL_FREQ_BASE 13 +#define PAL_FREQ_RATIOS 14 +#define PAL_LOGICAL_TO_PHYSICAL 42 +#define PAL_PERF_MON_INFO 15 +#define PAL_PLATFORM_ADDR 16 +#define PAL_PROC_GET_FEATURES 17 +#define PAL_PROC_SET_FEATURES 18 +#define PAL_REGISTER_INFO 39 +#define PAL_RSE_INFO 19 +#define PAL_VERSION 20 + +#define PAL_MC_CLEAR_LOG 21 +#define PAL_MC_DRAIN 22 +#define PAL_MC_DYNAMIC_STATE 24 +#define PAL_MC_ERROR_INFO 25 +#define PAL_MC_EXPECTED 23 +#define PAL_MC_REGISTER_MEM 27 +#define PAL_MC_RESUME 26 + +#define PAL_HALT 28 +#define PAL_HALT_INFO 257 +#define PAL_HALT_LIGHT 29 + +#define PAL_CACHE_LINE_INIT 31 +#define PAL_CACHE_READ 259 +#define PAL_CACHE_WRITE 260 +#define PAL_TEST_INFO 37 +#define PAL_TEST_PROC 258 + +#define PAL_COPY_INFO 30 +#define PAL_COPY_PAL 256 +#define PAL_ENTER_IA_32_ENV 33 +#define PAL_PMI_ENTRYPOINT 32 + +/* + * Ski PTCE data + */ +#define PAL_PTCE_INFO_BASE() (0x100000000LL) +#define PAL_PTCE_INFO_COUNT1() (2) +#define PAL_PTCE_INFO_COUNT2() (3) +#define PAL_PTCE_INFO_STRIDE1() (0x10000000) +#define PAL_PTCE_INFO_STRIDE2() (0x2000) + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/proc/task.h =================================================================== --- kernel/arch/ia64/include/arch/proc/task.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/proc/task.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64proc + * @{ + */ +/** @file + */ +#include + +#ifndef KERN_ia64_TASK_H_ +#define KERN_ia64_TASK_H_ + +#include + +typedef struct { + bitmap_t *iomap; +} task_arch_t; + + +#define task_create_arch(t) { (t)->arch.iomap = NULL; } +#define task_destroy_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/proc/thread.h =================================================================== --- kernel/arch/ia64/include/arch/proc/thread.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/proc/thread.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64proc + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_THREAD_H_ +#define KERN_ia64_THREAD_H_ + +typedef struct { +} thread_arch_t; + +#define thr_constructor_arch(t) +#define thr_destructor_arch(t) +#define thread_create_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/register.h =================================================================== --- kernel/arch/ia64/include/arch/register.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/register.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,276 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_REGISTER_H_ +#define KERN_ia64_REGISTER_H_ + +#define DCR_PP_MASK (1 << 0) +#define DCR_BE_MASK (1 << 1) +#define DCR_LC_MASK (1 << 2) +#define DCR_DM_MASK (1 << 8) +#define DCR_DP_MASK (1 << 9) +#define DCR_DK_MASK (1 << 10) +#define DCR_DX_MASK (1 << 11) +#define DCR_DR_MASK (1 << 12) +#define DCR_DA_MASK (1 << 13) +#define DCR_DD_MASK (1 << 14) + +#define CR_IVR_MASK 0x0f + +#define PSR_IC_MASK (1 << 13) +#define PSR_I_MASK (1 << 14) +#define PSR_PK_MASK (1 << 15) +#define PSR_DT_MASK (1 << 17) +#define PSR_DFL_MASK (1 << 18) +#define PSR_DFH_MASK (1 << 19) +#define PSR_RT_MASK (1 << 27) +#define PSR_IT_MASK (1 << 36) + +#define PSR_CPL_SHIFT 32 +#define PSR_CPL_MASK_SHIFTED 3 + +#define PSR_RI_SHIFT 41 +#define PSR_RI_LEN 2 + +#define PFM_MASK (~0x3fffffffff) + +#define RSC_MODE_MASK 3 +#define RSC_PL_MASK 12 + +/** Application registers. */ +#define AR_KR0 0 +#define AR_KR1 1 +#define AR_KR2 2 +#define AR_KR3 3 +#define AR_KR4 4 +#define AR_KR5 5 +#define AR_KR6 6 +#define AR_KR7 7 +/* ARs 8-15 are reserved */ +#define AR_RSC 16 +#define AR_BSP 17 +#define AR_BSPSTORE 18 +#define AR_RNAT 19 +/* AR 20 is reserved */ +#define AR_FCR 21 +/* ARs 22-23 are reserved */ +#define AR_EFLAG 24 +#define AR_CSD 25 +#define AR_SSD 26 +#define AR_CFLG 27 +#define AR_FSR 28 +#define AR_FIR 29 +#define AR_FDR 30 +/* AR 31 is reserved */ +#define AR_CCV 32 +/* ARs 33-35 are reserved */ +#define AR_UNAT 36 +/* ARs 37-39 are reserved */ +#define AR_FPSR 40 +/* ARs 41-43 are reserved */ +#define AR_ITC 44 +/* ARs 45-47 are reserved */ +/* ARs 48-63 are ignored */ +#define AR_PFS 64 +#define AR_LC 65 +#define AR_EC 66 +/* ARs 67-111 are reserved */ +/* ARs 112-127 are ignored */ + +/** Control registers. */ +#define CR_DCR 0 +#define CR_ITM 1 +#define CR_IVA 2 +/* CR3-CR7 are reserved */ +#define CR_PTA 8 +/* CR9-CR15 are reserved */ +#define CR_IPSR 16 +#define CR_ISR 17 +/* CR18 is reserved */ +#define CR_IIP 19 +#define CR_IFA 20 +#define CR_ITIR 21 +#define CR_IIPA 22 +#define CR_IFS 23 +#define CR_IIM 24 +#define CR_IHA 25 +/* CR26-CR63 are reserved */ +#define CR_LID 64 +#define CR_IVR 65 +#define CR_TPR 66 +#define CR_EOI 67 +#define CR_IRR0 68 +#define CR_IRR1 69 +#define CR_IRR2 70 +#define CR_IRR3 71 +#define CR_ITV 72 +#define CR_PMV 73 +#define CR_CMCV 74 +/* CR75-CR79 are reserved */ +#define CR_LRR0 80 +#define CR_LRR1 81 +/* CR82-CR127 are reserved */ + +#ifndef __ASM__ + +/** Processor Status Register. */ +typedef union { + uint64_t value; + struct { + unsigned int : 1; + unsigned int be : 1; /**< Big-Endian data accesses. */ + unsigned int up : 1; /**< User Performance monitor enable. */ + unsigned int ac : 1; /**< Alignment Check. */ + unsigned int mfl : 1; /**< Lower floating-point register written. */ + unsigned int mfh : 1; /**< Upper floating-point register written. */ + unsigned int : 7; + unsigned int ic : 1; /**< Interruption Collection. */ + unsigned int i : 1; /**< Interrupt Bit. */ + unsigned int pk : 1; /**< Protection Key enable. */ + unsigned int : 1; + unsigned int dt : 1; /**< Data address Translation. */ + unsigned int dfl : 1; /**< Disabled Floating-point Low register set. */ + unsigned int dfh : 1; /**< Disabled Floating-point High register set. */ + unsigned int sp : 1; /**< Secure Performance monitors. */ + unsigned int pp : 1; /**< Privileged Performance monitor enable. */ + unsigned int di : 1; /**< Disable Instruction set transition. */ + unsigned int si : 1; /**< Secure Interval timer. */ + unsigned int db : 1; /**< Debug Breakpoint fault. */ + unsigned int lp : 1; /**< Lower Privilege transfer trap. */ + unsigned int tb : 1; /**< Taken Branch trap. */ + unsigned int rt : 1; /**< Register Stack Translation. */ + unsigned int : 4; + unsigned int cpl : 2; /**< Current Privilege Level. */ + unsigned int is : 1; /**< Instruction Set. */ + unsigned int mc : 1; /**< Machine Check abort mask. */ + unsigned int it : 1; /**< Instruction address Translation. */ + unsigned int id : 1; /**< Instruction Debug fault disable. */ + unsigned int da : 1; /**< Disable Data Access and Dirty-bit faults. */ + unsigned int dd : 1; /**< Data Debug fault disable. */ + unsigned int ss : 1; /**< Single Step enable. */ + unsigned int ri : 2; /**< Restart Instruction. */ + unsigned int ed : 1; /**< Exception Deferral. */ + unsigned int bn : 1; /**< Register Bank. */ + unsigned int ia : 1; /**< Disable Instruction Access-bit faults. */ + } __attribute__ ((packed)); +} psr_t; + +/** Register Stack Configuration Register */ +typedef union { + uint64_t value; + struct { + unsigned int mode : 2; + unsigned int pl : 2; /**< Privilege Level. */ + unsigned int be : 1; /**< Big-endian. */ + unsigned int : 11; + unsigned int loadrs : 14; + } __attribute__ ((packed)); +} rsc_t; + +/** External Interrupt Vector Register */ +typedef union { + uint8_t vector; + uint64_t value; +} cr_ivr_t; + +/** Task Priority Register */ +typedef union { + uint64_t value; + struct { + unsigned int : 4; + unsigned int mic: 4; /**< Mask Interrupt Class. */ + unsigned int : 8; + unsigned int mmi: 1; /**< Mask Maskable Interrupts. */ + } __attribute__ ((packed)); +} cr_tpr_t; + +/** Interval Timer Vector */ +typedef union { + uint64_t value; + struct { + unsigned int vector : 8; + unsigned int : 4; + unsigned int : 1; + unsigned int : 3; + unsigned int m : 1; /**< Mask. */ + } __attribute__ ((packed)); +} cr_itv_t; + +/** Interruption Status Register */ +typedef union { + uint64_t value; + struct { + union { + /** General Exception code field structuring. */ + uint16_t code; + struct { + unsigned int ge_na : 4; + unsigned int ge_code : 4; + } __attribute__ ((packed)); + }; + uint8_t vector; + unsigned int : 8; + unsigned int x : 1; /**< Execute exception. */ + unsigned int w : 1; /**< Write exception. */ + unsigned int r : 1; /**< Read exception. */ + unsigned int na : 1; /**< Non-access exception. */ + unsigned int sp : 1; /**< Speculative load exception. */ + unsigned int rs : 1; /**< Register stack. */ + unsigned int ir : 1; /**< Incomplete Register frame. */ + unsigned int ni : 1; /**< Nested Interruption. */ + unsigned int so : 1; /**< IA-32 Supervisor Override. */ + unsigned int ei : 2; /**< Excepting Instruction. */ + unsigned int ed : 1; /**< Exception Deferral. */ + unsigned int : 20; + } __attribute__ ((packed)); +} cr_isr_t; + +/** CPUID Register 3 */ +typedef union { + uint64_t value; + struct { + uint8_t number; + uint8_t revision; + uint8_t model; + uint8_t family; + uint8_t archrev; + } __attribute__ ((packed)); +} cpuid3_t; + +#endif /* !__ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/stack.h =================================================================== --- kernel/arch/ia64/include/arch/stack.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/stack.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_STACK_H_ +#define KERN_ia64_STACK_H_ + +#define STACK_ITEM_SIZE 8 +#define STACK_ALIGNMENT 16 +#define STACK_SCRATCH_AREA_SIZE 16 +#define REGISTER_STACK_ALIGNMENT 8 + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/types.h =================================================================== --- kernel/arch/ia64/include/arch/types.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/ia64/include/arch/types.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_TYPES_H_ +#define KERN_ia64_TYPES_H_ + +typedef uint64_t size_t; +typedef int64_t ssize_t; + +typedef uint64_t uintptr_t; +typedef uint64_t pfn_t; + +typedef uint64_t ipl_t; + +typedef uint64_t sysarg_t; +typedef int64_t native_t; +typedef uint64_t atomic_count_t; + +typedef struct { + sysarg_t fnc; + sysarg_t gp; +} __attribute__((may_alias)) fncptr_t; + +#define INTN_C(c) INT64_C(c) +#define UINTN_C(c) UINT64_C(c) + +#define PRIdn PRId64 /**< Format for native_t. */ +#define PRIun PRIu64 /**< Format for sysarg_t. */ +#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu64 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/asm.h =================================================================== --- kernel/arch/ia64/include/asm.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,492 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ASM_H_ -#define KERN_ia64_ASM_H_ - -#include -#include -#include -#include -#include - -#define IO_SPACE_BOUNDARY ((void *) (64 * 1024)) - -/** Map the I/O port address to a legacy I/O address. */ -NO_TRACE static inline uintptr_t p2a(volatile void *p) -{ - uintptr_t prt = (uintptr_t) p; - - return legacyio_virt_base + (((prt >> 2) << 12) | (prt & 0xfff)); -} - -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) -{ - if (port < (ioport8_t *) IO_SPACE_BOUNDARY) - *((ioport8_t *) p2a(port)) = v; - else - *port = v; - - asm volatile ( - "mf\n" - "mf.a\n" - ::: "memory" - ); -} - -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) -{ - if (port < (ioport16_t *) IO_SPACE_BOUNDARY) - *((ioport16_t *) p2a(port)) = v; - else - *port = v; - - asm volatile ( - "mf\n" - "mf.a\n" - ::: "memory" - ); -} - -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) -{ - if (port < (ioport32_t *) IO_SPACE_BOUNDARY) - *((ioport32_t *) p2a(port)) = v; - else - *port = v; - - asm volatile ( - "mf\n" - "mf.a\n" - ::: "memory" - ); -} - -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - uint8_t v; - - asm volatile ( - "mf\n" - ::: "memory" - ); - - if (port < (ioport8_t *) IO_SPACE_BOUNDARY) - v = *((ioport8_t *) p2a(port)); - else - v = *port; - - asm volatile ( - "mf.a\n" - ::: "memory" - ); - - return v; -} - -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - uint16_t v; - - asm volatile ( - "mf\n" - ::: "memory" - ); - - if (port < (ioport16_t *) IO_SPACE_BOUNDARY) - v = *((ioport16_t *) p2a(port)); - else - v = *port; - - asm volatile ( - "mf.a\n" - ::: "memory" - ); - - return v; -} - -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - uint32_t v; - - asm volatile ( - "mf\n" - ::: "memory" - ); - - if (port < (ioport32_t *) IO_SPACE_BOUNDARY) - v = *((ioport32_t *) p2a(port)); - else - v = *port; - - asm volatile ( - "mf.a\n" - ::: "memory" - ); - - return v; -} - -/** Return base address of current memory stack. - * - * The memory stack is assumed to be STACK_SIZE / 2 long. Note that there is - * also the RSE stack, which takes up the upper half of STACK_SIZE. - * The memory stack must start on page boundary. - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uint64_t value; - - asm volatile ( - "mov %[value] = r12" - : [value] "=r" (value) - ); - - return (value & (~(STACK_SIZE / 2 - 1))); -} - -/** Return Processor State Register. - * - * @return PSR. - * - */ -NO_TRACE static inline uint64_t psr_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = psr\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Read IVA (Interruption Vector Address). - * - * @return Return location of interruption vector table. - * - */ -NO_TRACE static inline uint64_t iva_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr.iva\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Write IVA (Interruption Vector Address) register. - * - * @param v New location of interruption vector table. - * - */ -NO_TRACE static inline void iva_write(uint64_t v) -{ - asm volatile ( - "mov cr.iva = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Read IVR (External Interrupt Vector Register). - * - * @return Highest priority, pending, unmasked external - * interrupt vector. - * - */ -NO_TRACE static inline uint64_t ivr_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr.ivr\n" - : [value] "=r" (v) - ); - - return v; -} - -NO_TRACE static inline uint64_t cr64_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr64\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Write ITC (Interval Timer Counter) register. - * - * @param v New counter value. - * - */ -NO_TRACE static inline void itc_write(uint64_t v) -{ - asm volatile ( - "mov ar.itc = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Read ITC (Interval Timer Counter) register. - * - * @return Current counter value. - * - */ -NO_TRACE static inline uint64_t itc_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = ar.itc\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Write ITM (Interval Timer Match) register. - * - * @param v New match value. - * - */ -NO_TRACE static inline void itm_write(uint64_t v) -{ - asm volatile ( - "mov cr.itm = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Read ITM (Interval Timer Match) register. - * - * @return Match value. - * - */ -NO_TRACE static inline uint64_t itm_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr.itm\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Read ITV (Interval Timer Vector) register. - * - * @return Current vector and mask bit. - * - */ -NO_TRACE static inline uint64_t itv_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr.itv\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Write ITV (Interval Timer Vector) register. - * - * @param v New vector and mask bit. - * - */ -NO_TRACE static inline void itv_write(uint64_t v) -{ - asm volatile ( - "mov cr.itv = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Write EOI (End Of Interrupt) register. - * - * @param v This value is ignored. - * - */ -NO_TRACE static inline void eoi_write(uint64_t v) -{ - asm volatile ( - "mov cr.eoi = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Read TPR (Task Priority Register). - * - * @return Current value of TPR. - * - */ -NO_TRACE static inline uint64_t tpr_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr.tpr\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Write TPR (Task Priority Register). - * - * @param v New value of TPR. - * - */ -NO_TRACE static inline void tpr_write(uint64_t v) -{ - asm volatile ( - "mov cr.tpr = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Disable interrupts. - * - * Disable interrupts and return previous - * value of PSR. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static ipl_t interrupts_disable(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = psr\n" - "rsm %[mask]\n" - : [value] "=r" (v) - : [mask] "i" (PSR_I_MASK) - ); - - return (ipl_t) v; -} - -/** Enable interrupts. - * - * Enable interrupts and return previous - * value of PSR. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static ipl_t interrupts_enable(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = psr\n" - "ssm %[mask]\n" - ";;\n" - "srlz.d\n" - : [value] "=r" (v) - : [mask] "i" (PSR_I_MASK) - ); - - return (ipl_t) v; -} - -/** Restore interrupt priority level. - * - * Restore PSR. - * - * @param ipl Saved interrupt priority level. - * - */ -NO_TRACE static inline void interrupts_restore(ipl_t ipl) -{ - if (ipl & PSR_I_MASK) - (void) interrupts_enable(); - else - (void) interrupts_disable(); -} - -/** Return interrupt priority level. - * - * @return PSR. - * - */ -NO_TRACE static inline ipl_t interrupts_read(void) -{ - return (ipl_t) psr_read(); -} - -/** Check interrupts state. - * - * @return True if interrupts are disabled. - * - */ -NO_TRACE static inline bool interrupts_disabled(void) -{ - return !(psr_read() & PSR_I_MASK); -} - -/** Disable protection key checking. */ -NO_TRACE static inline void pk_disable(void) -{ - asm volatile ( - "rsm %[mask]\n" - ";;\n" - "srlz.d\n" - :: [mask] "i" (PSR_PK_MASK) - ); -} - -extern void cpu_halt(void) __attribute__((noreturn)); -extern void cpu_sleep(void); -extern void asm_delay_loop(uint32_t t); - -extern void switch_to_userspace(uintptr_t, uintptr_t, uintptr_t, uintptr_t, - uint64_t, uint64_t); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/atomic.h =================================================================== --- kernel/arch/ia64/include/atomic.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,138 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ATOMIC_H_ -#define KERN_ia64_ATOMIC_H_ - -#include - -NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "movl %[v] = 0x1;;\n" - "xchg8 %[v] = %[count], %[v];;\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); - - return v; -} - -NO_TRACE static inline void atomic_lock_arch(atomic_t *val) -{ - do { - while (val->count); - } while (test_and_set(val)); -} - -NO_TRACE static inline void atomic_inc(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], 1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); -} - -NO_TRACE static inline void atomic_dec(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], -1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); -} - -NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], 1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); - - return (v + 1); -} - -NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], -1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); - - return (v - 1); -} - -NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], 1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); - - return v; -} - -NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], -1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); - - return v; -} - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/barrier.h =================================================================== --- kernel/arch/ia64/include/barrier.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,78 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_BARRIER_H_ -#define KERN_ia64_BARRIER_H_ - -/* - * TODO: Implement true IA-64 memory barriers for macros below. - */ -#define CS_ENTER_BARRIER() memory_barrier() -#define CS_LEAVE_BARRIER() memory_barrier() - -#define memory_barrier() asm volatile ("mf\n" ::: "memory") -#define read_barrier() memory_barrier() -#define write_barrier() memory_barrier() - -#define srlz_i() \ - asm volatile (";; srlz.i ;;\n" ::: "memory") -#define srlz_d() \ - asm volatile (";; srlz.d\n" ::: "memory") - -#define fc_i(a) \ - asm volatile ("fc.i %0\n" :: "r" ((a)) : "memory") -#define sync_i() \ - asm volatile (";; sync.i\n" ::: "memory") - -#define smc_coherence(a) \ -{ \ - fc_i((a)); \ - sync_i(); \ - srlz_i(); \ -} - -#define FC_INVAL_MIN 32 -#define smc_coherence_block(a, l) \ -{ \ - unsigned long i; \ - for (i = 0; i < (l); i += FC_INVAL_MIN) \ - fc_i((void *)(a) + i); \ - sync_i(); \ - srlz_i(); \ -} - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/bootinfo.h =================================================================== --- kernel/arch/ia64/include/bootinfo.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,72 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_ia64_BOOTINFO_H_ -#define KERN_ia64_BOOTINFO_H_ - -#define TASKMAP_MAX_RECORDS 32 - -#define MEMMAP_ITEMS 128 - -#define MEMMAP_FREE_MEM 0 - -/** Size of buffer for storing task name in binit_task_t. */ -#define BOOTINFO_TASK_NAME_BUFLEN 32 - -typedef struct { - void *addr; - size_t size; - char name[BOOTINFO_TASK_NAME_BUFLEN]; -} binit_task_t; - -typedef struct { - size_t cnt; - binit_task_t tasks[TASKMAP_MAX_RECORDS]; -} binit_t; - -typedef struct { - unsigned int type; - unsigned long base; - unsigned long size; -} memmap_item_t; - -typedef struct { - binit_t taskmap; - - memmap_item_t memmap[MEMMAP_ITEMS]; - unsigned int memmap_items; - - sysarg_t *sapic; - unsigned long sys_freq; - unsigned long freq_scale; - unsigned int wakeup_intno; -} bootinfo_t; - -extern bootinfo_t *bootinfo; - -#endif Index: kernel/arch/ia64/include/context.h =================================================================== --- kernel/arch/ia64/include/context.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,131 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_CONTEXT_H_ -#define KERN_ia64_CONTEXT_H_ - -#include -#include -#include -#include - -/* - * context_save_arch() and context_restore_arch() are both leaf procedures. - * No need to allocate scratch area. - * - * One item is put onto the stack to support get_stack_base(). - */ -#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) - -/* RSE stack starts at the bottom of memory stack, hence the division by 2. */ -#define context_set(c, _pc, stack, size) \ - do { \ - (c)->pc = (uintptr_t) _pc; \ - (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size / 2), REGISTER_STACK_ALIGNMENT); \ - (c)->ar_pfs &= PFM_MASK; \ - (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size / 2), STACK_ALIGNMENT) - SP_DELTA; \ - } while (0) - -/* - * Only save registers that must be preserved across - * function calls. - */ -typedef struct { - - /* - * Application registers - */ - uint64_t ar_pfs; - uint64_t ar_unat_caller; - uint64_t ar_unat_callee; - uint64_t ar_rsc; - uintptr_t bsp; /* ar_bsp */ - uint64_t ar_rnat; - uint64_t ar_lc; - - /* - * General registers - */ - uint64_t r1; - uint64_t r4; - uint64_t r5; - uint64_t r6; - uint64_t r7; - uintptr_t sp; /* r12 */ - uint64_t r13; - - /* - * Branch registers - */ - uintptr_t pc; /* b0 */ - uint64_t b1; - uint64_t b2; - uint64_t b3; - uint64_t b4; - uint64_t b5; - - /* - * Predicate registers - */ - uint64_t pr; - - uint128_t f2 __attribute__ ((aligned(16))); - uint128_t f3; - uint128_t f4; - uint128_t f5; - - uint128_t f16; - uint128_t f17; - uint128_t f18; - uint128_t f19; - uint128_t f20; - uint128_t f21; - uint128_t f22; - uint128_t f23; - uint128_t f24; - uint128_t f25; - uint128_t f26; - uint128_t f27; - uint128_t f28; - uint128_t f29; - uint128_t f30; - uint128_t f31; - - ipl_t ipl; -} context_t; - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/cpu.h =================================================================== --- kernel/arch/ia64/include/cpu.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,99 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_CPU_H_ -#define KERN_ia64_CPU_H_ - -#include -#include -#include -#include -#include - -#define FAMILY_ITANIUM 0x7 -#define FAMILY_ITANIUM2 0x1f - -#define CR64_ID_SHIFT 24 -#define CR64_ID_MASK 0xff000000 -#define CR64_EID_SHIFT 16 -#define CR64_EID_MASK 0xff0000 - -typedef struct { - uint64_t cpuid0; - uint64_t cpuid1; - cpuid3_t cpuid3; -} cpu_arch_t; - -/** Read CPUID register. - * - * @param n CPUID register number. - * - * @return Value of CPUID[n] register. - * - */ -NO_TRACE static inline uint64_t cpuid_read(int n) -{ - uint64_t v; - - asm volatile ( - "mov %[v] = cpuid[%[r]]\n" - : [v] "=r" (v) - : [r] "r" (n) - ); - - return v; -} - -NO_TRACE static inline int ia64_get_cpu_id(void) -{ - uint64_t cr64 = cr64_read(); - return ((CR64_ID_MASK) &cr64) >> CR64_ID_SHIFT; -} - -NO_TRACE static inline int ia64_get_cpu_eid(void) -{ - uint64_t cr64 = cr64_read(); - return ((CR64_EID_MASK) &cr64) >> CR64_EID_SHIFT; -} - -NO_TRACE static inline void ipi_send_ipi(int id, int eid, int intno) -{ - (bootinfo->sapic)[2 * (id * 256 + eid)] = intno; - srlz_d(); -} - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/cycle.h =================================================================== --- kernel/arch/ia64/include/cycle.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_CYCLE_H_ -#define KERN_ia64_CYCLE_H_ - -#include - -NO_TRACE static inline uint64_t get_cycle(void) -{ - return 0; -} - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/drivers/it.h =================================================================== --- kernel/arch/ia64/include/drivers/it.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_IT_H_ -#define KERN_ia64_IT_H_ - -/* - * Unfortunately, Ski does not emulate PAL, - * so we can't read the real frequency ratios - * from firmware. - * - */ -#define IT_DELTA it_delta - -extern void it_init(void); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/drivers/kbd.h =================================================================== --- kernel/arch/ia64/include/drivers/kbd.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar, Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia6464 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_KBD_H_ -#define KERN_ia64_KBD_H_ - -#define KBD_UNKNOWN 0 -#define KBD_SKI 1 -#define KBD_LEGACY 2 -#define KBD_NS16550 3 - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/drivers/ski.h =================================================================== --- kernel/arch/ia64/include/drivers/ski.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_SKI_H_ -#define KERN_ia64_SKI_H_ - -#include -#include - -typedef struct { - thread_t *thread; - indev_t *srlnin; -} ski_instance_t; - -extern outdev_t *skiout_init(void); - -extern ski_instance_t *skiin_init(void); -extern void skiin_wire(ski_instance_t *, indev_t *); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/elf.h =================================================================== --- kernel/arch/ia64/include/elf.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ELF_H_ -#define KERN_ia64_ELF_H_ - -#define ELF_MACHINE EM_IA_64 -#define ELF_DATA_ENCODING ELFDATA2LSB -#define ELF_CLASS ELFCLASS64 - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/faddr.h =================================================================== --- kernel/arch/ia64/include/faddr.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,53 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_FADDR_H_ -#define KERN_ia64_FADDR_H_ - -#include - -/** - * - * Calculate absolute address of function - * referenced by fptr pointer. - * - * @param fptr Function pointer. - * - */ -#define FADDR(fptr) (((fncptr_t *) (fptr))->fnc) - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/fpu_context.h =================================================================== --- kernel/arch/ia64/include/fpu_context.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_FPU_CONTEXT_H_ -#define KERN_ia64_FPU_CONTEXT_H_ - -#define FPU_CONTEXT_ALIGN 16 - -#include - -#define FRS 96 - -typedef struct { - uint128_t fr[FRS]; -} fpu_context_t; - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/interrupt.h =================================================================== --- kernel/arch/ia64/include/interrupt.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,88 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_INTERRUPT_H_ -#define KERN_ia64_INTERRUPT_H_ - -#include -#include - -/** ia64 has 256 INRs. */ -#define INR_COUNT 256 - -/* - * We need to keep this just to compile. - * We might eventually move interrupt/ stuff - * to genarch. - */ -#define IVT_ITEMS 0 -#define IVT_FIRST 0 - -/** External Interrupt vectors. */ - -#define VECTOR_TLB_SHOOTDOWN_IPI 0xf0 - -#define INTERRUPT_SPURIOUS 15 -#define INTERRUPT_TIMER 255 - -#define LEGACY_INTERRUPT_BASE 0x20 - -#define IRQ_KBD (0x01 + LEGACY_INTERRUPT_BASE) -#define IRQ_MOUSE (0x0c + LEGACY_INTERRUPT_BASE) - -/** General Exception codes. */ -#define GE_ILLEGALOP 0 -#define GE_PRIVOP 1 -#define GE_PRIVREG 2 -#define GE_RESREGFLD 3 -#define GE_DISBLDISTRAN 4 -#define GE_ILLEGALDEP 8 - -#define EOI 0 /**< The actual value doesn't matter. */ - -extern void *ivt; - -extern void general_exception(uint64_t, istate_t *); -extern int break_instruction(uint64_t, istate_t *); -extern void universal_handler(uint64_t, istate_t *); -extern void nop_handler(uint64_t, istate_t *); -extern void external_interrupt(uint64_t, istate_t *); -extern void disabled_fp_register(uint64_t, istate_t *); - -extern void trap_virtual_enable_irqs(uint16_t); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/istate.h =================================================================== --- kernel/arch/ia64/include/istate.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,137 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ISTATE_H_ -#define KERN_ia64_ISTATE_H_ - -#include - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -typedef struct istate { - uint128_t f2; - uint128_t f3; - uint128_t f4; - uint128_t f5; - uint128_t f6; - uint128_t f7; - uint128_t f8; - uint128_t f9; - uint128_t f10; - uint128_t f11; - uint128_t f12; - uint128_t f13; - uint128_t f14; - uint128_t f15; - uint128_t f16; - uint128_t f17; - uint128_t f18; - uint128_t f19; - uint128_t f20; - uint128_t f21; - uint128_t f22; - uint128_t f23; - uint128_t f24; - uint128_t f25; - uint128_t f26; - uint128_t f27; - uint128_t f28; - uint128_t f29; - uint128_t f30; - uint128_t f31; - - uintptr_t ar_bsp; - uintptr_t ar_bspstore; - uintptr_t ar_bspstore_new; - uint64_t ar_rnat; - uint64_t ar_ifs; - uint64_t ar_pfs; - uint64_t ar_rsc; - uintptr_t cr_ifa; - cr_isr_t cr_isr; - uintptr_t cr_iipa; - psr_t cr_ipsr; - uintptr_t cr_iip; - uint64_t pr; - uintptr_t sp; - - /* - * The following variables are defined only for break_instruction - * handler. - */ - uint64_t in0; - uint64_t in1; - uint64_t in2; - uint64_t in3; - uint64_t in4; - uint64_t in5; - uint64_t in6; -} istate_t; - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->cr_iip = retaddr; - istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */ -} - -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->cr_iip; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - /* FIXME */ - - return 0; -} - -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return (istate->cr_iip) < 0xe000000000000000ULL; -} - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/legacyio.h =================================================================== --- kernel/arch/ia64/include/legacyio.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,55 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_LEGACYIO_H_ -#define KERN_ia64_LEGACYIO_H_ - -#include - -#define LEGACYIO_PHYS_BASE 0x00000FFFFC000000ULL - -/* Legacy I/O space - static uspace address, FIXME */ -#define LEGACYIO_USER_BASE 0x0001000000000000ULL - -#define LEGACYIO_PAGE_WIDTH 26 /* 64M */ -#define LEGACYIO_SINGLE_PAGE_WIDTH 12 /* 4K */ - -#define LEGACYIO_SIZE (1ULL << LEGACYIO_PAGE_WIDTH) - -extern uintptr_t legacyio_virt_base; - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/as.h =================================================================== --- kernel/arch/ia64/include/mm/as.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,63 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_AS_H_ -#define KERN_ia64_AS_H_ - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0xe000000000000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT64_C(0xdfffffffffffffff) - -#define USTACK_ADDRESS_ARCH UINT64_C(0x0000000ff0000000) - -typedef struct { -} as_arch_t; - -#include - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) -#define as_deinstall_arch(as) -#define as_invalidate_translation_cache(as, page, cnt) - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/asid.h =================================================================== --- kernel/arch/ia64/include/mm/asid.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,68 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ASID_H_ -#define KERN_ia64_ASID_H_ - -#ifndef __ASM__ - -#include - -typedef uint16_t asid_t; -typedef uint32_t rid_t; - -#endif /* __ASM__ */ - -/** - * Number of ia64 RIDs (Region Identifiers) per kernel ASID. - * Note that some architectures may support more bits, - * but those extra bits are not used by the kernel. - */ -#define RIDS_PER_ASID 8 - -#define RID_MAX 262143 /* 2^18 - 1 */ -#define RID_KERNEL7 7 - -#define ASID2RID(asid, vrn) \ - ((asid) * RIDS_PER_ASID + (vrn)) - -#define RID2ASID(rid) \ - ((rid) / RIDS_PER_ASID) - -#define ASID_MAX_ARCH (RID_MAX / RIDS_PER_ASID) - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/frame.h =================================================================== --- kernel/arch/ia64/include/mm/frame.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,56 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_FRAME_H_ -#define KERN_ia64_FRAME_H_ - -#define FRAME_WIDTH 14 /* 16K */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -#include - -extern uintptr_t end_of_identity; - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -#define physmem_print() - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/km.h =================================================================== --- kernel/arch/ia64/include/mm/km.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,59 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_KM_H_ -#define KERN_ia64_KM_H_ - -#include - -/* - * Be conservative and assume the minimal (3 + 51)-bit virtual address width - * of the Itanium CPU even if running on CPU with full 64-bit virtual - * address width, such as Itanium 2. - */ - -#define KM_IA64_IDENTITY_START UINT64_C(0xe000000000000000) -#define KM_IA64_IDENTITY_SIZE UINT64_C(0x0004000000000000) - -#define KM_IA64_NON_IDENTITY_START UINT64_C(0xfffc000000000000) -#define KM_IA64_NON_IDENTITY_SIZE UINT64_C(0x0004000000000000) - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/page.h =================================================================== --- kernel/arch/ia64/include/mm/page.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,300 +1,0 @@ -/* - * Copyright (c) 2005 - 2006 Jakub Jermar - * Copyright (c) 2006 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_PAGE_H_ -#define KERN_ia64_PAGE_H_ - -#include - -#define PAGE_SIZE FRAME_SIZE -#define PAGE_WIDTH FRAME_WIDTH - -/** Bit width of the TLB-locked portion of kernel address space. */ -#define KERNEL_PAGE_WIDTH 28 /* 256M */ - -#define PPN_SHIFT 12 - -#define VRN_SHIFT 61 -#define VRN_MASK (7ULL << VRN_SHIFT) -#define VA2VRN(va) ((va) >> VRN_SHIFT) - -#ifdef __ASM__ - #define VRN_KERNEL 7 -#else - #define VRN_KERNEL 7ULL -#endif - -#define REGION_REGISTERS 8 - -#define KA2PA(x) ((uintptr_t) ((x) - (VRN_KERNEL << VRN_SHIFT))) -#define PA2KA(x) ((uintptr_t) ((x) + (VRN_KERNEL << VRN_SHIFT))) - -#define VHPT_WIDTH 20 /* 1M */ -#define VHPT_SIZE (1 << VHPT_WIDTH) - -#define PTA_BASE_SHIFT 15 - -/** Memory Attributes. */ -#define MA_WRITEBACK 0x00 -#define MA_UNCACHEABLE 0x04 - -/** Privilege Levels. Only the most and the least privileged ones are ever used. */ -#define PL_KERNEL 0x00 -#define PL_USER 0x03 - -/* Access Rigths. Only certain combinations are used by the kernel. */ -#define AR_READ 0x00 -#define AR_EXECUTE 0x01 -#define AR_WRITE 0x02 - -#ifndef __ASM__ - -#include -#include -#include -#include -#include -#include -#include - -struct vhpt_tag_info { - unsigned long long tag : 63; - unsigned int ti : 1; -} __attribute__ ((packed)); - -union vhpt_tag { - struct vhpt_tag_info tag_info; - unsigned tag_word; -}; - -struct vhpt_entry_present { - /* Word 0 */ - unsigned int p : 1; - unsigned int : 1; - unsigned int ma : 3; - unsigned int a : 1; - unsigned int d : 1; - unsigned int pl : 2; - unsigned int ar : 3; - unsigned long long ppn : 38; - unsigned int : 2; - unsigned int ed : 1; - unsigned int ig1 : 11; - - /* Word 1 */ - unsigned int : 2; - unsigned int ps : 6; - unsigned int key : 24; - unsigned int : 32; - - /* Word 2 */ - union vhpt_tag tag; - - /* Word 3 */ - uint64_t ig3 : 64; -} __attribute__ ((packed)); - -struct vhpt_entry_not_present { - /* Word 0 */ - unsigned int p : 1; - unsigned long long ig0 : 52; - unsigned int ig1 : 11; - - /* Word 1 */ - unsigned int : 2; - unsigned int ps : 6; - unsigned long long ig2 : 56; - - /* Word 2 */ - union vhpt_tag tag; - - /* Word 3 */ - uint64_t ig3 : 64; -} __attribute__ ((packed)); - -typedef union { - struct vhpt_entry_present present; - struct vhpt_entry_not_present not_present; - uint64_t word[4]; -} vhpt_entry_t; - -struct region_register_map { - unsigned int ve : 1; - unsigned int : 1; - unsigned int ps : 6; - unsigned int rid : 24; - unsigned int : 32; -} __attribute__ ((packed)); - -typedef union { - struct region_register_map map; - unsigned long long word; -} region_register_t; - -struct pta_register_map { - unsigned int ve : 1; - unsigned int : 1; - unsigned int size : 6; - unsigned int vf : 1; - unsigned int : 6; - unsigned long long base : 49; -} __attribute__ ((packed)); - -typedef union pta_register { - struct pta_register_map map; - uint64_t word; -} pta_register_t; - -/** Return Translation Hashed Entry Address. - * - * VRN bits are used to read RID (ASID) from one - * of the eight region registers registers. - * - * @param va Virtual address including VRN bits. - * - * @return Address of the head of VHPT collision chain. - */ -NO_TRACE static inline uint64_t thash(uint64_t va) -{ - uint64_t ret; - - asm volatile ( - "thash %[ret] = %[va]\n" - : [ret] "=r" (ret) - : [va] "r" (va) - ); - - return ret; -} - -/** Return Translation Hashed Entry Tag. - * - * VRN bits are used to read RID (ASID) from one - * of the eight region registers. - * - * @param va Virtual address including VRN bits. - * - * @return The unique tag for VPN and RID in the collision chain returned by thash(). - */ -NO_TRACE static inline uint64_t ttag(uint64_t va) -{ - uint64_t ret; - - asm volatile ( - "ttag %[ret] = %[va]\n" - : [ret] "=r" (ret) - : [va] "r" (va) - ); - - return ret; -} - -/** Read Region Register. - * - * @param i Region register index. - * - * @return Current contents of rr[i]. - */ -NO_TRACE static inline uint64_t rr_read(size_t i) -{ - uint64_t ret; - - ASSERT(i < REGION_REGISTERS); - - asm volatile ( - "mov %[ret] = rr[%[index]]\n" - : [ret] "=r" (ret) - : [index] "r" (i << VRN_SHIFT) - ); - - return ret; -} - -/** Write Region Register. - * - * @param i Region register index. - * @param v Value to be written to rr[i]. - */ -NO_TRACE static inline void rr_write(size_t i, uint64_t v) -{ - ASSERT(i < REGION_REGISTERS); - - asm volatile ( - "mov rr[%[index]] = %[value]\n" - :: [index] "r" (i << VRN_SHIFT), - [value] "r" (v) - ); -} - -/** Read Page Table Register. - * - * @return Current value stored in PTA. - */ -NO_TRACE static inline uint64_t pta_read(void) -{ - uint64_t ret; - - asm volatile ( - "mov %[ret] = cr.pta\n" - : [ret] "=r" (ret) - ); - - return ret; -} - -/** Write Page Table Register. - * - * @param v New value to be stored in PTA. - */ -NO_TRACE static inline void pta_write(uint64_t v) -{ - asm volatile ( - "mov cr.pta = %[value]\n" - :: [value] "r" (v) - ); -} - -extern void page_arch_init(void); - -extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid); -extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v); -extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/tlb.h =================================================================== --- kernel/arch/ia64/include/mm/tlb.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,100 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_TLB_H_ -#define KERN_ia64_TLB_H_ - -#include -#include -#include -#include - -/** Data and instruction Translation Register indices. */ -#define DTR_KERNEL 0 -#define ITR_KERNEL 0 -#define DTR_KSTACK1 4 -#define DTR_KSTACK2 5 - -/** Portion of TLB insertion format data structure. */ -typedef union { - uint64_t word[2]; - struct { - /* Word 0 */ - unsigned int p : 1; /**< Present. */ - unsigned int : 1; - unsigned int ma : 3; /**< Memory attribute. */ - unsigned int a : 1; /**< Accessed. */ - unsigned int d : 1; /**< Dirty. */ - unsigned int pl : 2; /**< Privilege level. */ - unsigned int ar : 3; /**< Access rights. */ - unsigned long long ppn : 38; /**< Physical Page Number, a.k.a. PFN. */ - unsigned int : 2; - unsigned int ed : 1; - unsigned int ig1 : 11; - - /* Word 1 */ - unsigned int : 2; - unsigned int ps : 6; /**< Page size will be 2^ps. */ - unsigned int key : 24; /**< Protection key, unused. */ - unsigned int : 32; - } __attribute__ ((packed)); -} __attribute__ ((packed)) tlb_entry_t; - -extern void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc); -extern void dtc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); -extern void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); - -extern void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, size_t tr); -extern void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr); -extern void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr); - -extern void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, size_t tr); -extern void dtr_purge(uintptr_t page, size_t width); - -extern void dtc_pte_copy(pte_t *t); -extern void itc_pte_copy(pte_t *t); - -extern void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate); -extern void alternate_data_tlb_fault(uint64_t vector, istate_t *istate); -extern void data_nested_tlb_fault(uint64_t vector, istate_t *istate); -extern void data_dirty_bit_fault(uint64_t vector, istate_t *istate); -extern void instruction_access_bit_fault(uint64_t vector, istate_t *istate); -extern void data_access_bit_fault(uint64_t vector, istate_t *istate); -extern void data_access_rights_fault(uint64_t vector, istate_t *istate); -extern void page_not_present(uint64_t vector, istate_t *istate); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/vhpt.h =================================================================== --- kernel/arch/ia64/include/mm/vhpt.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,60 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file -*/ - -#ifndef KERN_ia64_VHPT_H_ -#define KERN_ia64_VHPT_H_ - -#include -#include - -uintptr_t vhpt_set_up(void); - -static inline vhpt_entry_t tlb_entry_t2vhpt_entry_t(tlb_entry_t tentry) -{ - vhpt_entry_t ventry; - - ventry.word[0] = tentry.word[0]; - ventry.word[1] = tentry.word[1]; - - return ventry; -} - -void vhpt_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); -void vhpt_invalidate_all(void); -void vhpt_invalidate_asid(asid_t asid); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/pal/pal.h =================================================================== --- kernel/arch/ia64/include/pal/pal.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,109 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_PAL_H_ -#define KERN_ia64_PAL_H_ - -#define PAL_OK 0 /**< Call completed without error. */ -#define PAL_UNIMPL -1 /**< Unimplemented procedure. */ -#define PAL_INVARG -2 /**< Invalid argument. */ -#define PAL_ERR -3 /**< Can not compete call without error. */ - -/** These are the indices for PAL_PROC. */ -#define PAL_CACHE_FLUSH 1 -#define PAL_CACHE_INFO 2 -#define PAL_CACHE_INIT 3 -#define PAL_CACHE_PROT_INFO 38 -#define PAL_CACHE_SHARED_INFO 43 -#define PAL_CACHE_SUMMARY 4 - -#define PAL_MEM_ATTRIB 5 -#define PAL_PREFETCH_VISIBILITY 41 -#define PAL_PTCE_INFO 6 -#define PAL_VM_INFO 7 -#define PAL_VM_PAGE_SIZE 34 -#define PAL_VM_SUMMARY 8 -#define PAL_VM_TR_READ 261 - -#define PAL_BUS_GET_FEATURES 9 -#define PAL_BUS_SET_FEATURES 10 -#define PAL_DEBUG_INFO 11 -#define PAL_FIXED_ADDR 12 -#define PAL_FREQ_BASE 13 -#define PAL_FREQ_RATIOS 14 -#define PAL_LOGICAL_TO_PHYSICAL 42 -#define PAL_PERF_MON_INFO 15 -#define PAL_PLATFORM_ADDR 16 -#define PAL_PROC_GET_FEATURES 17 -#define PAL_PROC_SET_FEATURES 18 -#define PAL_REGISTER_INFO 39 -#define PAL_RSE_INFO 19 -#define PAL_VERSION 20 - -#define PAL_MC_CLEAR_LOG 21 -#define PAL_MC_DRAIN 22 -#define PAL_MC_DYNAMIC_STATE 24 -#define PAL_MC_ERROR_INFO 25 -#define PAL_MC_EXPECTED 23 -#define PAL_MC_REGISTER_MEM 27 -#define PAL_MC_RESUME 26 - -#define PAL_HALT 28 -#define PAL_HALT_INFO 257 -#define PAL_HALT_LIGHT 29 - -#define PAL_CACHE_LINE_INIT 31 -#define PAL_CACHE_READ 259 -#define PAL_CACHE_WRITE 260 -#define PAL_TEST_INFO 37 -#define PAL_TEST_PROC 258 - -#define PAL_COPY_INFO 30 -#define PAL_COPY_PAL 256 -#define PAL_ENTER_IA_32_ENV 33 -#define PAL_PMI_ENTRYPOINT 32 - -/* - * Ski PTCE data - */ -#define PAL_PTCE_INFO_BASE() (0x100000000LL) -#define PAL_PTCE_INFO_COUNT1() (2) -#define PAL_PTCE_INFO_COUNT2() (3) -#define PAL_PTCE_INFO_STRIDE1() (0x10000000) -#define PAL_PTCE_INFO_STRIDE2() (0x2000) - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/proc/task.h =================================================================== --- kernel/arch/ia64/include/proc/task.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,52 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64proc - * @{ - */ -/** @file - */ -#include - -#ifndef KERN_ia64_TASK_H_ -#define KERN_ia64_TASK_H_ - -#include - -typedef struct { - bitmap_t *iomap; -} task_arch_t; - - -#define task_create_arch(t) { (t)->arch.iomap = NULL; } -#define task_destroy_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/proc/thread.h =================================================================== --- kernel/arch/ia64/include/proc/thread.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64proc - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_THREAD_H_ -#define KERN_ia64_THREAD_H_ - -typedef struct { -} thread_arch_t; - -#define thr_constructor_arch(t) -#define thr_destructor_arch(t) -#define thread_create_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/register.h =================================================================== --- kernel/arch/ia64/include/register.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,276 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_REGISTER_H_ -#define KERN_ia64_REGISTER_H_ - -#define DCR_PP_MASK (1 << 0) -#define DCR_BE_MASK (1 << 1) -#define DCR_LC_MASK (1 << 2) -#define DCR_DM_MASK (1 << 8) -#define DCR_DP_MASK (1 << 9) -#define DCR_DK_MASK (1 << 10) -#define DCR_DX_MASK (1 << 11) -#define DCR_DR_MASK (1 << 12) -#define DCR_DA_MASK (1 << 13) -#define DCR_DD_MASK (1 << 14) - -#define CR_IVR_MASK 0x0f - -#define PSR_IC_MASK (1 << 13) -#define PSR_I_MASK (1 << 14) -#define PSR_PK_MASK (1 << 15) -#define PSR_DT_MASK (1 << 17) -#define PSR_DFL_MASK (1 << 18) -#define PSR_DFH_MASK (1 << 19) -#define PSR_RT_MASK (1 << 27) -#define PSR_IT_MASK (1 << 36) - -#define PSR_CPL_SHIFT 32 -#define PSR_CPL_MASK_SHIFTED 3 - -#define PSR_RI_SHIFT 41 -#define PSR_RI_LEN 2 - -#define PFM_MASK (~0x3fffffffff) - -#define RSC_MODE_MASK 3 -#define RSC_PL_MASK 12 - -/** Application registers. */ -#define AR_KR0 0 -#define AR_KR1 1 -#define AR_KR2 2 -#define AR_KR3 3 -#define AR_KR4 4 -#define AR_KR5 5 -#define AR_KR6 6 -#define AR_KR7 7 -/* ARs 8-15 are reserved */ -#define AR_RSC 16 -#define AR_BSP 17 -#define AR_BSPSTORE 18 -#define AR_RNAT 19 -/* AR 20 is reserved */ -#define AR_FCR 21 -/* ARs 22-23 are reserved */ -#define AR_EFLAG 24 -#define AR_CSD 25 -#define AR_SSD 26 -#define AR_CFLG 27 -#define AR_FSR 28 -#define AR_FIR 29 -#define AR_FDR 30 -/* AR 31 is reserved */ -#define AR_CCV 32 -/* ARs 33-35 are reserved */ -#define AR_UNAT 36 -/* ARs 37-39 are reserved */ -#define AR_FPSR 40 -/* ARs 41-43 are reserved */ -#define AR_ITC 44 -/* ARs 45-47 are reserved */ -/* ARs 48-63 are ignored */ -#define AR_PFS 64 -#define AR_LC 65 -#define AR_EC 66 -/* ARs 67-111 are reserved */ -/* ARs 112-127 are ignored */ - -/** Control registers. */ -#define CR_DCR 0 -#define CR_ITM 1 -#define CR_IVA 2 -/* CR3-CR7 are reserved */ -#define CR_PTA 8 -/* CR9-CR15 are reserved */ -#define CR_IPSR 16 -#define CR_ISR 17 -/* CR18 is reserved */ -#define CR_IIP 19 -#define CR_IFA 20 -#define CR_ITIR 21 -#define CR_IIPA 22 -#define CR_IFS 23 -#define CR_IIM 24 -#define CR_IHA 25 -/* CR26-CR63 are reserved */ -#define CR_LID 64 -#define CR_IVR 65 -#define CR_TPR 66 -#define CR_EOI 67 -#define CR_IRR0 68 -#define CR_IRR1 69 -#define CR_IRR2 70 -#define CR_IRR3 71 -#define CR_ITV 72 -#define CR_PMV 73 -#define CR_CMCV 74 -/* CR75-CR79 are reserved */ -#define CR_LRR0 80 -#define CR_LRR1 81 -/* CR82-CR127 are reserved */ - -#ifndef __ASM__ - -/** Processor Status Register. */ -typedef union { - uint64_t value; - struct { - unsigned int : 1; - unsigned int be : 1; /**< Big-Endian data accesses. */ - unsigned int up : 1; /**< User Performance monitor enable. */ - unsigned int ac : 1; /**< Alignment Check. */ - unsigned int mfl : 1; /**< Lower floating-point register written. */ - unsigned int mfh : 1; /**< Upper floating-point register written. */ - unsigned int : 7; - unsigned int ic : 1; /**< Interruption Collection. */ - unsigned int i : 1; /**< Interrupt Bit. */ - unsigned int pk : 1; /**< Protection Key enable. */ - unsigned int : 1; - unsigned int dt : 1; /**< Data address Translation. */ - unsigned int dfl : 1; /**< Disabled Floating-point Low register set. */ - unsigned int dfh : 1; /**< Disabled Floating-point High register set. */ - unsigned int sp : 1; /**< Secure Performance monitors. */ - unsigned int pp : 1; /**< Privileged Performance monitor enable. */ - unsigned int di : 1; /**< Disable Instruction set transition. */ - unsigned int si : 1; /**< Secure Interval timer. */ - unsigned int db : 1; /**< Debug Breakpoint fault. */ - unsigned int lp : 1; /**< Lower Privilege transfer trap. */ - unsigned int tb : 1; /**< Taken Branch trap. */ - unsigned int rt : 1; /**< Register Stack Translation. */ - unsigned int : 4; - unsigned int cpl : 2; /**< Current Privilege Level. */ - unsigned int is : 1; /**< Instruction Set. */ - unsigned int mc : 1; /**< Machine Check abort mask. */ - unsigned int it : 1; /**< Instruction address Translation. */ - unsigned int id : 1; /**< Instruction Debug fault disable. */ - unsigned int da : 1; /**< Disable Data Access and Dirty-bit faults. */ - unsigned int dd : 1; /**< Data Debug fault disable. */ - unsigned int ss : 1; /**< Single Step enable. */ - unsigned int ri : 2; /**< Restart Instruction. */ - unsigned int ed : 1; /**< Exception Deferral. */ - unsigned int bn : 1; /**< Register Bank. */ - unsigned int ia : 1; /**< Disable Instruction Access-bit faults. */ - } __attribute__ ((packed)); -} psr_t; - -/** Register Stack Configuration Register */ -typedef union { - uint64_t value; - struct { - unsigned int mode : 2; - unsigned int pl : 2; /**< Privilege Level. */ - unsigned int be : 1; /**< Big-endian. */ - unsigned int : 11; - unsigned int loadrs : 14; - } __attribute__ ((packed)); -} rsc_t; - -/** External Interrupt Vector Register */ -typedef union { - uint8_t vector; - uint64_t value; -} cr_ivr_t; - -/** Task Priority Register */ -typedef union { - uint64_t value; - struct { - unsigned int : 4; - unsigned int mic: 4; /**< Mask Interrupt Class. */ - unsigned int : 8; - unsigned int mmi: 1; /**< Mask Maskable Interrupts. */ - } __attribute__ ((packed)); -} cr_tpr_t; - -/** Interval Timer Vector */ -typedef union { - uint64_t value; - struct { - unsigned int vector : 8; - unsigned int : 4; - unsigned int : 1; - unsigned int : 3; - unsigned int m : 1; /**< Mask. */ - } __attribute__ ((packed)); -} cr_itv_t; - -/** Interruption Status Register */ -typedef union { - uint64_t value; - struct { - union { - /** General Exception code field structuring. */ - uint16_t code; - struct { - unsigned int ge_na : 4; - unsigned int ge_code : 4; - } __attribute__ ((packed)); - }; - uint8_t vector; - unsigned int : 8; - unsigned int x : 1; /**< Execute exception. */ - unsigned int w : 1; /**< Write exception. */ - unsigned int r : 1; /**< Read exception. */ - unsigned int na : 1; /**< Non-access exception. */ - unsigned int sp : 1; /**< Speculative load exception. */ - unsigned int rs : 1; /**< Register stack. */ - unsigned int ir : 1; /**< Incomplete Register frame. */ - unsigned int ni : 1; /**< Nested Interruption. */ - unsigned int so : 1; /**< IA-32 Supervisor Override. */ - unsigned int ei : 2; /**< Excepting Instruction. */ - unsigned int ed : 1; /**< Exception Deferral. */ - unsigned int : 20; - } __attribute__ ((packed)); -} cr_isr_t; - -/** CPUID Register 3 */ -typedef union { - uint64_t value; - struct { - uint8_t number; - uint8_t revision; - uint8_t model; - uint8_t family; - uint8_t archrev; - } __attribute__ ((packed)); -} cpuid3_t; - -#endif /* !__ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/stack.h =================================================================== --- kernel/arch/ia64/include/stack.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_STACK_H_ -#define KERN_ia64_STACK_H_ - -#define STACK_ITEM_SIZE 8 -#define STACK_ALIGNMENT 16 -#define STACK_SCRATCH_AREA_SIZE 16 -#define REGISTER_STACK_ALIGNMENT 8 - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/types.h =================================================================== --- kernel/arch/ia64/include/types.h (revision 100806465eefdbc917d7fcd6da881dc85f5a0c8b) +++ (revision ) @@ -1,66 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_TYPES_H_ -#define KERN_ia64_TYPES_H_ - -typedef uint64_t size_t; -typedef int64_t ssize_t; - -typedef uint64_t uintptr_t; -typedef uint64_t pfn_t; - -typedef uint64_t ipl_t; - -typedef uint64_t sysarg_t; -typedef int64_t native_t; -typedef uint64_t atomic_count_t; - -typedef struct { - sysarg_t fnc; - sysarg_t gp; -} __attribute__((may_alias)) fncptr_t; - -#define INTN_C(c) INT64_C(c) -#define UINTN_C(c) UINT64_C(c) - -#define PRIdn PRId64 /**< Format for native_t. */ -#define PRIun PRIu64 /**< Format for sysarg_t. */ -#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu64 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */