Changeset 6c441cf8 in mainline for kernel/arch
- Timestamp:
- 2008-02-27T11:49:17Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 56976a17
- Parents:
- fdb7795
- Location:
- kernel/arch
- Files:
-
- 17 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/src/mm/page.c
rfdb7795 r6c441cf8 83 83 { 84 84 uintptr_t cur; 85 int i;85 unsigned int i; 86 86 int identity_flags = PAGE_CACHEABLE | PAGE_EXEC | PAGE_GLOBAL | PAGE_WRITE; 87 87 -
kernel/arch/arm32/src/arm32.c
rfdb7795 r6c441cf8 56 56 void arch_pre_main(void) 57 57 { 58 int i;58 unsigned int i; 59 59 60 60 init.cnt = bootinfo.cnt; -
kernel/arch/arm32/src/cpu/cpu.c
rfdb7795 r6c441cf8 57 57 58 58 /** Length of the #imp_data array */ 59 static int imp_data_length = sizeof(imp_data) / sizeof(char *);59 static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *); 60 60 61 61 /** Architecture names */ … … 72 72 73 73 /** Length of the #arch_data array */ 74 static int arch_data_length = sizeof(arch_data) / sizeof(char *);74 static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *); 75 75 76 76 -
kernel/arch/arm32/src/debug/print.c
rfdb7795 r6c441cf8 57 57 static int debug_write(const char *str, size_t count, void *unused) 58 58 { 59 int i;60 for (i = 0; i < count; ++i) {59 unsigned int i; 60 for (i = 0; i < count; ++i) 61 61 putc(str[i]); 62 }62 63 63 return i; 64 64 } -
kernel/arch/ia32xen/src/mm/tlb.c
rfdb7795 r6c441cf8 66 66 void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) 67 67 { 68 int i;68 unsigned int i; 69 69 70 70 for (i = 0; i < cnt; i++) -
kernel/arch/ia32xen/src/smp/mps.c
rfdb7795 r6c441cf8 78 78 struct __l_intr_entry *l_intr_entries = NULL; 79 79 80 int processor_entry_cnt = 0;81 int bus_entry_cnt = 0;82 int io_apic_entry_cnt = 0;83 int io_intr_entry_cnt = 0;84 int l_intr_entry_cnt = 0;80 unsigned int processor_entry_cnt = 0; 81 unsigned int bus_entry_cnt = 0; 82 unsigned int io_apic_entry_cnt = 0; 83 unsigned int io_intr_entry_cnt = 0; 84 unsigned int l_intr_entry_cnt = 0; 85 85 86 86 waitq_t ap_completion_wq; … … 418 418 int mps_irq_to_pin(unsigned int irq) 419 419 { 420 int i;420 unsigned int i; 421 421 422 422 for (i = 0; i < io_intr_entry_cnt; i++) { -
kernel/arch/ia32xen/src/smp/smp.c
rfdb7795 r6c441cf8 99 99 void kmp(void *arg) 100 100 { 101 int i;101 unsigned int i; 102 102 103 103 ASSERT(ops != NULL); -
kernel/arch/ia64/src/ia64.c
rfdb7795 r6c441cf8 63 63 64 64 //#ifdef I460GX 65 int i; 65 unsigned int i; 66 66 67 init.cnt = bootinfo->taskmap.count; 67 for(i=0;i<init.cnt;i++)68 {69 init.tasks[i].addr = ((unsigned long)bootinfo->taskmap.tasks[i].addr)|VRN_MASK;70 68 69 for (i = 0; i < init.cnt; i++) { 70 init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK; 71 init.tasks[i].size = bootinfo->taskmap.tasks[i].size; 71 72 } 72 73 /* -
kernel/arch/ia64/src/mm/tlb.c
rfdb7795 r6c441cf8 60 60 uint32_t count1, count2, stride1, stride2; 61 61 62 int i, j;62 unsigned int i, j; 63 63 64 64 adr = PAL_PTCE_INFO_BASE(); … … 70 70 ipl = interrupts_disable(); 71 71 72 for (i = 0; i < count1; i++) {73 for (j = 0; j < count2; j++) {72 for (i = 0; i < count1; i++) { 73 for (j = 0; j < count2; j++) { 74 74 asm volatile ( 75 75 "ptc.e %0 ;;" -
kernel/arch/mips32/src/cpu/cpu.c
rfdb7795 r6c441cf8 105 105 { 106 106 struct data_t *data; 107 int i;107 unsigned int i; 108 108 109 109 if (m->arch.imp_num & 0x80) { 110 110 /* Count records */ 111 for (i=0;imp_data80[i].vendor;i++) 112 ; 111 for (i = 0; imp_data80[i].vendor; i++); 113 112 if ((m->arch.imp_num & 0x7f) >= i) { 114 printf("imp=%d\n", m->arch.imp_num);113 printf("imp=%d\n", m->arch.imp_num); 115 114 return; 116 115 } 117 116 data = &imp_data80[m->arch.imp_num & 0x7f]; 118 117 } else { 119 for (i=0;imp_data[i].vendor;i++) 120 ; 118 for (i = 0; imp_data[i].vendor; i++); 121 119 if (m->arch.imp_num >= i) { 122 printf("imp=%d\n", m->arch.imp_num);120 printf("imp=%d\n", m->arch.imp_num); 123 121 return; 124 122 } … … 128 126 printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n", 129 127 m->id, data->vendor, data->model, m->arch.rev_num >> 4, 130 128 m->arch.rev_num & 0xf, m->arch.imp_num); 131 129 } 132 130 -
kernel/arch/mips32/src/debugger.c
rfdb7795 r6c441cf8 209 209 ipl_t ipl; 210 210 211 if (argv->intval < 0 || argv->intval> BKPOINTS_MAX) {211 if (argv->intval > BKPOINTS_MAX) { 212 212 printf("Invalid breakpoint number.\n"); 213 213 return 0; -
kernel/arch/mips32/src/drivers/arc.c
rfdb7795 r6c441cf8 119 119 { 120 120 cm_resource_list *configdata; 121 int i;121 unsigned int i; 122 122 123 123 if (!c->configdatasize) … … 162 162 static void arc_print_component(arc_component *c) 163 163 { 164 int i;164 unsigned int i; 165 165 166 166 printf("%s: ",ctypes[c->type]); -
kernel/arch/mips32/src/mm/tlb.c
rfdb7795 r6c441cf8 573 573 void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) 574 574 { 575 int i;575 unsigned int i; 576 576 ipl_t ipl; 577 577 entry_lo_t lo0, lo1; … … 584 584 ipl = interrupts_disable(); 585 585 586 for (i = 0; i < cnt +1; i+=2) {586 for (i = 0; i < cnt + 1; i += 2) { 587 587 hi.value = 0; 588 588 prepare_entry_hi(&hi, asid, page + i * PAGE_SIZE); -
kernel/arch/sparc64/src/mm/frame.c
rfdb7795 r6c441cf8 49 49 void frame_arch_init(void) 50 50 { 51 int i;51 unsigned int i; 52 52 pfn_t confdata; 53 53 -
kernel/arch/sparc64/src/mm/page.c
rfdb7795 r6c441cf8 67 67 68 68 #ifdef CONFIG_SMP 69 int i;69 unsigned int i; 70 70 71 71 /* … … 99 99 { 100 100 unsigned int order; 101 int i;101 unsigned int i; 102 102 103 103 ASSERT(config.cpu_active == 1); -
kernel/arch/sparc64/src/mm/tlb.c
rfdb7795 r6c441cf8 491 491 void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) 492 492 { 493 int i;493 unsigned int i; 494 494 tlb_context_reg_t pc_save, ctx; 495 495 -
kernel/arch/sparc64/src/smp/ipi.c
rfdb7795 r6c441cf8 117 117 void ipi_broadcast_arch(int ipi) 118 118 { 119 int i;119 unsigned int i; 120 120 121 121 void (* func)(void);
Note:
See TracChangeset
for help on using the changeset viewer.