Changes in kernel/arch/amd64/src/ddi/ddi.c [a35b458:63e27ef] in mainline

File:

• kernel/arch/amd64/src/ddi/ddi.c (modified) (5 diffs)

kernel/arch/amd64/src/ddi/ddi.c

@@ -59 +59 @@
         /* First, copy the I/O Permission Bitmap. */
         irq_spinlock_lock(&TASK->lock, false);
-
+        
         size_t ver = TASK->arch.iomapver;
         size_t elements = TASK->arch.iomap.elements;
-
+        
         if (elements > 0) {
                 assert(TASK->arch.iomap.bits);
-
+                
                 bitmap_t iomap;
                 bitmap_initialize(&iomap, TSS_IOMAP_SIZE * 8,
                     CPU->arch.tss->iomap);
                 bitmap_copy(&iomap, &TASK->arch.iomap, elements);
-
+                
                 /*
                  * Set the trailing bits in the last byte of the map to disable
@@ -77 +77 @@
                 bitmap_set_range(&iomap, elements,
                     ALIGN_UP(elements, 8) - elements);
-
+                
                 /*
                  * It is safe to set the trailing eight bits because of the
@@ -84 +84 @@
                 bitmap_set_range(&iomap, ALIGN_UP(elements, 8), 8);
         }
-
+        
         irq_spinlock_unlock(&TASK->lock, false);
-
+        
         /*
          * Second, adjust TSS segment limit.
@@ -93 +93 @@
         ptr_16_64_t cpugdtr;
         gdtr_store(&cpugdtr);
-
+        
         descriptor_t *gdt_p = (descriptor_t *) cpugdtr.base;
         size_t size = bitmap_size(elements);
         gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + size);
         gdtr_load(&cpugdtr);
-
+        
         /*
          * Before we load new TSS limit, the current TSS descriptor
@@ -106 +106 @@
         tss_desc->type = AR_TSS;
         tr_load(GDT_SELECTOR(TSS_DES));
-
+        
         /*
          * Update the generation count so that faults caused by