Changeset 63530c62 in mainline for kernel/arch/sparc64/include


Ignore:
Timestamp:
2006-10-14T19:31:03Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e3890b3f
Parents:
7dcf22a
Message:

Changes in ns16550 and z8530 drivers.
Add some stuff for IRQ notifications to irq_t.

Location:
kernel/arch/sparc64/include/drivers
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/include/drivers/kbd.h

    r7dcf22a r63530c62  
    4747extern kbd_type_t kbd_type;
    4848
    49 extern volatile uint8_t *kbd_virt_address;
    50 
    5149extern void kbd_init(ofw_tree_node_t *node);
    5250
  • kernel/arch/sparc64/include/drivers/ns16550.h

    r7dcf22a r63530c62  
    5151#define LCR_DLAB        0x80    /** Divisor Latch Access bit. */
    5252
    53 static inline uint8_t ns16550_rbr_read(void)
     53/** Structure representing the ns16550 device. */
     54typedef struct {
     55        devno_t devno;
     56        volatile uint8_t *reg;  /** Memory mapped registers of the ns16550. */
     57} ns16550_t;
     58
     59static inline uint8_t ns16550_rbr_read(ns16550_t *dev)
    5460{
    55         return kbd_virt_address[RBR_REG];
     61        return dev->reg[RBR_REG];
    5662}
    5763
    58 static inline uint8_t ns16550_ier_read(void)
     64static inline uint8_t ns16550_ier_read(ns16550_t *dev)
    5965{
    60         return kbd_virt_address[IER_REG];
     66        return dev->reg[IER_REG];
    6167}
    6268
    63 static inline void ns16550_ier_write(uint8_t v)
     69static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v)
    6470{
    65         kbd_virt_address[IER_REG] = v;
     71        dev->reg[IER_REG] = v;
    6672}
    6773
    68 static inline uint8_t ns16550_iir_read(void)
     74static inline uint8_t ns16550_iir_read(ns16550_t *dev)
    6975{
    70         return kbd_virt_address[IIR_REG];
     76        return dev->reg[IIR_REG];
    7177}
    7278
    73 static inline void ns16550_fcr_write(uint8_t v)
     79static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v)
    7480{
    75         kbd_virt_address[FCR_REG] = v;
     81        dev->reg[FCR_REG] = v;
    7682}
    7783
    78 static inline uint8_t ns16550_lcr_read(void)
     84static inline uint8_t ns16550_lcr_read(ns16550_t *dev)
    7985{
    80         return kbd_virt_address[LCR_REG];
     86        return dev->reg[LCR_REG];
    8187}
    8288
    83 static inline void ns16550_lcr_write(uint8_t v)
     89static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v)
    8490{
    85         kbd_virt_address[LCR_REG] = v;
     91        dev->reg[LCR_REG] = v;
    8692}
    8793
    88 static inline uint8_t ns16550_lsr_read(void)
     94static inline uint8_t ns16550_lsr_read(ns16550_t *dev)
    8995{
    90         return kbd_virt_address[LSR_REG];
     96        return dev->reg[LSR_REG];
    9197}
    9298
  • kernel/arch/sparc64/include/drivers/z8530.h

    r7dcf22a r63530c62  
    9292#define RR0_RCA         (0x1<<0)        /** Receive Character Available. */
    9393
    94 static inline void z8530_write(index_t chan, uint8_t reg, uint8_t val)
     94/** Structure representing the z8530 device. */
     95typedef struct {
     96        devno_t devno;
     97        volatile uint8_t *reg;          /** Memory mapped registers of the z8530. */
     98} z8530_t;
     99
     100static inline void z8530_write(z8530_t *dev, index_t chan, uint8_t reg, uint8_t val)
    95101{
    96102        /*
     
    98104         * command as their bit 3 is 1.
    99105         */
    100         kbd_virt_address[WR0+chan] = reg;       /* select register */
    101         kbd_virt_address[WR0+chan] = val;       /* write value */
     106        dev->reg[WR0+chan] = reg;       /* select register */
     107        dev->reg[WR0+chan] = val;       /* write value */
    102108}
    103109
    104 static inline void z8530_write_a(uint8_t reg, uint8_t val)
     110static inline void z8530_write_a(z8530_t *dev, uint8_t reg, uint8_t val)
    105111{
    106         z8530_write(Z8530_CHAN_A, reg, val);
     112        z8530_write(dev, Z8530_CHAN_A, reg, val);
    107113}
    108 static inline void z8530_write_b(uint8_t reg, uint8_t val)
     114static inline void z8530_write_b(z8530_t *dev, uint8_t reg, uint8_t val)
    109115{
    110         z8530_write(Z8530_CHAN_B, reg, val);
     116        z8530_write(dev, Z8530_CHAN_B, reg, val);
    111117}
    112118
    113 static inline uint8_t z8530_read(index_t chan, uint8_t reg)
     119static inline uint8_t z8530_read(z8530_t *dev, index_t chan, uint8_t reg)
    114120{
    115121        /*
     
    117123         * command as their bit 3 is 1.
    118124         */
    119         kbd_virt_address[WR0+chan] = reg;       /* select register */
    120         return kbd_virt_address[WR0+chan];
     125        dev->reg[WR0+chan] = reg;       /* select register */
     126        return dev->reg[WR0+chan];
    121127}
    122128
    123 static inline uint8_t z8530_read_a(uint8_t reg)
     129static inline uint8_t z8530_read_a(z8530_t *dev, uint8_t reg)
    124130{
    125         return z8530_read(Z8530_CHAN_A, reg);
     131        return z8530_read(dev, Z8530_CHAN_A, reg);
    126132}
    127 static inline uint8_t z8530_read_b(uint8_t reg)
     133static inline uint8_t z8530_read_b(z8530_t *dev, uint8_t reg)
    128134{
    129         return z8530_read(Z8530_CHAN_B, reg);
     135        return z8530_read(dev, Z8530_CHAN_B, reg);
    130136}
    131137
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