Changeset 582a0b8 in mainline for uspace/drv/nic
- Timestamp:
- 2017-05-08T19:20:39Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- d2c8533
- Parents:
- 73db198
- Location:
- uspace/drv/nic
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/nic/ar9271/ar9271.c
r73db198 r582a0b8 43 43 #include <nic.h> 44 44 #include <macros.h> 45 #include <thread.h> 45 46 #include "ath_usb.h" 46 47 #include "wmi.h" … … 817 818 818 819 /* Wait until firmware is ready - wait for 1 second to be sure. */ 819 sleep(1);820 thread_sleep(1); 820 821 821 822 return rc; -
uspace/drv/nic/ar9271/hw.c
r73db198 r582a0b8 35 35 #include <macros.h> 36 36 #include <usb/debug.h> 37 #include <unistd.h>38 37 #include <errno.h> 39 38 #include <nic.h> -
uspace/drv/nic/e1k/e1k.c
r73db198 r582a0b8 38 38 #include <adt/list.h> 39 39 #include <align.h> 40 #include <thread.h> 40 41 #include <byteorder.h> 41 42 #include <irc.h> … … 365 366 ctrl &= ~(CTRL_SLU); 366 367 fibril_mutex_unlock(&e1000->ctrl_lock); 367 usleep(10);368 thread_usleep(10); 368 369 fibril_mutex_lock(&e1000->ctrl_lock); 369 370 ctrl |= CTRL_SLU; … … 1717 1718 1718 1719 /* Wait for the reset */ 1719 usleep(20);1720 thread_usleep(20); 1720 1721 1721 1722 /* check if RST_BIT cleared */ … … 1805 1806 * transfers to descriptors. 1806 1807 */ 1807 usleep(100);1808 thread_usleep(100); 1808 1809 1809 1810 return EOK; … … 2223 2224 uint32_t eerd = E1000_REG_READ(e1000, E1000_EERD); 2224 2225 while ((eerd & e1000->info.eerd_done) == 0) { 2225 usleep(1);2226 thread_usleep(1); 2226 2227 eerd = E1000_REG_READ(e1000, E1000_EERD); 2227 2228 } -
uspace/drv/nic/ne2k/dp8390.c
r73db198 r582a0b8 59 59 #include <stdio.h> 60 60 #include <ddi.h> 61 #include <thread.h> 61 62 #include "dp8390.h" 62 63 … … 171 172 /* Reset the ethernet card */ 172 173 uint8_t val = pio_read_8(ne2k->port + NE2K_RESET); 173 usleep(2000);174 thread_usleep(2000); 174 175 pio_write_8(ne2k->port + NE2K_RESET, val); 175 usleep(2000);176 thread_usleep(2000); 176 177 177 178 /* Reset the DP8390 */ -
uspace/drv/nic/rtl8139/driver.c
r73db198 r582a0b8 30 30 #include <errno.h> 31 31 #include <align.h> 32 #include <thread.h> 32 33 #include <byteorder.h> 33 34 #include <libarch/barrier.h> … … 471 472 memory_barrier(); 472 473 while(pio_read_8(io_base + CR) & CR_RST) { 473 usleep(1);474 thread_usleep(1); 474 475 read_barrier(); 475 476 } -
uspace/drv/nic/rtl8139/general.c
r73db198 r582a0b8 35 35 36 36 #include <mem.h> 37 #include <unistd.h>38 37 #include <errno.h> 39 38 #include <stdint.h> -
uspace/drv/nic/rtl8139/general.h
r73db198 r582a0b8 35 35 #define RTL8139_GENERAL_H_ 36 36 37 #include <unistd.h> 37 #include <stddef.h> 38 #include <time.h> 38 39 39 40 /** Number of microseconds in second */ -
uspace/drv/nic/rtl8169/driver.c
r73db198 r582a0b8 35 35 36 36 #include <as.h> 37 #include <thread.h> 37 38 #include <ddf/log.h> 38 39 #include <ddf/interrupt.h> … … 760 761 memory_barrier(); 761 762 while (pio_read_8(rtl8169->regs + CR) & CR_RST) { 762 usleep(1);763 thread_usleep(1); 763 764 read_barrier(); 764 765 } … … 1174 1175 do { 1175 1176 phyar = pio_read_32(rtl8169->regs + PHYAR); 1176 usleep(20);1177 thread_usleep(20); 1177 1178 } while ((phyar & PHYAR_RW_WRITE) == 0); 1178 1179 … … 1192 1193 do { 1193 1194 phyar = pio_read_32(rtl8169->regs + PHYAR); 1194 usleep(20);1195 thread_usleep(20); 1195 1196 } while ((phyar & PHYAR_RW_WRITE) != 0); 1196 1197 1197 usleep(20);1198 thread_usleep(20); 1198 1199 } 1199 1200
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