Changeset 57da95c in mainline for kernel/arch/sparc64/src

Timestamp:

2006-09-18T11:47:28Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

29b2bbf

Parents:

f1d1f5d3

Message:

• Create a dedicated slab cache for as_t objects and switch from malloc/free to slab_alloc/slab_free for

them.

• Slightly fix and improve both the kernel and userspace atomic_add() on sparc64.

• More TSB work on the sparc64 front.

Location:

kernel/arch/sparc64/src

Files:

• mm/as.c (modified) (3 diffs)
• proc/scheduler.c (modified) (1 diff)

kernel/arch/sparc64/src/mm/as.c

@@ -37 +37 @@
 #include <genarch/mm/as_ht.h>
 #include <genarch/mm/asid_fifo.h>
+#include <debug.h>
+
+#ifdef CONFIG_TSB
+#include <arch/mm/tsb.h>
+#endif
 
 /** Architecture dependent address space init. */
@@ -45 +50 @@
 }
 
+/** Perform sparc64-specific tasks when an address space becomes active on the processor.
+ *
+ * Install ASID and map TSBs.
+ *
+ * @param as Address space.
+ */
 void as_install_arch(as_t *as)
 {
         tlb_context_reg_t ctx;
+        
+        /*
+         * Note that we don't lock the address space.
+         * That's correct - we can afford it here
+         * because we only read members that are
+         * currently read-only.
+         */
         
         /*
@@ -59 +77 @@
         ctx.context = as->asid;
         mmu_secondary_context_write(ctx.v);
+
+#ifdef CONFIG_TSB       
+        if (as != AS_KERNEL) {
+                uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
+
+                ASSERT(as->arch.itsb && as->arch.dtsb);
+
+                uintptr_t tsb = as->arch.itsb;
+                
+                if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
+                        /*
+                         * TSBs were allocated from memory not covered
+                         * by the locked 4M kernel DTLB entry. We need
+                         * to map both TSBs explicitly.
+                         */
+                        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
+                        dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
+                }
+                
+                /*
+                 * Setup TSB Base registers.
+                 */
+                tsb_base_reg_t tsb_base;
+                
+                tsb_base.value = 0;
+                tsb_base.size = TSB_SIZE;
+                tsb_base.split = 0;
+
+                tsb_base.base = as->arch.itsb >> PAGE_WIDTH;
+                itsb_base_write(tsb_base.value);
+                tsb_base.base = as->arch.dtsb >> PAGE_WIDTH;
+                dtsb_base_write(tsb_base.value);
+        }
+#endif
+}
+
+/** Perform sparc64-specific tasks when an address space is removed from the processor.
+ *
+ * Demap TSBs.
+ *
+ * @param as Address space.
+ */
+void as_deinstall_arch(as_t *as)
+{
+
+        /*
+         * Note that we don't lock the address space.
+         * That's correct - we can afford it here
+         * because we only read members that are
+         * currently read-only.
+         */
+
+#ifdef CONFIG_TSB
+        if (as != AS_KERNEL) {
+                uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
+
+                ASSERT(as->arch.itsb && as->arch.dtsb);
+
+                uintptr_t tsb = as->arch.itsb;
+                
+                if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
+                        /*
+                         * TSBs were allocated from memory not covered
+                         * by the locked 4M kernel DTLB entry. We need
+                         * to demap the entry installed by as_install_arch().
+                         */
+                        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
+                }
+                
+        }
+#endif
 }
 

kernel/arch/sparc64/src/proc/scheduler.c

@@ -121 +121 @@
         if ((THREAD->flags & THREAD_FLAG_USPACE)) {
                 /*
-                 * If this thread executes also in userspace, we have to force all
-                 * its still-active userspace windows into the userspace window buffer
-                 * and demap the buffer from DTLB.
+                 * If this thread executes also in userspace, we have to
+                 * demap the userspace window buffer from DTLB.
                  */
                 ASSERT(THREAD->arch.uspace_window_buffer);