Index: arch/amd64/include/atomic.h
===================================================================
--- arch/amd64/include/atomic.h	(revision 6c6a19e69c1590fe11db392c881db419fd28d8e1)
+++ arch/amd64/include/atomic.h	(revision 53f98219259f3ae305745185632cbe185fb7c871)
@@ -31,4 +31,6 @@
 
 #include <arch/types.h>
+#include <arch/barrier.h>
+#include <preemption.h>
 
 typedef struct { volatile __u64 count; } atomic_t;
@@ -102,5 +104,30 @@
 
 
-extern void spinlock_arch(volatile int *val);
+/** AMD64 specific fast spinlock */
+static inline void atomic_lock_arch(atomic_t *val)
+{
+	__u64 tmp;
+
+	preemption_disable();
+	__asm__ volatile (
+		"0:;"
+#ifdef CONFIG_HT
+		"pause;" /* Pentium 4's HT love this instruction */
+#endif
+		"mov %0, %1;"
+		"testq %1, %1;"
+		"jnz 0b;"       /* Leightweight looping on locked spinlock */
+		
+		"incq %1;"      /* now use the atomic operation */
+		"xchgq %0, %1;"
+		"testq %1, %1;"
+		"jnz 0b;"
+                : "=m"(val->count),"=r"(tmp)
+		);
+	/*
+	 * Prevent critical section code from bleeding out this way up.
+	 */
+	CS_ENTER_BARRIER();
+}
 
 #endif
Index: arch/amd64/include/syscall.h
===================================================================
--- arch/amd64/include/syscall.h	(revision 6c6a19e69c1590fe11db392c881db419fd28d8e1)
+++ arch/amd64/include/syscall.h	(revision 53f98219259f3ae305745185632cbe185fb7c871)
@@ -32,6 +32,4 @@
 #include <arch/types.h>
 
-extern __native syscall_handler(__native a1,__native a2, __native a3, 
-				__native a4, __native id);
 extern void syscall_setup_cpu(void);