Changeset 534bcdf in mainline for kernel/arch/mips32/src


Ignore:
Timestamp:
2019-04-06T09:02:46Z (7 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
3daba42e
Parents:
fd67c9f
Message:

Always configure pic1 to start 8 IRQs after pic0

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/mips32/src/mach/malta/malta.c

    rfd67c9f r534bcdf  
    9999        irq_init(ISA_IRQ_COUNT, ISA_IRQ_COUNT);
    100100
    101         i8259_init((i8259_t *) PIC0_BASE, (i8259_t *) PIC1_BASE, 2, 0, 8);
     101        i8259_init((i8259_t *) PIC0_BASE, (i8259_t *) PIC1_BASE, 2, 0);
    102102
    103103        int_handler[INT_HW0] = malta_isa_irq_handler;
Note: See TracChangeset for help on using the changeset viewer.