Index: kernel/arch/arm32/include/arch/barrier.h
===================================================================
--- kernel/arch/arm32/include/arch/barrier.h	(revision 7c3fb9bd77e4d2f6c10517a052e567f176fa91ee)
+++ kernel/arch/arm32/include/arch/barrier.h	(revision 4f8772d4d5ecb28999d787aebab937222f9f97d8)
@@ -49,5 +49,6 @@
 
 #if defined PROCESSOR_ARCH_armv7_a
-/* ARMv7 uses instructions for memory barriers see ARM Architecture reference
+/*
+ * ARMv7 uses instructions for memory barriers see ARM Architecture reference
  * manual for details:
  * DMB: ch. A8.8.43 page A8-376
@@ -69,5 +70,6 @@
  * ARM Architecture Reference Manual version I ch. B.3.2.1 p. B3-4
  */
-/* ARMv6- use system control coprocessor (CP15) for memory barrier instructions.
+/*
+ * ARMv6- use system control coprocessor (CP15) for memory barrier instructions.
  * Although at least mcr p15, 0, r0, c7, c10, 4 is mentioned in earlier archs,
  * CP15 implementation is mandatory only for armv6+.
@@ -86,5 +88,6 @@
 #endif
 #else
-/* Older manuals mention syscalls as a way to implement cache coherency and
+/*
+ * Older manuals mention syscalls as a way to implement cache coherency and
  * barriers. See for example ARM Architecture Reference Manual Version D
  * chapter 2.7.4 Prefetching and self-modifying code (p. A2-28)
@@ -123,6 +126,8 @@
 	inst_barrier();                /* Wait for Inst refetch */\
 } while (0)
-/* @note: Cache type register is not available in uspace. We would need
- * to export the cache line value, or use syscall for uspace smc_coherence */
+/*
+ * @note: Cache type register is not available in uspace. We would need
+ * to export the cache line value, or use syscall for uspace smc_coherence
+ */
 #define smc_coherence_block(a, l) \
 do { \
Index: kernel/arch/arm32/src/fpu_context.c
===================================================================
--- kernel/arch/arm32/src/fpu_context.c	(revision 7c3fb9bd77e4d2f6c10517a052e567f176fa91ee)
+++ kernel/arch/arm32/src/fpu_context.c	(revision 4f8772d4d5ecb28999d787aebab937222f9f97d8)
@@ -117,12 +117,14 @@
 static int fpu_have_coprocessor_access(void)
 {
-/*
- * The register containing the information (CPACR) is not available on armv6-
- * rely on user decision to use CONFIG_FPU.
- */
+	/*
+	 * The register containing the information (CPACR) is not available
+	 * on armv6-. Rely on user decision to use CONFIG_FPU.
+	 */
 #ifdef PROCESSOR_ARCH_armv7_a
 	const uint32_t cpacr = CPACR_read();
-	/* FPU needs access to coprocessor 10 and 11.
-	 * Moreover they need to have same access enabled */
+	/*
+	 * FPU needs access to coprocessor 10 and 11.
+	 * Moreover, they need to have same access enabled
+	 */
 	if (((cpacr & CPACR_CP_MASK(10)) != CPACR_CP_FULL_ACCESS(10)) &&
 	    ((cpacr & CPACR_CP_MASK(11)) != CPACR_CP_FULL_ACCESS(11))) {
@@ -131,4 +133,5 @@
 	}
 #endif
+
 	return 1;
 }
@@ -147,13 +150,15 @@
 static void fpu_enable_coprocessor_access(void)
 {
-/*
- * The register containing the information (CPACR) is not available on armv6-
- * rely on user decision to use CONFIG_FPU.
- */
+	/*
+	 * The register containing the information (CPACR) is not available
+	 * on armv6-. Rely on user decision to use CONFIG_FPU.
+	 */
 #ifdef PROCESSOR_ARCH_armv7_a
 	/* Allow coprocessor access */
 	uint32_t cpacr = CPACR_read();
-	/* FPU needs access to coprocessor 10 and 11.
-	 * Moreover, they need to have same access enabled */
+	/*
+	 * FPU needs access to coprocessor 10 and 11.
+	 * Moreover, they need to have same access enabled
+	 */
 	cpacr &= ~(CPACR_CP_MASK(10) | CPACR_CP_MASK(11));
 	cpacr |= (CPACR_CP_FULL_ACCESS(10) | CPACR_CP_FULL_ACCESS(11));
@@ -172,5 +177,6 @@
 	fpexc_write(0);
 	fpu_enable();
-	/* Mask all exception traps,
+	/*
+	 * Mask all exception traps,
 	 * The bits are RAZ/WI on archs that don't support fpu exc traps.
 	 */
Index: kernel/generic/src/ipc/sysipc.c
===================================================================
--- kernel/generic/src/ipc/sysipc.c	(revision 7c3fb9bd77e4d2f6c10517a052e567f176fa91ee)
+++ kernel/generic/src/ipc/sysipc.c	(revision 4f8772d4d5ecb28999d787aebab937222f9f97d8)
@@ -119,7 +119,7 @@
 
 
-/***********************************************************************
+/*
  * Functions that preprocess answer before sending it to the recepient.
- ***********************************************************************/
+ */
 
 /** Decide if the caller (e.g. ipc_answer()) should save the old call contents
@@ -228,7 +228,7 @@
 }
 
-/*******************************************************************************
+/*
  * Functions called to process received call/answer before passing it to uspace.
- *******************************************************************************/
+ */
 
 /** Do basic kernel processing of received call answer.
Index: kernel/generic/src/printf/printf_core.c
===================================================================
--- kernel/generic/src/printf/printf_core.c	(revision 7c3fb9bd77e4d2f6c10517a052e567f176fa91ee)
+++ kernel/generic/src/printf/printf_core.c	(revision 4f8772d4d5ecb28999d787aebab937222f9f97d8)
@@ -784,7 +784,7 @@
 
 			switch (uc) {
-			/*
-			 * String and character conversions.
-			 */
+				/*
+				 * String and character conversions.
+				 */
 			case 's':
 				if (qualifier == PrintfQualifierLong)
@@ -816,7 +816,7 @@
 				continue;
 
-			/*
-			 * Integer values
-			 */
+				/*
+				 * Integer values
+				 */
 			case 'P':
 				/* Pointer */
@@ -848,12 +848,12 @@
 				break;
 
-			/* Percentile itself */
 			case '%':
+				/* Percentile itself */
 				j = i;
 				continue;
 
-			/*
-			 * Bad formatting.
-			 */
+				/*
+				 * Bad formatting.
+				 */
 			default:
 				/*
Index: kernel/generic/src/udebug/udebug_ipc.c
===================================================================
--- kernel/generic/src/udebug/udebug_ipc.c	(revision 7c3fb9bd77e4d2f6c10517a052e567f176fa91ee)
+++ kernel/generic/src/udebug/udebug_ipc.c	(revision 4f8772d4d5ecb28999d787aebab937222f9f97d8)
@@ -54,5 +54,5 @@
 {
 	switch (IPC_GET_ARG1(call->data)) {
-	/* future UDEBUG_M_REGS_WRITE, UDEBUG_M_MEM_WRITE: */
+		/* future UDEBUG_M_REGS_WRITE, UDEBUG_M_MEM_WRITE: */
 	default:
 		break;
@@ -193,7 +193,9 @@
 
 	IPC_SET_RETVAL(call->data, 0);
-	/* ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
-	   same code in process_answer() can be used
-	   (no way to distinguish method in answer) */
+	/*
+	 * ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
+	 * same code in process_answer() can be used
+	 * (no way to distinguish method in answer)
+	 */
 	IPC_SET_ARG1(call->data, uspace_addr);
 	IPC_SET_ARG2(call->data, copied);
@@ -238,7 +240,9 @@
 
 	IPC_SET_RETVAL(call->data, 0);
-	/* ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
-	   same code in process_answer() can be used
-	   (no way to distinguish method in answer) */
+	/*
+	 * ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
+	 * same code in process_answer() can be used
+	 * (no way to distinguish method in answer)
+	 */
 	IPC_SET_ARG1(call->data, uspace_addr);
 	IPC_SET_ARG2(call->data, to_copy);
@@ -285,7 +289,9 @@
 
 	IPC_SET_RETVAL(call->data, 0);
-	/* ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
-	   same code in process_answer() can be used
-	   (no way to distinguish method in answer) */
+	/*
+	 * ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
+	 * same code in process_answer() can be used
+	 * (no way to distinguish method in answer)
+	 */
 	IPC_SET_ARG1(call->data, uspace_addr);
 	IPC_SET_ARG2(call->data, to_copy);
@@ -326,7 +332,9 @@
 
 	IPC_SET_RETVAL(call->data, 0);
-	/* ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
-	   same code in process_answer() can be used
-	   (no way to distinguish method in answer) */
+	/*
+	 * ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
+	 * same code in process_answer() can be used
+	 * (no way to distinguish method in answer)
+	 */
 	IPC_SET_ARG1(call->data, uspace_addr);
 	IPC_SET_ARG2(call->data, 6 * sizeof(sysarg_t));
@@ -367,7 +375,9 @@
 
 	IPC_SET_RETVAL(call->data, 0);
-	/* ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
-	   same code in process_answer() can be used
-	   (no way to distinguish method in answer) */
+	/*
+	 * ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
+	 * same code in process_answer() can be used
+	 * (no way to distinguish method in answer)
+	 */
 	IPC_SET_ARG1(call->data, uspace_addr);
 	IPC_SET_ARG2(call->data, to_copy);
@@ -406,7 +416,9 @@
 
 	IPC_SET_RETVAL(call->data, 0);
-	/* ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
-	   same code in process_answer() can be used
-	   (no way to distinguish method in answer) */
+	/*
+	 * ARG1=dest, ARG2=size as in IPC_M_DATA_READ so that
+	 * same code in process_answer() can be used
+	 * (no way to distinguish method in answer)
+	 */
 	IPC_SET_ARG1(call->data, uspace_dst);
 	IPC_SET_ARG2(call->data, size);
