- Timestamp:
- 2006-03-17T11:41:05Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 23d22eb
- Parents:
- 5a7d9d1
- Location:
- arch/amd64
- Files:
-
- 2 added
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/amd64/Makefile.inc
r5a7d9d1 r4e49572 104 104 arch/$(ARCH)/src/proc/scheduler.c \ 105 105 arch/$(ARCH)/src/userspace.c \ 106 arch/$(ARCH)/src/syscall.c 106 arch/$(ARCH)/src/syscall.c \ 107 arch/$(ARCH)/src/debugger.c 107 108 108 109 ifeq ($(CONFIG_SMP),y) -
arch/amd64/include/asm.h
r5a7d9d1 r4e49572 142 142 } 143 143 144 /** Read CR0145 *146 * Return value in CR0147 *148 * @return Value read.149 */150 static inline __u64 read_cr0(void)151 {152 __u64 v;153 __asm__ volatile ("movq %%cr0,%0\n" : "=r" (v));154 return v;155 }156 157 /** Read CR2158 *159 * Return value in CR2160 *161 * @return Value read.162 */163 static inline __u64 read_cr2(void)164 {165 __u64 v;166 __asm__ volatile ("movq %%cr2,%0\n" : "=r" (v));167 return v;168 }169 170 /** Write CR3171 *172 * Write value to CR3.173 *174 * @param v Value to be written.175 */176 static inline void write_cr3(__u64 v)177 {178 __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v));179 }180 181 /** Read CR3182 *183 * Return value in CR3184 *185 * @return Value read.186 */187 static inline __u64 read_cr3(void)188 {189 __u64 v;190 __asm__ volatile ("movq %%cr3,%0" : "=r" (v));191 return v;192 }193 194 144 /** Write to MSR */ 195 145 static inline void write_msr(__u32 msr, __u64 value) … … 251 201 } 252 202 203 #define GEN_READ_REG(reg) static inline __native read_ ##reg (void) \ 204 { \ 205 __native res; \ 206 __asm__ volatile ("movq %%" #reg ", %0" : "=r" (res) ); \ 207 return res; \ 208 } 209 210 #define GEN_WRITE_REG(reg) static inline void write_ ##reg (__native regn) \ 211 { \ 212 __asm__ volatile ("movq %0, %%" #reg : : "r" (regn)); \ 213 } 214 215 GEN_READ_REG(cr0); 216 GEN_READ_REG(cr2); 217 GEN_READ_REG(cr3); 218 GEN_WRITE_REG(cr3); 219 220 GEN_READ_REG(dr0); 221 GEN_READ_REG(dr1); 222 GEN_READ_REG(dr2); 223 GEN_READ_REG(dr3); 224 GEN_READ_REG(dr6); 225 GEN_READ_REG(dr7); 226 227 GEN_WRITE_REG(dr0); 228 GEN_WRITE_REG(dr1); 229 GEN_WRITE_REG(dr2); 230 GEN_WRITE_REG(dr3); 231 GEN_WRITE_REG(dr6); 232 GEN_WRITE_REG(dr7); 233 234 253 235 extern size_t interrupt_handler_size; 254 236 extern void interrupt_handlers(void); -
arch/amd64/include/cpu.h
r5a7d9d1 r4e49572 30 30 #define __amd64_CPU_H__ 31 31 32 #define RFLAGS_RF (1 << 16) 32 33 33 34 #define EFER_MSR_NUM 0xc0000080 -
arch/amd64/include/interrupt.h
r5a7d9d1 r4e49572 54 54 #endif 55 55 56 #define VECTOR_DEBUG 1 56 57 #define VECTOR_PIC_SPUR (IVT_IRQBASE+IRQ_PIC_SPUR) 57 58 #define VECTOR_CLK (IVT_IRQBASE+IRQ_CLK) -
arch/amd64/src/amd64.c
r5a7d9d1 r4e49572 47 47 #include <interrupt.h> 48 48 #include <arch/syscall.h> 49 #include <arch/debugger.h> 49 50 50 51 /** Disable I/O on non-privileged levels … … 130 131 if (config.cpu_active == 1) { 131 132 ega_init(); /* video */ 133 /* Enable debugger */ 134 debugger_init(); 132 135 } 133 136 /* Setup fast SYSCALL/SYSRET */ 134 137 syscall_setup_cpu(); 135 138 136 139 } 137 140 -
arch/amd64/src/proc/scheduler.c
r5a7d9d1 r4e49572 33 33 #include <arch/context.h> /* SP_DELTA */ 34 34 #include <arch/asm.h> 35 #include <arch/debugger.h> 35 36 36 37 void before_thread_runs_arch(void) … … 43 44 (__u64)&THREAD->kstack); 44 45 swapgs(); 46 47 48 #ifdef CONFIG_DEBUG_AS_WATCHPOINT 49 /* Set watchpoint on AS to ensure that nobody sets it to zero */ 50 static int old_slot = -1; 51 if (old_slot >=0) 52 breakpoint_del(old_slot); 53 old_slot = breakpoint_add(&((the_t *) THREAD->kstack)->as, 54 BKPOINT_WRITE | BKPOINT_CHECK_ZERO); 55 #endif 45 56 } 46 57
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