- Timestamp:
- 2014-01-07T11:29:16Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 4edd71f6
- Parents:
- fd07e57b (diff), 226f72e (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Location:
- boot/arch/arm32
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/arm32/Makefile.inc
rfd07e57b r4aa2a27 43 43 endif 44 44 45 ifeq ($(MACHINE), raspberrypi) 46 BOOT_OUTPUT = image.boot 47 POST_OUTPUT = $(ROOT_PATH)/uImage.bin 48 LADDR = 0x00008000 49 SADDR = 0x00008000 50 POSTBUILD = Makefile.uboot 51 endif 52 45 53 BFD_NAME = elf32-littlearm 46 54 BFD_OUTPUT = $(BFD_NAME) -
boot/arch/arm32/include/arch.h
rfd07e57b r4aa2a27 46 46 #elif defined MACHINE_beaglebone 47 47 #define BOOT_BASE 0x80000000 48 #elif defined MACHINE_raspberrypi 49 #define BOOT_BASE 0x00008000 48 50 #else 49 51 #define BOOT_BASE 0x00000000 -
boot/arch/arm32/include/main.h
rfd07e57b r4aa2a27 75 75 #define ICP_SCONS_ADDR 0x16000000 76 76 77 /** Raspberry PI serial console registers */ 78 #define BCM2835_UART0_BASE 0x20201000 79 #define BCM2835_UART0_DR (BCM2835_UART0_BASE + 0x00) 80 #define BCM2835_UART0_FR (BCM2835_UART0_BASE + 0x18) 81 #define BCM2835_UART0_ILPR (BCM2835_UART0_BASE + 0x20) 82 #define BCM2835_UART0_IBRD (BCM2835_UART0_BASE + 0x24) 83 #define BCM2835_UART0_FBRD (BCM2835_UART0_BASE + 0x28) 84 #define BCM2835_UART0_LCRH (BCM2835_UART0_BASE + 0x2C) 85 #define BCM2835_UART0_CR (BCM2835_UART0_BASE + 0x30) 86 #define BCM2835_UART0_ICR (BCM2835_UART0_BASE + 0x44) 87 88 #define BCM2835_UART0_FR_TXFF (1 << 5) 89 #define BCM2835_UART0_LCRH_FEN (1 << 4) 90 #define BCM2835_UART0_LCRH_WL8 ((1 << 5) | (1 << 6)) 91 #define BCM2835_UART0_CR_UARTEN (1 << 0) 92 #define BCM2835_UART0_CR_TXE (1 << 8) 93 #define BCM2835_UART0_CR_RXE (1 << 9) 94 95 96 77 97 extern void bootstrap(void); 78 98 -
boot/arch/arm32/include/mm.h
rfd07e57b r4aa2a27 68 68 #define AM335x_RAM_END 0xC0000000 69 69 70 /** Start of ram memory on BCM2835 */ 71 #define BCM2835_RAM_START 0 72 /** End of ram memory on BCM2835 */ 73 #define BCM2835_RAM_END 0x20000000 70 74 71 75 /* Page table level 0 entry - "section" format is used -
boot/arch/arm32/src/mm.c
rfd07e57b r4aa2a27 116 116 if (address >= AM335x_RAM_START && address < AM335x_RAM_END) 117 117 return 1; 118 #elif defined MACHINE_raspberrypi 119 if (address < BCM2835_RAM_END) 120 return 1; 118 121 #endif 119 122 return address * 0; -
boot/arch/arm32/src/putchar.c
rfd07e57b r4aa2a27 122 122 #endif 123 123 124 #ifdef MACHINE_raspberrypi 125 126 static int raspi_init; 127 128 static inline void write32(uint32_t addr, uint32_t data) 129 { 130 *(volatile uint32_t *)(addr) = data; 131 } 132 133 static inline uint32_t read32(uint32_t addr) 134 { 135 return *(volatile uint32_t *)(addr); 136 } 137 138 static void scons_init_raspi(void) 139 { 140 write32(BCM2835_UART0_CR, 0x0); /* Disable UART */ 141 write32(BCM2835_UART0_ICR, 0x7f); /* Clear interrupts */ 142 write32(BCM2835_UART0_IBRD, 1); /* Set integer baud rate */ 143 write32(BCM2835_UART0_FBRD, 40); /* Set fractional baud rate */ 144 write32(BCM2835_UART0_LCRH, 145 BCM2835_UART0_LCRH_FEN | /* Enable FIFOs */ 146 BCM2835_UART0_LCRH_WL8); /* Word length: 8 */ 147 write32(BCM2835_UART0_CR, 148 BCM2835_UART0_CR_UARTEN | /* Enable UART */ 149 BCM2835_UART0_CR_TXE | /* Enable TX */ 150 BCM2835_UART0_CR_RXE); /* Enable RX */ 151 } 152 153 static void scons_sendb_raspi(uint8_t byte) 154 { 155 if (!raspi_init) { 156 scons_init_raspi(); 157 raspi_init = 1; 158 } 159 160 while (read32(BCM2835_UART0_FR) & BCM2835_UART0_FR_TXFF); 161 162 write32(BCM2835_UART0_DR, byte); 163 } 164 #endif 165 124 166 /** Send a byte to the serial console. 125 167 * … … 139 181 #ifdef MACHINE_integratorcp 140 182 scons_sendb_icp(byte); 183 #endif 184 #ifdef MACHINE_raspberrypi 185 scons_sendb_raspi(byte); 141 186 #endif 142 187 }
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