Changeset 4872160 in mainline for boot/arch/sparc64/src
- Timestamp:
- 2010-05-04T10:44:55Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 568db0f
- Parents:
- bb252ca
- Location:
- boot/arch/sparc64/src
- Files:
-
- 1 added
- 2 moved
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/sparc64/src/asm.S
rbb252ca r4872160 1 1 # 2 2 # Copyright (c) 2006 Martin Decky 3 # Copyright (c) 2006 Jakub Jermar 3 # Copyright (c) 2006 Jakub Jermar 4 4 # All rights reserved. 5 5 # … … 28 28 # 29 29 30 #include <stack.h> 31 #include <register.h> 30 #include <arch/arch.h> 31 32 #define ICACHE_SIZE 8192 33 #define ICACHE_LINE_SIZE 32 34 #define ICACHE_SET_BIT (1 << 13) 35 #define ASI_ICACHE_TAG 0x67 32 36 33 37 .register %g2, #scratch 34 38 .register %g3, #scratch 35 36 .text 37 39 .register %g6, #scratch 40 .register %g7, #scratch 41 42 .global start 38 43 .global halt 39 44 .global memcpy 40 45 .global jump_to_kernel 41 46 47 .section BOOTSTRAP, "ax" 48 49 start: 50 ba %xcc, 1f 51 nop 52 53 /* 54 * This header forces SILO to load the image at 0x4000. 55 * More precisely, SILO will think this is an old version of Linux. 56 */ 57 .ascii "HdrS" 58 .word 0 59 .half 0 60 .half 0 61 .half 0 62 .half 0 63 .word 0 64 .word 0 65 66 .align 8 67 1: 68 ! Disable interrupts and disable address masking. 69 70 wrpr %g0, PSTATE_PRIV_BIT, %pstate 71 72 wrpr %g0, NWINDOWS - 2, %cansave ! Set maximum saveable windows 73 wrpr %g0, 0, %canrestore ! Get rid of windows we will never need again 74 wrpr %g0, 0, %otherwin ! Make sure the window state is consistent 75 wrpr %g0, NWINDOWS - 1, %cleanwin ! Prevent needless clean_window traps for kernel 76 77 set initial_stack, %sp 78 add %sp, -STACK_BIAS, %sp 79 80 set ofw_cif, %l0 81 82 ! Initialize OpenFirmware 83 84 call ofw_init 85 stx %o4, [%l0] 86 87 ba %xcc, bootstrap 88 nop 89 90 .align STACK_ALIGNMENT 91 .space STACK_SIZE 92 initial_stack: 93 .space STACK_WINDOW_SAVE_AREA_SIZE 94 95 .text 96 42 97 halt: 43 98 ba %xcc, halt … … 45 100 46 101 memcpy: 47 mov %o0, %o3 ! save dst 102 ! Save dst 103 104 mov %o0, %o3 48 105 add %o1, 7, %g1 49 106 and %g1, -8, %g1 … … 66 123 67 124 2: 68 jmp %o7 + 8 ! exit point 125 ! Exit point 126 127 jmp %o7 + 8 69 128 mov %o3, %o0 70 129 … … 104 163 mov %g2, %g3 105 164 106 jmp %o7 + 8 ! exit point 165 ! Exit point 166 167 jmp %o7 + 8 107 168 mov %o3, %o0 108 169 109 170 jump_to_kernel: 110 171 /* 111 * We have copied code and now we need to guarantee cache coherence.172 * Guarantee cache coherence: 112 173 * 1. Make sure that the code we have moved has drained to main memory. 113 174 * 2. Invalidate I-cache. … … 115 176 */ 116 177 117 #if defined (SUN4U)118 178 /* 119 179 * US3 processors have a write-invalidate cache, so explicitly 120 180 * invalidating it is not required. Whether to invalidate I-cache 121 * or not is decided according to the value of the 5thargument122 * (subarch itecture).181 * or not is decided according to the value of the 3rd argument 182 * (subarch). 123 183 */ 124 cmp %i 4,3184 cmp %i2, SUBARCH_US3 125 185 be %xcc, 1f 126 186 nop … … 129 189 call icache_flush 130 190 nop 131 #endif191 132 192 1: 133 193 membar #StoreStore … … 138 198 flush %i7 139 199 200 ! Jump to kernel 140 201 mov %o0, %l1 141 202 mov %o1, %o0 142 mov %o2, %o1 143 mov %o3, %o2 144 jmp %l1 ! jump to kernel 145 nop 146 147 #define ICACHE_SIZE 8192 148 #define ICACHE_LINE_SIZE 32 149 #define ICACHE_SET_BIT (1 << 13) 150 #define ASI_ICACHE_TAG 0x67 203 mov %o3, %o1 204 205 jmp %l1 206 nop 151 207 152 208 # Flush I-cache … … 163 219 membar #Sync 164 220 retl 221 165 222 ! SF Erratum #51 223 166 224 nop 167 225 … … 172 230 ldx [%l0], %l0 173 231 174 rdpr 175 and 176 wrpr 232 rdpr %pstate, %l1 233 and %l1, ~PSTATE_AM_BIT, %l2 234 wrpr %l2, 0, %pstate 177 235 178 236 jmpl %l0, %o7 -
boot/arch/sparc64/src/ofw.c
rbb252ca r4872160 33 33 */ 34 34 35 #include <ofwarch.h> 36 #include <ofw.h> 35 #include <arch/arch.h> 36 #include <arch/ofw.h> 37 #include <genarch/ofw.h> 38 #include <typedefs.h> 37 39 #include <printf.h> 38 #include <string.h> 39 #include <register.h> 40 #include "main.h" 41 #include "asm.h" 40 #include <halt.h> 41 #include <putchar.h> 42 #include <str.h> 42 43 43 void write(const char *str, const int len)44 void putchar(const wchar_t ch) 44 45 { 45 int i; 46 if (ch == '\n') 47 ofw_putchar('\r'); 46 48 47 for (i = 0; i < len; i++) { 48 if (str[i] == '\n') 49 ofw_write("\r", 1); 50 ofw_write(&str[i], 1); 51 } 49 if (ascii_check(ch)) 50 ofw_putchar(ch); 51 else 52 ofw_putchar(U_SPECIAL); 52 53 } 53 54 54 int ofw_translate_failed(ofw_arg_t flag) 55 { 56 return flag != -1; 57 } 58 59 /** 60 * Starts all CPUs represented by following siblings of the given node, 61 * except for the current CPU. 55 /** Start all CPUs represented by following siblings of the given node. 56 * 57 * Except for the current CPU. 62 58 * 63 59 * @param child The first child of the OFW tree node whose children … … 71 67 * 72 68 */ 73 static int wake_cpus_in_node(phandle child, uint64_t current_mid,69 static size_t wake_cpus_in_node(phandle child, uint64_t current_mid, 74 70 uintptr_t physmem_start) 75 71 { 76 int cpus;72 size_t cpus; 77 73 78 for (cpus = 0; (child != 0) && (child != -1);74 for (cpus = 0; (child != 0) && (child != (phandle) -1); 79 75 child = ofw_get_peer_node(child), cpus++) { 80 76 char type_name[OFW_TREE_PROPERTY_MAX_VALUELEN]; … … 83 79 OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) { 84 80 type_name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0; 85 if (strcmp(type_name, "cpu") == 0) { 81 82 if (str_cmp(type_name, "cpu") == 0) { 86 83 uint32_t mid; 87 84 … … 100 97 */ 101 98 (void) ofw_call("SUNW,start-cpu", 3, 1, 102 NULL, child, KERNEL_ VIRTUAL_ADDRESS,99 NULL, child, KERNEL_ADDRESS, 103 100 physmem_start | AP_PROCESSOR); 104 101 } … … 110 107 } 111 108 112 /** 113 * Finds out the current CPU's MID and wakes up all AP processors.109 /** Find out the current CPU's MID and wake up all AP processors. 110 * 114 111 */ 115 intofw_cpu(uint16_t mid_mask, uintptr_t physmem_start)112 void ofw_cpu(uint16_t mid_mask, uintptr_t physmem_start) 116 113 { 117 114 /* Get the current CPU MID */ … … 119 116 120 117 asm volatile ( 121 "ldxa [%1] %2, %0\n" 122 : "=r" (current_mid) 123 : "r" (0), "i" (ASI_ICBUS_CONFIG) 118 "ldxa [%[zero]] %[asi], %[current_mid]\n" 119 : [current_mid] "=r" (current_mid) 120 : [zero] "r" (0), 121 [asi] "i" (ASI_ICBUS_CONFIG) 124 122 ); 125 123 … … 130 128 131 129 phandle cpus_parent = ofw_find_device("/ssm@0,0"); 132 if ((cpus_parent == 0) || (cpus_parent == -1))130 if ((cpus_parent == 0) || (cpus_parent == (phandle) -1)) 133 131 cpus_parent = ofw_find_device("/"); 134 132 135 133 phandle node = ofw_get_child_node(cpus_parent); 136 int cpus = wake_cpus_in_node(node, current_mid, physmem_start); 137 while ((node != 0) && (node != -1)) { 134 size_t cpus = wake_cpus_in_node(node, current_mid, physmem_start); 135 136 while ((node != 0) && (node != (phandle) -1)) { 138 137 char name[OFW_TREE_PROPERTY_MAX_VALUELEN]; 139 138 … … 141 140 OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) { 142 141 name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0; 143 if (strcmp(name, "cmp") == 0) { 142 143 if (str_cmp(name, "cmp") == 0) { 144 144 phandle subnode = ofw_get_child_node(node); 145 145 cpus += wake_cpus_in_node(subnode, 146 146 current_mid, physmem_start); 147 147 } 148 148 } 149 149 150 node = ofw_get_peer_node(node); 150 151 } 151 152 152 return cpus; 153 if (cpus == 0) 154 printf("Warning: Unable to get CPU properties.\n"); 153 155 } 154 156 155 157 /** Get physical memory starting address. 156 158 * 157 * @param start Pointer to variable where the physical memory starting 158 * address will be stored. 159 * 160 * @return Non-zero on succes, zero on failure. 159 * @return Physical memory starting address. 161 160 * 162 161 */ 163 int ofw_get_physmem_start(uintptr_t *start)162 uintptr_t ofw_get_physmem_start(void) 164 163 { 165 164 uint32_t memreg[4]; 166 if (ofw_get_property(ofw_memory, "reg", &memreg, sizeof(memreg)) <= 0) 167 return 0; 165 if ((ofw_ret_t) ofw_get_property(ofw_memory, "reg", &memreg, 166 sizeof(memreg)) <= 0) { 167 printf("Error: Unable to get physical memory starting address, halting.\n"); 168 halt(); 169 } 168 170 169 *start = (((uint64_t) memreg[0]) << 32) | memreg[1]; 170 return 1; 171 return ((((uintptr_t) memreg[0]) << 32) | memreg[1]); 171 172 }
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