Changeset 4872160 in mainline for boot/arch/sparc64/src


Ignore:
Timestamp:
2010-05-04T10:44:55Z (15 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
568db0f
Parents:
bb252ca
Message:

new boot infrastructure

  • more code and metadata unification
  • import of up-to-date implementations from the kernel
  • the boot loaders should behave more similarly on all platforms
  • support for deflate compressed (LZ77) boot components
    • this again allows feasible boot images to be created on mips32
  • IA64 is still not booting
    • the broken forked GNU EFI library has been removed, a replacement of the functionality is on its way
Location:
boot/arch/sparc64/src
Files:
1 added
2 moved

Legend:

Unmodified
Added
Removed
  • boot/arch/sparc64/src/asm.S

    rbb252ca r4872160  
    11#
    22# Copyright (c) 2006 Martin Decky
    3 # Copyright (c) 2006 Jakub Jermar 
     3# Copyright (c) 2006 Jakub Jermar
    44# All rights reserved.
    55#
     
    2828#
    2929
    30 #include <stack.h>
    31 #include <register.h>
     30#include <arch/arch.h>
     31
     32#define ICACHE_SIZE       8192
     33#define ICACHE_LINE_SIZE  32
     34#define ICACHE_SET_BIT    (1 << 13)
     35#define ASI_ICACHE_TAG    0x67
    3236
    3337.register %g2, #scratch
    3438.register %g3, #scratch
    35 
    36 .text
    37 
     39.register %g6, #scratch
     40.register %g7, #scratch
     41
     42.global start
    3843.global halt
    3944.global memcpy
    4045.global jump_to_kernel
    4146
     47.section BOOTSTRAP, "ax"
     48
     49start:
     50        ba %xcc, 1f
     51        nop
     52
     53/*
     54 * This header forces SILO to load the image at 0x4000.
     55 * More precisely, SILO will think this is an old version of Linux.
     56 */
     57.ascii "HdrS"
     58.word 0
     59.half 0
     60.half 0
     61.half 0
     62.half 0
     63.word 0
     64.word 0
     65
     66.align 8
     671:
     68        ! Disable interrupts and disable address masking.
     69       
     70        wrpr %g0, PSTATE_PRIV_BIT, %pstate
     71       
     72        wrpr %g0, NWINDOWS - 2, %cansave   ! Set maximum saveable windows
     73        wrpr %g0, 0, %canrestore           ! Get rid of windows we will never need again
     74        wrpr %g0, 0, %otherwin             ! Make sure the window state is consistent
     75        wrpr %g0, NWINDOWS - 1, %cleanwin  ! Prevent needless clean_window traps for kernel
     76       
     77        set initial_stack, %sp
     78        add %sp, -STACK_BIAS, %sp
     79       
     80        set ofw_cif, %l0
     81       
     82        ! Initialize OpenFirmware
     83       
     84        call ofw_init
     85        stx %o4, [%l0]
     86       
     87        ba %xcc, bootstrap
     88        nop
     89
     90.align STACK_ALIGNMENT
     91        .space STACK_SIZE
     92initial_stack:
     93        .space STACK_WINDOW_SAVE_AREA_SIZE
     94
     95.text
     96
    4297halt:
    4398        ba %xcc, halt
     
    45100
    46101memcpy:
    47         mov %o0, %o3      ! save dst
     102        ! Save dst
     103       
     104        mov %o0, %o3
    48105        add %o1, 7, %g1
    49106        and %g1, -8, %g1
     
    66123       
    67124        2:
    68                 jmp %o7 + 8   ! exit point
     125                ! Exit point
     126               
     127                jmp %o7 + 8
    69128                mov %o3, %o0
    70129       
     
    104163                mov %g2, %g3
    105164       
    106         jmp %o7 + 8   ! exit point
     165        ! Exit point
     166       
     167        jmp %o7 + 8
    107168        mov %o3, %o0
    108169
    109170jump_to_kernel:
    110171        /*
    111          * We have copied code and now we need to guarantee cache coherence.
     172         * Guarantee cache coherence:
    112173         * 1. Make sure that the code we have moved has drained to main memory.
    113174         * 2. Invalidate I-cache.
     
    115176         */
    116177       
    117 #if defined (SUN4U)
    118178        /*
    119179         * US3 processors have a write-invalidate cache, so explicitly
    120180         * invalidating it is not required. Whether to invalidate I-cache
    121          * or not is decided according to the value of the 5th argument
    122          * (subarchitecture).
     181         * or not is decided according to the value of the 3rd argument
     182         * (subarch).
    123183         */
    124         cmp %i4, 3
     184        cmp %i2, SUBARCH_US3
    125185        be %xcc, 1f
    126186        nop
     
    129189                call icache_flush
    130190                nop
    131 #endif 
     191       
    132192        1:
    133193                membar #StoreStore
     
    138198        flush %i7
    139199       
     200        ! Jump to kernel
    140201        mov %o0, %l1
    141202        mov %o1, %o0
    142         mov %o2, %o1
    143         mov %o3, %o2
    144         jmp %l1       ! jump to kernel
    145         nop
    146 
    147 #define ICACHE_SIZE       8192
    148 #define ICACHE_LINE_SIZE  32
    149 #define ICACHE_SET_BIT    (1 << 13)
    150 #define ASI_ICACHE_TAG    0x67
     203        mov %o3, %o1
     204       
     205        jmp %l1
     206        nop
    151207
    152208# Flush I-cache
     
    163219        membar #Sync
    164220        retl
     221       
    165222        ! SF Erratum #51
     223       
    166224        nop
    167225
     
    172230        ldx [%l0], %l0
    173231       
    174         rdpr  %pstate, %l1
    175         and  %l1, ~PSTATE_AM_BIT, %l2
    176         wrpr  %l2, 0, %pstate
     232        rdpr %pstate, %l1
     233        and %l1, ~PSTATE_AM_BIT, %l2
     234        wrpr %l2, 0, %pstate
    177235       
    178236        jmpl %l0, %o7
  • boot/arch/sparc64/src/ofw.c

    rbb252ca r4872160  
    3333 */
    3434
    35 #include <ofwarch.h>
    36 #include <ofw.h>
     35#include <arch/arch.h>
     36#include <arch/ofw.h>
     37#include <genarch/ofw.h>
     38#include <typedefs.h>
    3739#include <printf.h>
    38 #include <string.h>
    39 #include <register.h>
    40 #include "main.h"
    41 #include "asm.h"
     40#include <halt.h>
     41#include <putchar.h>
     42#include <str.h>
    4243
    43 void write(const char *str, const int len)
     44void putchar(const wchar_t ch)
    4445{
    45         int i;
     46        if (ch == '\n')
     47                ofw_putchar('\r');
    4648       
    47         for (i = 0; i < len; i++) {
    48                 if (str[i] == '\n')
    49                         ofw_write("\r", 1);
    50                 ofw_write(&str[i], 1);
    51         }
     49        if (ascii_check(ch))
     50                ofw_putchar(ch);
     51        else
     52                ofw_putchar(U_SPECIAL);
    5253}
    5354
    54 int ofw_translate_failed(ofw_arg_t flag)
    55 {
    56         return flag != -1;
    57 }
    58 
    59 /**
    60  * Starts all CPUs represented by following siblings of the given node,
    61  * except for the current CPU.
     55/** Start all CPUs represented by following siblings of the given node.
     56 *
     57 * Except for the current CPU.
    6258 *
    6359 * @param child         The first child of the OFW tree node whose children
     
    7167 *
    7268 */
    73 static int wake_cpus_in_node(phandle child, uint64_t current_mid,
     69static size_t wake_cpus_in_node(phandle child, uint64_t current_mid,
    7470    uintptr_t physmem_start)
    7571{
    76         int cpus;
     72        size_t cpus;
    7773       
    78         for (cpus = 0; (child != 0) && (child != -1);
     74        for (cpus = 0; (child != 0) && (child != (phandle) -1);
    7975            child = ofw_get_peer_node(child), cpus++) {
    8076                char type_name[OFW_TREE_PROPERTY_MAX_VALUELEN];
     
    8379                    OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) {
    8480                        type_name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0;
    85                         if (strcmp(type_name, "cpu") == 0) {
     81                       
     82                        if (str_cmp(type_name, "cpu") == 0) {
    8683                                uint32_t mid;
    8784                               
     
    10097                                         */
    10198                                        (void) ofw_call("SUNW,start-cpu", 3, 1,
    102                                             NULL, child, KERNEL_VIRTUAL_ADDRESS,
     99                                            NULL, child, KERNEL_ADDRESS,
    103100                                            physmem_start | AP_PROCESSOR);
    104101                                }
     
    110107}
    111108
    112 /**
    113  * Finds out the current CPU's MID and wakes up all AP processors.
     109/** Find out the current CPU's MID and wake up all AP processors.
     110 *
    114111 */
    115 int ofw_cpu(uint16_t mid_mask, uintptr_t physmem_start)
     112void ofw_cpu(uint16_t mid_mask, uintptr_t physmem_start)
    116113{
    117114        /* Get the current CPU MID */
     
    119116       
    120117        asm volatile (
    121                 "ldxa [%1] %2, %0\n"
    122                 : "=r" (current_mid)
    123                 : "r" (0), "i" (ASI_ICBUS_CONFIG)
     118                "ldxa [%[zero]] %[asi], %[current_mid]\n"
     119                : [current_mid] "=r" (current_mid)
     120                : [zero] "r" (0),
     121                  [asi] "i" (ASI_ICBUS_CONFIG)
    124122        );
    125123       
     
    130128       
    131129        phandle cpus_parent = ofw_find_device("/ssm@0,0");
    132         if ((cpus_parent == 0) || (cpus_parent == -1))
     130        if ((cpus_parent == 0) || (cpus_parent == (phandle) -1))
    133131                cpus_parent = ofw_find_device("/");
    134132       
    135133        phandle node = ofw_get_child_node(cpus_parent);
    136         int cpus = wake_cpus_in_node(node, current_mid, physmem_start);
    137         while ((node != 0) && (node != -1)) {
     134        size_t cpus = wake_cpus_in_node(node, current_mid, physmem_start);
     135       
     136        while ((node != 0) && (node != (phandle) -1)) {
    138137                char name[OFW_TREE_PROPERTY_MAX_VALUELEN];
    139138               
     
    141140                    OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) {
    142141                        name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0;
    143                         if (strcmp(name, "cmp") == 0) {
     142                       
     143                        if (str_cmp(name, "cmp") == 0) {
    144144                                phandle subnode = ofw_get_child_node(node);
    145145                                cpus += wake_cpus_in_node(subnode,
    146                                         current_mid, physmem_start);
     146                                    current_mid, physmem_start);
    147147                        }
    148148                }
     149               
    149150                node = ofw_get_peer_node(node);
    150151        }
    151152       
    152         return cpus;
     153        if (cpus == 0)
     154                printf("Warning: Unable to get CPU properties.\n");
    153155}
    154156
    155157/** Get physical memory starting address.
    156158 *
    157  * @param start Pointer to variable where the physical memory starting
    158  *              address will be stored.
    159  *
    160  * @return Non-zero on succes, zero on failure.
     159 * @return Physical memory starting address.
    161160 *
    162161 */
    163 int ofw_get_physmem_start(uintptr_t *start)
     162uintptr_t ofw_get_physmem_start(void)
    164163{
    165164        uint32_t memreg[4];
    166         if (ofw_get_property(ofw_memory, "reg", &memreg, sizeof(memreg)) <= 0)
    167                 return 0;
     165        if ((ofw_ret_t) ofw_get_property(ofw_memory, "reg", &memreg,
     166            sizeof(memreg)) <= 0) {
     167                printf("Error: Unable to get physical memory starting address, halting.\n");
     168                halt();
     169        }
    168170       
    169         *start = (((uint64_t) memreg[0]) << 32) | memreg[1];
    170         return 1;
     171        return ((((uintptr_t) memreg[0]) << 32) | memreg[1]);
    171172}
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