Changeset 43d6401 in mainline for kernel/arch/ppc32/src

Timestamp:

2009-01-29T18:24:40Z (17 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

917c427

Parents:

f817d3a

Message:

ppc32: add support for cache disable page access control

File:

• kernel/arch/ppc32/src/mm/tlb.c (modified) (6 diffs)

kernel/arch/ppc32/src/mm/tlb.c

@@ -67 +67 @@
          */     
         pte_t *pte = page_mapping_find(as, badvaddr);
-        if ((pte) && (pte->p)) {
+        if ((pte) && (pte->present)) {
                 /*
                  * Mapping found in page tables.
@@ -89 +89 @@
                         page_table_lock(as, lock);
                         pte = page_mapping_find(as, badvaddr);
-                        ASSERT((pte) && (pte->p));
+                        ASSERT((pte) && (pte->present));
                         *pfrc = 0;
                         return pte;
@@ -127 +127 @@
 
 
-static void pht_insert(const uintptr_t vaddr, const pfn_t pfn)
+static void pht_insert(const uintptr_t vaddr, const pte_t *pte)
 {
         uint32_t page = (vaddr >> 12) & 0xffff;
@@ -190 +190 @@
         phte[base + i].h = h;
         phte[base + i].api = api;
-        phte[base + i].rpn = pfn;
+        phte[base + i].rpn = pte->pfn;
         phte[base + i].r = 0;
         phte[base + i].c = 0;
+        phte[base + i].wimg = (pte->page_cache_disable ? WIMG_NO_CACHE : 0);
         phte[base + i].pp = 2; // FIXME
 }
@@ -264 +265 @@
         phte_physical[base + i].r = 0;
         phte_physical[base + i].c = 0;
+        phte_physical[base + i].wimg = 0;
         phte_physical[base + i].pp = 2; // FIXME
 }
@@ -319 +321 @@
         }
         
-        pte->a = 1; /* Record access to PTE */
-        pht_insert(badvaddr, pte->pfn);
+        pte->accessed = 1; /* Record access to PTE */
+        pht_insert(badvaddr, pte);
         
         page_table_unlock(as, lock);