Changeset 4177e70 in mainline for kernel/arch/mips32/src

Timestamp:

2018-07-17T22:09:50Z (7 years ago)

Author:

Jiří Zárevúcky <jiri.zarevucky@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

58093d9

Parents:

db51219f

Message:

mips: We use K1 register for thread pointer, so we must treat it as a preserved register.

Location:

kernel/arch/mips32/src

Files:

• context.S (modified) (2 diffs)
• start.S (modified) (2 diffs)

kernel/arch/mips32/src/context.S

@@ -47 +47 @@
         sw $s8, CONTEXT_OFFSET_S8($a0)
         sw $gp, CONTEXT_OFFSET_GP($a0)
+        sw $k1, CONTEXT_OFFSET_TP($a0)
 
         sw $ra, CONTEXT_OFFSET_PC($a0)
@@ -67 +68 @@
         lw $s8, CONTEXT_OFFSET_S8($a0)
         lw $gp, CONTEXT_OFFSET_GP($a0)
+        lw $k1, CONTEXT_OFFSET_TP($a0)
 
         lw $ra, CONTEXT_OFFSET_PC($a0)

kernel/arch/mips32/src/start.S

@@ -264 +264 @@
         mfc0 $t2, $status
         sw $t3, ISTATE_OFFSET_EPC($sp)  /* save EPC */
-        sw $k1, ISTATE_OFFSET_KT1($sp)  /* save $k1 not saved on context switch */
 
         and $t4, $t2, REG_SAVE_MASK  /* save only KSU, EXL, ERL, IE */
@@ -300 +299 @@
         /* restore epc + 4 */
         lw $t2, ISTATE_OFFSET_EPC($sp)
-        lw $k1, ISTATE_OFFSET_KT1($sp)
         addi $t2, $t2, 4
         mtc0 $t2, $epc