Changeset 3f03199 in mainline for uspace/drv
- Timestamp:
- 2013-09-15T06:33:53Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 9348862
- Parents:
- dd7078c (diff), 1c0cef0 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Location:
- uspace/drv
- Files:
-
- 3 added
- 38 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/audio/sb16/dsp.c
rdd7078c r3f03199 173 173 { 174 174 assert(dsp); 175 if (size > MAX_BUFFER_SIZE || size == 0 || (size % 2) == 1) 175 176 if ((size > MAX_BUFFER_SIZE) || (size == 0) || ((size % 2) == 1)) 176 177 size = MAX_BUFFER_SIZE; 177 void *buffer = NULL, *pa = NULL; 178 int ret = dmamem_map_anonymous(size, AS_AREA_WRITE | AS_AREA_READ, 179 0, &pa, &buffer); 178 179 uintptr_t pa = 0; 180 void *buffer = NULL; 181 182 int ret = dmamem_map_anonymous(size, DMAMEM_16MiB | 0x0000ffff, 183 AS_AREA_WRITE | AS_AREA_READ, 0, &pa, &buffer); 180 184 if (ret != EOK) { 181 185 ddf_log_error("Failed to allocate DMA buffer."); 182 186 return ENOMEM; 183 187 } 184 185 ddf_log_verbose("Setup dma buffer at %p(%p) %zu.", buffer, pa, size);186 assert( (uintptr_t)pa < (1 << 25));187 188 189 ddf_log_verbose("Setup DMA buffer at %p (%zu) %zu.", buffer, pa, size); 190 assert(pa < (1 << 24)); 191 188 192 /* Setup 16 bit channel */ 189 ret = setup_dma(dsp, (uintptr_t)pa, size);193 ret = setup_dma(dsp, pa, size); 190 194 if (ret == EOK) { 191 195 dsp->buffer.data = buffer; … … 196 200 dmamem_unmap_anonymous(buffer); 197 201 } 202 198 203 return ret; 199 204 } -
uspace/drv/audio/sb16/main.c
rdd7078c r3f03199 49 49 50 50 static int sb_add_device(ddf_dev_t *device); 51 static int sb_get_res(ddf_dev_t *device, uintptr_t *sb_regs, 52 size_t *sb_regs_size, uintptr_t *mpu_regs, size_t *mpu_regs_size, 53 int *irq, int *dma8, int *dma16); 51 static int sb_get_res(ddf_dev_t *device, addr_range_t **pp_sb_regs, 52 addr_range_t **pp_mpu_regs, int *irq, int *dma8, int *dma16); 54 53 static int sb_enable_interrupts(ddf_dev_t *device); 55 /*----------------------------------------------------------------------------*/ 54 56 55 static driver_ops_t sb_driver_ops = { 57 56 .dev_add = sb_add_device, 58 57 }; 59 /*----------------------------------------------------------------------------*/ 58 60 59 static driver_t sb_driver = { 61 60 .name = NAME, 62 61 .driver_ops = &sb_driver_ops 63 62 }; 64 //static ddf_dev_ops_t sb_ops = {}; 65 /*----------------------------------------------------------------------------*/ 66 /** Initializes global driver structures (NONE). 63 64 /** Initialize global driver structures (NONE). 67 65 * 68 66 * @param[in] argc Nmber of arguments in argv vector (ignored). … … 81 79 static void irq_handler(ddf_dev_t *dev, ipc_callid_t iid, ipc_call_t *call) 82 80 { 83 assert(dev);84 81 sb16_t *sb16_dev = ddf_dev_data_get(dev); 85 assert(sb16_dev);86 82 sb16_interrupt(sb16_dev); 87 83 } 88 84 89 /** Initialize s a new ddf driver instance of SB16.85 /** Initialize new SB16 driver instance. 90 86 * 91 87 * @param[in] device DDF instance of the device to initialize. … … 94 90 static int sb_add_device(ddf_dev_t *device) 95 91 { 96 #define CHECK_RET_RETURN(ret, msg...) \ 97 if (ret != EOK) { \ 98 ddf_log_error(msg); \ 99 return ret; \ 100 } else (void)0 101 102 assert(device); 103 104 sb16_t *soft_state = ddf_dev_data_alloc(device, sizeof(sb16_t)); 105 int ret = soft_state ? EOK : ENOMEM; 106 CHECK_RET_RETURN(ret, "Failed to allocate sb16 structure."); 107 108 uintptr_t sb_regs = 0, mpu_regs = 0; 109 size_t sb_regs_size = 0, mpu_regs_size = 0; 110 int irq = 0, dma8 = 0, dma16 = 0; 111 112 ret = sb_get_res(device, &sb_regs, &sb_regs_size, &mpu_regs, 113 &mpu_regs_size, &irq, &dma8, &dma16); 114 CHECK_RET_RETURN(ret, "Failed to get resources: %s.", str_error(ret)); 115 92 bool handler_regd = false; 116 93 const size_t irq_cmd_count = sb16_irq_code_size(); 117 94 irq_cmd_t irq_cmds[irq_cmd_count]; 118 95 irq_pio_range_t irq_ranges[1]; 119 sb16_irq_code((void*)sb_regs, dma8, dma16, irq_cmds, irq_ranges); 96 97 sb16_t *soft_state = ddf_dev_data_alloc(device, sizeof(sb16_t)); 98 int rc = soft_state ? EOK : ENOMEM; 99 if (rc != EOK) { 100 ddf_log_error("Failed to allocate sb16 structure."); 101 goto error; 102 } 103 104 addr_range_t sb_regs; 105 addr_range_t *p_sb_regs = &sb_regs; 106 addr_range_t mpu_regs; 107 addr_range_t *p_mpu_regs = &mpu_regs; 108 int irq = 0, dma8 = 0, dma16 = 0; 109 110 rc = sb_get_res(device, &p_sb_regs, &p_mpu_regs, &irq, &dma8, &dma16); 111 if (rc != EOK) { 112 ddf_log_error("Failed to get resources: %s.", str_error(rc)); 113 goto error; 114 } 115 116 sb16_irq_code(p_sb_regs, dma8, dma16, irq_cmds, irq_ranges); 120 117 121 118 irq_code_t irq_code = { … … 126 123 }; 127 124 128 ret = register_interrupt_handler(device, irq, irq_handler, &irq_code); 129 CHECK_RET_RETURN(ret, 130 "Failed to register irq handler: %s.", str_error(ret)); 131 132 #define CHECK_RET_UNREG_DEST_RETURN(ret, msg...) \ 133 if (ret != EOK) { \ 134 ddf_log_error(msg); \ 135 unregister_interrupt_handler(device, irq); \ 136 return ret; \ 137 } else (void)0 138 139 ret = sb_enable_interrupts(device); 140 CHECK_RET_UNREG_DEST_RETURN(ret, "Failed to enable interrupts: %s.", 141 str_error(ret)); 142 143 ret = sb16_init_sb16( 144 soft_state, (void*)sb_regs, sb_regs_size, device, dma8, dma16); 145 CHECK_RET_UNREG_DEST_RETURN(ret, 146 "Failed to init sb16 driver: %s.", str_error(ret)); 147 148 ret = sb16_init_mpu(soft_state, (void*)mpu_regs, mpu_regs_size); 149 if (ret == EOK) { 125 rc = register_interrupt_handler(device, irq, irq_handler, &irq_code); 126 if (rc != EOK) { 127 ddf_log_error("Failed to register irq handler: %s.", 128 str_error(rc)); 129 goto error; 130 } 131 132 handler_regd = true; 133 134 rc = sb_enable_interrupts(device); 135 if (rc != EOK) { 136 ddf_log_error("Failed to enable interrupts: %s.", 137 str_error(rc)); 138 goto error; 139 } 140 141 rc = sb16_init_sb16(soft_state, p_sb_regs, device, dma8, dma16); 142 if (rc != EOK) { 143 ddf_log_error("Failed to init sb16 driver: %s.", 144 str_error(rc)); 145 goto error; 146 } 147 148 rc = sb16_init_mpu(soft_state, p_mpu_regs); 149 if (rc == EOK) { 150 150 ddf_fun_t *mpu_fun = 151 151 ddf_fun_create(device, fun_exposed, "midi"); 152 152 if (mpu_fun) { 153 r et= ddf_fun_bind(mpu_fun);154 if (r et!= EOK)153 rc = ddf_fun_bind(mpu_fun); 154 if (rc != EOK) 155 155 ddf_log_error( 156 156 "Failed to bind midi function: %s.", 157 str_error(r et));157 str_error(rc)); 158 158 } else { 159 159 ddf_log_error("Failed to create midi function."); 160 160 } 161 161 } else { 162 ddf_log_warning("Failed to init mpu driver: %s.", str_error(ret)); 162 ddf_log_warning("Failed to init mpu driver: %s.", 163 str_error(rc)); 163 164 } 164 165 165 166 /* MPU state does not matter */ 166 167 return EOK; 167 } 168 169 static int sb_get_res(ddf_dev_t *device, uintptr_t *sb_regs, 170 size_t *sb_regs_size, uintptr_t *mpu_regs, size_t *mpu_regs_size, 171 int *irq, int *dma8, int *dma16) 168 error: 169 if (handler_regd) 170 unregister_interrupt_handler(device, irq); 171 return rc; 172 } 173 174 static int sb_get_res(ddf_dev_t *device, addr_range_t **pp_sb_regs, 175 addr_range_t **pp_mpu_regs, int *irq, int *dma8, int *dma16) 172 176 { 173 177 assert(device); … … 219 223 } 220 224 221 222 225 if (hw_res.io_ranges.count == 1) { 223 if ( sb_regs)224 * sb_regs = hw_res.io_ranges.ranges[0].address;225 if ( sb_regs_size)226 * sb_regs_size = hw_res.io_ranges.ranges[0].size;226 if (pp_sb_regs && *pp_sb_regs) 227 **pp_sb_regs = hw_res.io_ranges.ranges[0]; 228 if (pp_mpu_regs) 229 *pp_mpu_regs = NULL; 227 230 } else { 228 231 const int sb = 229 232 (hw_res.io_ranges.ranges[0].size >= sizeof(sb16_regs_t)) 230 ? 1 : 0;233 ? 0 : 1; 231 234 const int mpu = 1 - sb; 232 if (sb_regs) 233 *sb_regs = hw_res.io_ranges.ranges[sb].address; 234 if (sb_regs_size) 235 *sb_regs_size = hw_res.io_ranges.ranges[sb].size; 236 if (mpu_regs) 237 *sb_regs = hw_res.io_ranges.ranges[mpu].address; 238 if (mpu_regs_size) 239 *sb_regs_size = hw_res.io_ranges.ranges[mpu].size; 235 if (pp_sb_regs && *pp_sb_regs) 236 **pp_sb_regs = hw_res.io_ranges.ranges[sb]; 237 if (pp_mpu_regs && *pp_mpu_regs) 238 **pp_mpu_regs = hw_res.io_ranges.ranges[mpu]; 240 239 } 241 240 … … 255 254 return enabled ? EOK : EIO; 256 255 } 256 257 257 /** 258 258 * @} -
uspace/drv/audio/sb16/sb16.c
rdd7078c r3f03199 77 77 } 78 78 79 void sb16_irq_code(void *regs, int dma8, int dma16, irq_cmd_t cmds[], irq_pio_range_t ranges[]) 79 void sb16_irq_code(addr_range_t *regs, int dma8, int dma16, irq_cmd_t cmds[], 80 irq_pio_range_t ranges[]) 80 81 { 81 82 assert(regs); 82 83 assert(dma8 > 0 && dma8 < 4); 83 sb16_regs_t *registers = regs; 84 85 sb16_regs_t *registers = RNGABSPTR(*regs); 84 86 memcpy(cmds, irq_cmds, sizeof(irq_cmds)); 85 cmds[0].addr = (void *)®isters->dsp_read_status;86 ranges[0].base = (uintptr_t) registers;87 cmds[0].addr = (void *) ®isters->dsp_read_status; 88 ranges[0].base = (uintptr_t) registers; 87 89 ranges[0].size = sizeof(*registers); 88 90 if (dma16 > 4 && dma16 < 8) { 89 91 /* Valid dma16 */ 90 cmds[1].addr = (void *)®isters->dma16_ack;92 cmds[1].addr = (void *) ®isters->dma16_ack; 91 93 } else { 92 94 cmds[1].cmd = CMD_ACCEPT; … … 94 96 } 95 97 96 int sb16_init_sb16(sb16_t *sb, void *regs, size_t size,97 ddf_dev_t *dev, int dma8,int dma16)98 int sb16_init_sb16(sb16_t *sb, addr_range_t *regs, ddf_dev_t *dev, int dma8, 99 int dma16) 98 100 { 99 101 assert(sb); 102 100 103 /* Setup registers */ 101 int ret = pio_enable (regs, size, (void**)&sb->regs);104 int ret = pio_enable_range(regs, (void **) &sb->regs); 102 105 if (ret != EOK) 103 106 return ret; 104 ddf_log_ debug("PIO registers at %p accessible.", sb->regs);107 ddf_log_note("PIO registers at %p accessible.", sb->regs); 105 108 106 109 /* Initialize DSP */ … … 187 190 } 188 191 189 int sb16_init_mpu(sb16_t *sb, void *regs, size_t size)192 int sb16_init_mpu(sb16_t *sb, addr_range_t *regs) 190 193 { 191 194 sb->mpu_regs = NULL; -
uspace/drv/audio/sb16/sb16.h
rdd7078c r3f03199 38 38 #include <ddf/driver.h> 39 39 #include <ddi.h> 40 #include <device/hw_res_parsed.h> 40 41 41 42 #include "dsp.h" … … 51 52 52 53 size_t sb16_irq_code_size(void); 53 void sb16_irq_code(void *regs, int dma8, int dma16, irq_cmd_t cmds[], irq_pio_range_t ranges[]); 54 int sb16_init_sb16(sb16_t *sb, void *regs, size_t size, 55 ddf_dev_t *dev, int dma8, int dma16); 56 int sb16_init_mpu(sb16_t *sb, void *regs, size_t size); 54 void sb16_irq_code(addr_range_t *regs, int dma8, int dma16, irq_cmd_t cmds[], irq_pio_range_t ranges[]); 55 int sb16_init_sb16(sb16_t *sb, addr_range_t *regs, ddf_dev_t *dev, int dma8, int dma16); 56 int sb16_init_mpu(sb16_t *sb, addr_range_t *regs); 57 57 void sb16_interrupt(sb16_t *sb); 58 58 -
uspace/drv/block/ahci/ahci.c
rdd7078c r3f03199 119 119 static int ahci_identify_device(sata_dev_t *); 120 120 static int ahci_set_highest_ultra_dma_mode(sata_dev_t *); 121 static int ahci_rb_fpdma(sata_dev_t *, void *, uint64_t);122 static int ahci_wb_fpdma(sata_dev_t *, void *, uint64_t);121 static int ahci_rb_fpdma(sata_dev_t *, uintptr_t, uint64_t); 122 static int ahci_wb_fpdma(sata_dev_t *, uintptr_t, uint64_t); 123 123 124 124 static void ahci_sata_devices_create(ahci_dev_t *, ddf_dev_t *); … … 233 233 sata_dev_t *sata = fun_sata_dev(fun); 234 234 235 void *phys;235 uintptr_t phys; 236 236 void *ibuf; 237 int rc = dmamem_map_anonymous(sata->block_size, AS_AREA_READ | AS_AREA_WRITE,238 0, &phys, (void **)&ibuf);237 int rc = dmamem_map_anonymous(sata->block_size, DMAMEM_4GiB, 238 AS_AREA_READ | AS_AREA_WRITE, 0, &phys, &ibuf); 239 239 if (rc != EOK) { 240 240 ddf_msg(LVL_ERROR, "Cannot allocate read buffer."); … … 276 276 sata_dev_t *sata = fun_sata_dev(fun); 277 277 278 void *phys;278 uintptr_t phys; 279 279 void *ibuf; 280 int rc = dmamem_map_anonymous(sata->block_size, AS_AREA_READ | AS_AREA_WRITE,281 0, &phys, (void **)&ibuf);280 int rc = dmamem_map_anonymous(sata->block_size, DMAMEM_4GiB, 281 AS_AREA_READ | AS_AREA_WRITE, 0, &phys, &ibuf); 282 282 if (rc != EOK) { 283 283 ddf_msg(LVL_ERROR, "Cannot allocate write buffer."); … … 336 336 * 337 337 */ 338 static void ahci_identify_device_cmd(sata_dev_t *sata, void *phys)338 static void ahci_identify_device_cmd(sata_dev_t *sata, uintptr_t phys) 339 339 { 340 340 volatile sata_std_command_frame_t *cmd = … … 381 381 * 382 382 */ 383 static void ahci_identify_packet_device_cmd(sata_dev_t *sata, void *phys)383 static void ahci_identify_packet_device_cmd(sata_dev_t *sata, uintptr_t phys) 384 384 { 385 385 volatile sata_std_command_frame_t *cmd = … … 435 435 } 436 436 437 void *phys;437 uintptr_t phys; 438 438 sata_identify_data_t *idata; 439 439 int rc = dmamem_map_anonymous(SATA_IDENTIFY_DEVICE_BUFFER_LENGTH, 440 AS_AREA_READ | AS_AREA_WRITE, 0, &phys, (void **) &idata); 440 DMAMEM_4GiB, AS_AREA_READ | AS_AREA_WRITE, 0, &phys, 441 (void **) &idata); 441 442 if (rc != EOK) { 442 443 ddf_msg(LVL_ERROR, "Cannot allocate buffer to identify device."); … … 561 562 * 562 563 */ 563 static void ahci_set_mode_cmd(sata_dev_t *sata, void*phys, uint8_t mode)564 static void ahci_set_mode_cmd(sata_dev_t *sata, uintptr_t phys, uint8_t mode) 564 565 { 565 566 volatile sata_std_command_frame_t *cmd = … … 567 568 568 569 cmd->fis_type = SATA_CMD_FIS_TYPE; 569 cmd->c = SATA_CMD_FIS_COMMAND_INDICATOR; 570 cmd->c = SATA_CMD_FIS_COMMAND_INDICATOR; 570 571 cmd->command = 0xef; 571 572 cmd->features = 0x03; … … 628 629 } 629 630 630 void *phys;631 uintptr_t phys; 631 632 sata_identify_data_t *idata; 632 633 int rc = dmamem_map_anonymous(SATA_SET_FEATURE_BUFFER_LENGTH, 633 AS_AREA_READ | AS_AREA_WRITE, 0, &phys, (void **) &idata); 634 DMAMEM_4GiB, AS_AREA_READ | AS_AREA_WRITE, 0, &phys, 635 (void **) &idata); 634 636 if (rc != EOK) { 635 637 ddf_msg(LVL_ERROR, "Cannot allocate buffer for device set mode."); … … 677 679 * 678 680 */ 679 static void ahci_rb_fpdma_cmd(sata_dev_t *sata, void *phys, uint64_t blocknum) 681 static void ahci_rb_fpdma_cmd(sata_dev_t *sata, uintptr_t phys, 682 uint64_t blocknum) 680 683 { 681 684 volatile sata_ncq_command_frame_t *cmd = … … 734 737 * 735 738 */ 736 static int ahci_rb_fpdma(sata_dev_t *sata, void *phys, uint64_t blocknum)739 static int ahci_rb_fpdma(sata_dev_t *sata, uintptr_t phys, uint64_t blocknum) 737 740 { 738 741 if (sata->is_invalid_device) { … … 763 766 * 764 767 */ 765 static void ahci_wb_fpdma_cmd(sata_dev_t *sata, void *phys, uint64_t blocknum) 768 static void ahci_wb_fpdma_cmd(sata_dev_t *sata, uintptr_t phys, 769 uint64_t blocknum) 766 770 { 767 771 volatile sata_ncq_command_frame_t *cmd = … … 821 825 * 822 826 */ 823 static int ahci_wb_fpdma(sata_dev_t *sata, void *phys, uint64_t blocknum)827 static int ahci_wb_fpdma(sata_dev_t *sata, uintptr_t phys, uint64_t blocknum) 824 828 { 825 829 if (sata->is_invalid_device) { … … 933 937 { 934 938 size_t size = 4096; 935 void *phys = NULL;939 uintptr_t phys = 0; 936 940 void *virt_fb = NULL; 937 941 void *virt_cmd = NULL; … … 949 953 950 954 /* Allocate and init retfis structure. */ 951 int rc = dmamem_map_anonymous(size, AS_AREA_READ | AS_AREA_WRITE, 0,952 &phys, &virt_fb);955 int rc = dmamem_map_anonymous(size, DMAMEM_4GiB, 956 AS_AREA_READ | AS_AREA_WRITE, 0, &phys, &virt_fb); 953 957 if (rc != EOK) 954 958 goto error_retfis; … … 959 963 960 964 /* Allocate and init command header structure. */ 961 rc = dmamem_map_anonymous(size, AS_AREA_READ | AS_AREA_WRITE, 0,962 &phys, &virt_cmd);965 rc = dmamem_map_anonymous(size, DMAMEM_4GiB, 966 AS_AREA_READ | AS_AREA_WRITE, 0, &phys, &virt_cmd); 963 967 if (rc != EOK) 964 968 goto error_cmd; … … 970 974 971 975 /* Allocate and init command table structure. */ 972 rc = dmamem_map_anonymous(size, AS_AREA_READ | AS_AREA_WRITE, 0,973 &phys, &virt_table);976 rc = dmamem_map_anonymous(size, DMAMEM_4GiB, 977 AS_AREA_READ | AS_AREA_WRITE, 0, &phys, &virt_table); 974 978 if (rc != EOK) 975 979 goto error_table; … … 1153 1157 ahci->memregs = NULL; 1154 1158 1155 physmem_map( (void *) (size_t) (hw_res_parsed.mem_ranges.ranges[0].address),1159 physmem_map(RNGABS(hw_res_parsed.mem_ranges.ranges[0]), 1156 1160 AHCI_MEMREGS_PAGES_COUNT, AS_AREA_READ | AS_AREA_WRITE, 1157 1161 (void **) &ahci->memregs); … … 1160 1164 1161 1165 /* Register interrupt handler */ 1162 ahci_ranges[0].base = (size_t) hw_res_parsed.mem_ranges.ranges[0].address;1166 ahci_ranges[0].base = RNGABS(hw_res_parsed.mem_ranges.ranges[0]); 1163 1167 ahci_ranges[0].size = sizeof(ahci_memregs_t); 1164 1168 … … 1167 1171 1168 1172 ahci_cmds[base].addr = 1169 ((uint32_t *) (size_t) hw_res_parsed.mem_ranges.ranges[0].address) +1173 ((uint32_t *) RNGABSPTR(hw_res_parsed.mem_ranges.ranges[0])) + 1170 1174 AHCI_PORTS_REGISTERS_OFFSET + port * AHCI_PORT_REGISTERS_SIZE + 1171 1175 AHCI_PORT_IS_REGISTER_OFFSET; … … 1173 1177 1174 1178 ahci_cmds[base + 3].addr = 1175 ((uint32_t *) (size_t) hw_res_parsed.mem_ranges.ranges[0].address) +1179 ((uint32_t *) RNGABSPTR(hw_res_parsed.mem_ranges.ranges[0])) + 1176 1180 AHCI_GHC_IS_REGISTER_OFFSET; 1177 1181 ahci_cmds[base + 4].addr = ahci_cmds[base + 3].addr; -
uspace/drv/block/ata_bd/main.c
rdd7078c r3f03199 84 84 } 85 85 86 ata_res->cmd = hw_res.io_ranges.ranges[0].address; 87 ata_res->ctl = hw_res.io_ranges.ranges[1].address; 88 89 if (hw_res.io_ranges.ranges[0].size < sizeof(ata_ctl_t)) { 86 addr_range_t *cmd_rng = &hw_res.io_ranges.ranges[0]; 87 addr_range_t *ctl_rng = &hw_res.io_ranges.ranges[1]; 88 ata_res->cmd = RNGABS(*cmd_rng); 89 ata_res->ctl = RNGABS(*ctl_rng); 90 91 if (RNGSZ(*ctl_rng) < sizeof(ata_ctl_t)) { 90 92 rc = EINVAL; 91 93 goto error; 92 94 } 93 95 94 if ( hw_res.io_ranges.ranges[1].size< sizeof(ata_cmd_t)) {96 if (RNGSZ(*cmd_rng) < sizeof(ata_cmd_t)) { 95 97 rc = EINVAL; 96 98 goto error; -
uspace/drv/bus/isa/i8237.c
rdd7078c r3f03199 279 279 * 280 280 * @return Error code. 281 * 281 282 */ 282 283 static inline int dma_controller_init(dma_controller_t *controller) -
uspace/drv/bus/isa/isa.c
rdd7078c r3f03199 65 65 #include <ddf/log.h> 66 66 #include <ops/hw_res.h> 67 #include <ops/pio_window.h> 67 68 68 69 #include <device/hw_res.h> 70 #include <device/pio_window.h> 69 71 70 72 #include "i8237.h" … … 79 81 ddf_dev_t *dev; 80 82 ddf_fun_t *fctl; 83 pio_window_t pio_win; 81 84 list_t functions; 82 85 } isa_bus_t; … … 102 105 } 103 106 104 static hw_resource_list_t *isa_ get_fun_resources(ddf_fun_t *fnode)105 { 106 isa_fun_t * isa= isa_fun(fnode);107 assert( isa);108 109 return & isa->hw_resources;107 static hw_resource_list_t *isa_fun_get_resources(ddf_fun_t *fnode) 108 { 109 isa_fun_t *fun = isa_fun(fnode); 110 assert(fun); 111 112 return &fun->hw_resources; 110 113 } 111 114 … … 114 117 /* This is an old ugly way, copied from pci driver */ 115 118 assert(fnode); 116 isa_fun_t * isa= isa_fun(fnode);117 assert( isa);119 isa_fun_t *fun = isa_fun(fnode); 120 assert(fun); 118 121 119 122 sysarg_t apic; … … 131 134 return false; 132 135 133 const hw_resource_list_t *res = & isa->hw_resources;136 const hw_resource_list_t *res = &fun->hw_resources; 134 137 assert(res); 135 138 for (size_t i = 0; i < res->count; ++i) { … … 157 160 { 158 161 assert(fnode); 159 isa_fun_t * isa= isa_fun(fnode);160 assert( isa);161 const hw_resource_list_t *res = & isa->hw_resources;162 isa_fun_t *fun = isa_fun(fnode); 163 assert(fun); 164 const hw_resource_list_t *res = &fun->hw_resources; 162 165 assert(res); 163 166 … … 180 183 assert(size); 181 184 assert(fnode); 182 isa_fun_t * isa= isa_fun(fnode);183 assert( isa);184 const hw_resource_list_t *res = & isa->hw_resources;185 isa_fun_t *fun = isa_fun(fnode); 186 assert(fun); 187 const hw_resource_list_t *res = &fun->hw_resources; 185 188 assert(res); 186 189 … … 199 202 200 203 static hw_res_ops_t isa_fun_hw_res_ops = { 201 .get_resource_list = isa_ get_fun_resources,204 .get_resource_list = isa_fun_get_resources, 202 205 .enable_interrupt = isa_fun_enable_interrupt, 203 206 .dma_channel_setup = isa_fun_setup_dma, … … 205 208 }; 206 209 210 static pio_window_t *isa_fun_get_pio_window(ddf_fun_t *fnode) 211 { 212 ddf_dev_t *dev = ddf_fun_get_dev(fnode); 213 isa_bus_t *isa = isa_bus(dev); 214 assert(isa); 215 216 return &isa->pio_win; 217 } 218 219 static pio_window_ops_t isa_fun_pio_window_ops = { 220 .get_pio_window = isa_fun_get_pio_window 221 }; 222 207 223 static ddf_dev_ops_t isa_fun_ops= { 208 224 .interfaces[HW_RES_DEV_IFACE] = &isa_fun_hw_res_ops, 225 .interfaces[PIO_WINDOW_DEV_IFACE] = &isa_fun_pio_window_ops, 209 226 }; 210 227 … … 405 422 hw_resource_t *resources = fun->hw_resources.resources; 406 423 424 isa_bus_t *isa = isa_bus(ddf_fun_get_dev(fun->fnode)); 425 407 426 if (count < ISA_MAX_HW_RES) { 408 427 resources[count].type = IO_RANGE; 409 428 resources[count].res.io_range.address = addr; 429 resources[count].res.io_range.address += isa->pio_win.io.base; 410 430 resources[count].res.io_range.size = len; 431 resources[count].res.io_range.relative = false; 411 432 resources[count].res.io_range.endianness = LITTLE_ENDIAN; 412 433 … … 604 625 static int isa_dev_add(ddf_dev_t *dev) 605 626 { 627 async_sess_t *sess; 628 int rc; 629 606 630 ddf_msg(LVL_DEBUG, "isa_dev_add, device handle = %d", 607 631 (int) ddf_dev_get_handle(dev)); … … 614 638 isa->dev = dev; 615 639 list_initialize(&isa->functions); 640 641 sess = ddf_dev_parent_sess_create(dev, EXCHANGE_SERIALIZE); 642 if (sess == NULL) { 643 ddf_msg(LVL_ERROR, "isa_dev_add failed to connect to the " 644 "parent driver."); 645 return ENOENT; 646 } 647 648 rc = pio_window_get(sess, &isa->pio_win); 649 if (rc != EOK) { 650 ddf_msg(LVL_ERROR, "isa_dev_add failed to get PIO window " 651 "for the device."); 652 return rc; 653 } 616 654 617 655 /* Make the bus device more visible. Does not do anything. */ -
uspace/drv/bus/pci/pciintel/pci.c
rdd7078c r3f03199 57 57 #include <ops/hw_res.h> 58 58 #include <device/hw_res.h> 59 #include <ops/pio_window.h> 60 #include <device/pio_window.h> 59 61 #include <ddi.h> 60 62 #include <pci_dev_iface.h> … … 141 143 } 142 144 145 static pio_window_t *pciintel_get_pio_window(ddf_fun_t *fnode) 146 { 147 pci_fun_t *fun = pci_fun(fnode); 148 149 if (fun == NULL) 150 return NULL; 151 return &fun->pio_window; 152 } 153 154 143 155 static int pci_config_space_write_32(ddf_fun_t *fun, uint32_t address, 144 156 uint32_t data) … … 198 210 .get_resource_list = &pciintel_get_resources, 199 211 .enable_interrupt = &pciintel_enable_interrupt, 212 }; 213 214 static pio_window_ops_t pciintel_pio_window_ops = { 215 .get_pio_window = &pciintel_get_pio_window 200 216 }; 201 217 … … 211 227 static ddf_dev_ops_t pci_fun_ops = { 212 228 .interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops, 229 .interfaces[PIO_WINDOW_DEV_IFACE] = &pciintel_pio_window_ops, 213 230 .interfaces[PCI_DEV_IFACE] = &pci_dev_ops 214 231 }; … … 233 250 static void pci_conf_read(pci_fun_t *fun, int reg, uint8_t *buf, size_t len) 234 251 { 252 const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 235 253 pci_bus_t *bus = pci_bus_from_fun(fun); 254 uint32_t val; 236 255 237 256 fibril_mutex_lock(&bus->conf_mutex); 238 239 const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 240 void *addr = bus->conf_data_port + (reg & 3); 241 242 pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr)); 243 257 258 pio_write_32(bus->conf_addr_reg, host2uint32_t_le(conf_addr)); 259 260 /* 261 * Always read full 32-bits from the PCI conf_data_port register and 262 * get the desired portion of it afterwards. Some architectures do not 263 * support shorter PIO reads offset from this register. 264 */ 265 val = uint32_t_le2host(pio_read_32(bus->conf_data_reg)); 266 244 267 switch (len) { 245 268 case 1: 246 /* No endianness change for 1 byte */ 247 buf[0] = pio_read_8(addr); 269 *buf = (uint8_t) (val >> ((reg & 3) * 8)); 248 270 break; 249 271 case 2: 250 ((uint16_t *) buf)[0] = uint16_t_le2host(pio_read_16(addr));272 *((uint16_t *) buf) = (uint16_t) (val >> ((reg & 3)) * 8); 251 273 break; 252 274 case 4: 253 ((uint32_t *) buf)[0] = uint32_t_le2host(pio_read_32(addr));275 *((uint32_t *) buf) = (uint32_t) val; 254 276 break; 255 277 } … … 260 282 static void pci_conf_write(pci_fun_t *fun, int reg, uint8_t *buf, size_t len) 261 283 { 284 const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 262 285 pci_bus_t *bus = pci_bus_from_fun(fun); 286 uint32_t val; 263 287 264 288 fibril_mutex_lock(&bus->conf_mutex); 265 266 const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 267 void *addr = bus->conf_data_port + (reg & 3); 268 269 pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr)); 289 290 /* 291 * Prepare to write full 32-bits to the PCI conf_data_port register. 292 * Some architectures do not support shorter PIO writes offset from this 293 * register. 294 */ 295 296 if (len < 4) { 297 /* 298 * We have fewer than full 32-bits, so we need to read the 299 * missing bits first. 300 */ 301 pio_write_32(bus->conf_addr_reg, host2uint32_t_le(conf_addr)); 302 val = uint32_t_le2host(pio_read_32(bus->conf_data_reg)); 303 } 270 304 271 305 switch (len) { 272 306 case 1: 273 /* No endianness change for 1 byte */274 pio_write_8(addr, buf[0]);307 val &= ~(0xffU << ((reg & 3) * 8)); 308 val |= *buf << ((reg & 3) * 8); 275 309 break; 276 310 case 2: 277 pio_write_16(addr, host2uint16_t_le(((uint16_t *) buf)[0])); 311 val &= ~(0xffffU << ((reg & 3) * 8)); 312 val |= *((uint16_t *) buf) << ((reg & 3) * 8); 278 313 break; 279 314 case 4: 280 pio_write_32(addr, host2uint32_t_le(((uint32_t *) buf)[0]));315 val = *((uint32_t *) buf); 281 316 break; 282 317 } 318 319 pio_write_32(bus->conf_addr_reg, host2uint32_t_le(conf_addr)); 320 pio_write_32(bus->conf_data_reg, host2uint32_t_le(val)); 283 321 284 322 fibril_mutex_unlock(&bus->conf_mutex); … … 411 449 hw_resources[count].res.io_range.address = range_addr; 412 450 hw_resources[count].res.io_range.size = range_size; 451 hw_resources[count].res.io_range.relative = true; 413 452 hw_resources[count].res.io_range.endianness = LITTLE_ENDIAN; 414 453 } else { … … 416 455 hw_resources[count].res.mem_range.address = range_addr; 417 456 hw_resources[count].res.mem_range.size = range_size; 457 hw_resources[count].res.mem_range.relative = false; 418 458 hw_resources[count].res.mem_range.endianness = LITTLE_ENDIAN; 419 459 } … … 433 473 { 434 474 /* Value of the BAR */ 435 uint32_t val, mask; 475 uint32_t val; 476 uint32_t bar; 477 uint32_t mask; 478 436 479 /* IO space address */ 437 480 bool io; … … 471 514 /* Get the address mask. */ 472 515 pci_conf_write_32(fun, addr, 0xffffffff); 473 mask &= pci_conf_read_32(fun, addr); 474 516 bar = pci_conf_read_32(fun, addr); 517 518 /* 519 * Unimplemented BARs read back as all 0's. 520 */ 521 if (!bar) 522 return addr + (addrw64 ? 8 : 4); 523 524 mask &= bar; 525 475 526 /* Restore the original value. */ 476 527 pci_conf_write_32(fun, addr, val); … … 520 571 { 521 572 uint8_t irq = pci_conf_read_8(fun, PCI_BRIDGE_INT_LINE); 522 if (irq != 0xff) 573 uint8_t pin = pci_conf_read_8(fun, PCI_BRIDGE_INT_PIN); 574 575 if (pin != 0 && irq != 0xff) 523 576 pci_add_interrupt(fun, irq); 524 577 } … … 583 636 pci_read_bars(fun); 584 637 pci_read_interrupt(fun); 638 639 /* Propagate the PIO window to the function. */ 640 fun->pio_window = bus->pio_win; 585 641 586 642 ddf_fun_set_ops(fun->fnode, &pci_fun_ops); … … 613 669 static int pci_dev_add(ddf_dev_t *dnode) 614 670 { 671 hw_resource_list_t hw_resources; 615 672 pci_bus_t *bus = NULL; 616 673 ddf_fun_t *ctl = NULL; … … 638 695 goto fail; 639 696 } 640 641 hw_resource_list_t hw_resources; 697 698 rc = pio_window_get(sess, &bus->pio_win); 699 if (rc != EOK) { 700 ddf_msg(LVL_ERROR, "pci_dev_add failed to get PIO window " 701 "for the device."); 702 goto fail; 703 } 642 704 643 705 rc = hw_res_get_resource_list(sess, &hw_resources); … … 662 724 hw_resources.resources[1].res.io_range.address); 663 725 664 bus->conf_io_addr = 665 (uint32_t) hw_resources.resources[0].res.io_range.address; 666 bus->conf_io_data = 667 (uint32_t) hw_resources.resources[1].res.io_range.address; 668 669 if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 4, 670 &bus->conf_addr_port)) { 726 if (pio_enable_resource(&bus->pio_win, &hw_resources.resources[0], 727 (void **) &bus->conf_addr_reg)) { 671 728 ddf_msg(LVL_ERROR, "Failed to enable configuration ports."); 672 729 rc = EADDRNOTAVAIL; 673 730 goto fail; 674 731 } 675 if (pio_enable ((void *)(uintptr_t)bus->conf_io_data, 4,676 &bus->conf_data_port)) {732 if (pio_enable_resource(&bus->pio_win, &hw_resources.resources[1], 733 (void **) &bus->conf_data_reg)) { 677 734 ddf_msg(LVL_ERROR, "Failed to enable configuration ports."); 678 735 rc = EADDRNOTAVAIL; … … 729 786 { 730 787 ddf_log_init(NAME); 731 pci_fun_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops;732 pci_fun_ops.interfaces[PCI_DEV_IFACE] = &pci_dev_ops;733 788 } 734 789 -
uspace/drv/bus/pci/pciintel/pci.h
rdd7078c r3f03199 40 40 #include "pci_regs.h" 41 41 42 #define PCI_MAX_HW_RES 842 #define PCI_MAX_HW_RES 10 43 43 44 44 typedef struct pciintel_bus { 45 45 /** DDF device node */ 46 46 ddf_dev_t *dnode; 47 uint32_t conf_io_addr; 48 uint32_t conf_io_data; 49 void *conf_data_port; 50 void *conf_addr_port; 47 ioport32_t *conf_addr_reg; 48 ioport32_t *conf_data_reg; 49 pio_window_t pio_win; 51 50 fibril_mutex_t conf_mutex; 52 51 } pci_bus_t; … … 68 67 hw_resource_list_t hw_resources; 69 68 hw_resource_t resources[PCI_MAX_HW_RES]; 69 pio_window_t pio_window; 70 70 } pci_fun_t; 71 71 -
uspace/drv/bus/usb/ehci/main.c
rdd7078c r3f03199 67 67 { 68 68 assert(device); 69 #define CHECK_RET_RETURN(ret, message...) \70 if (ret != EOK) { \71 usb_log_error(message); \72 return ret; \73 }74 69 75 uintptr_t reg_base = 0; 76 size_t reg_size = 0; 70 addr_range_t reg_range; 77 71 int irq = 0; 78 72 79 int ret = get_my_registers(device, ®_ base, ®_size, &irq);80 CHECK_RET_RETURN(ret,81 "Failed to get memory addresses for %" PRIun ": %s.\n",82 83 usb_log_info("Memory mapped regs at 0x%" PRIxn " (size %zu), IRQ %d.\n",84 reg_base, reg_size, irq);73 int ret = get_my_registers(device, ®_range, &irq); 74 if (ret != EOK) { 75 usb_log_error("Failed to get memory addresses for %" PRIun 76 ": %s.\n", ddf_dev_get_handle(device), str_error(ret)); 77 return ret; 78 } 85 79 86 ret = disable_legacy(device, reg_base, reg_size); 87 CHECK_RET_RETURN(ret, 88 "Failed to disable legacy USB: %s.\n", str_error(ret)); 80 usb_log_info("Memory mapped regs at %p (size %zu), IRQ %d.\n", 81 RNGABSPTR(reg_range), RNGSZ(reg_range), irq); 82 83 ret = disable_legacy(device, ®_range); 84 if (ret != EOK) { 85 usb_log_error("Failed to disable legacy USB: %s.\n", 86 str_error(ret)); 87 return ret; 88 } 89 89 90 90 /* High Speed, no bandwidth */ 91 ret = hcd_ddf_setup_hc(device, USB_SPEED_HIGH, 0, NULL); 92 CHECK_RET_RETURN(ret, 93 "Failed to init generci hcd driver: %s\n", str_error(ret)); 91 ret = hcd_ddf_setup_hc(device, USB_SPEED_HIGH, 0, NULL); 92 if (ret != EOK) { 93 usb_log_error("Failed to init generci hcd driver: %s\n", 94 str_error(ret)); 95 return ret; 96 } 94 97 95 98 usb_log_info("Controlling new EHCI device `%s' (handle %" PRIun ").\n", … … 97 100 98 101 return EOK; 99 #undef CHECK_RET_RETURN100 102 } 101 103 -
uspace/drv/bus/usb/ehci/res.c
rdd7078c r3f03199 71 71 * 72 72 * @param[in] dev Device asking for the addresses. 73 * @param[out] mem_reg_address Base address of the memory range. 74 * @param[out] mem_reg_size Size of the memory range. 73 * @param[out] mem_regs_p Pointer to the register range. 75 74 * @param[out] irq_no IRQ assigned to the device. 76 75 * @return Error code. 77 76 */ 78 77 int get_my_registers(ddf_dev_t *dev, 79 uintptr_t *mem_reg_address, size_t *mem_reg_size, int *irq_no)78 addr_range_t *mem_regs_p, int *irq_no) 80 79 { 81 80 assert(dev); … … 99 98 } 100 99 101 if (mem_reg_address) 102 *mem_reg_address = hw_res.mem_ranges.ranges[0].address; 103 if (mem_reg_size) 104 *mem_reg_size = hw_res.mem_ranges.ranges[0].size; 100 if (mem_regs_p) 101 *mem_regs_p = hw_res.mem_ranges.ranges[0]; 105 102 if (irq_no) 106 103 *irq_no = hw_res.irqs.irqs[0]; … … 234 231 } 235 232 236 int disable_legacy(ddf_dev_t *device, uintptr_t reg_base, size_t reg_size)233 int disable_legacy(ddf_dev_t *device, addr_range_t *reg_range) 237 234 { 238 235 assert(device); 239 236 usb_log_debug("Disabling EHCI legacy support.\n"); 240 237 241 #define CHECK_RET_RETURN(ret, message...) \242 if (ret != EOK) { \243 usb_log_error(message); \244 return ret; \245 } else (void)0246 247 238 /* Map EHCI registers */ 248 239 void *regs = NULL; 249 int ret = pio_enable((void*)reg_base, reg_size, ®s); 250 CHECK_RET_RETURN(ret, "Failed to map registers %p: %s.\n", 251 (void *) reg_base, str_error(ret)); 240 int ret = pio_enable_range(reg_range, ®s); 241 if (ret != EOK) { 242 usb_log_error("Failed to map registers %p: %s.\n", 243 RNGABSPTR(*reg_range), str_error(ret)); 244 return ret; 245 } 252 246 253 247 usb_log_debug2("Registers mapped at: %p.\n", regs); … … 264 258 265 259 ret = disable_extended_caps(device, eecp); 266 CHECK_RET_RETURN(ret, "Failed to disable extended capabilities: %s.\n", 267 str_error(ret)); 268 269 #undef CHECK_RET_RETURN 260 if (ret != EOK) { 261 usb_log_error("Failed to disable extended capabilities: %s.\n", 262 str_error(ret)); 263 return ret; 264 } 265 270 266 271 267 /* -
uspace/drv/bus/usb/ehci/res.h
rdd7078c r3f03199 37 37 38 38 #include <ddf/driver.h> 39 #include <device/hw_res_parsed.h> 39 40 40 int get_my_registers(ddf_dev_t *, uintptr_t *, size_t *, int *);41 int get_my_registers(ddf_dev_t *, addr_range_t *, int *); 41 42 int enable_interrupts(ddf_dev_t *); 42 int disable_legacy(ddf_dev_t *, uintptr_t, size_t);43 int disable_legacy(ddf_dev_t *, addr_range_t *); 43 44 44 45 #endif -
uspace/drv/bus/usb/ohci/hc.c
rdd7078c r3f03199 109 109 * @param[out] cmds Commands buffer. 110 110 * @param[in] cmds_size Size of the commands buffer (bytes). 111 * @param[in] regs Physical address of device's registers. 112 * @param[in] reg_size Size of the register area (bytes). 111 * @param[in] regs Device's register range. 113 112 * 114 113 * @return Error code. … … 116 115 int 117 116 hc_get_irq_code(irq_pio_range_t ranges[], size_t ranges_size, irq_cmd_t cmds[], 118 size_t cmds_size, uintptr_t regs, size_t reg_size)117 size_t cmds_size, addr_range_t *regs) 119 118 { 120 119 if ((ranges_size < sizeof(ohci_pio_ranges)) || 121 120 (cmds_size < sizeof(ohci_irq_commands)) || 122 ( reg_size< sizeof(ohci_regs_t)))121 (RNGSZ(*regs) < sizeof(ohci_regs_t))) 123 122 return EOVERFLOW; 124 123 125 124 memcpy(ranges, ohci_pio_ranges, sizeof(ohci_pio_ranges)); 126 ranges[0].base = regs;125 ranges[0].base = RNGABS(*regs); 127 126 128 127 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands)); 129 ohci_regs_t *registers = (ohci_regs_t *) regs;128 ohci_regs_t *registers = (ohci_regs_t *) RNGABSPTR(*regs); 130 129 cmds[0].addr = (void *) ®isters->interrupt_status; 131 130 cmds[3].addr = (void *) ®isters->interrupt_status; … … 135 134 } 136 135 136 /** Register interrupt handler. 137 * 138 * @param[in] device Host controller DDF device 139 * @param[in] regs Register range 140 * @param[in] irq Interrupt number 141 * @paran[in] handler Interrupt handler 142 * 143 * @return EOK on success or negative error code 144 */ 145 int hc_register_irq_handler(ddf_dev_t *device, addr_range_t *regs, int irq, 146 interrupt_handler_t handler) 147 { 148 int rc; 149 150 irq_pio_range_t irq_ranges[hc_irq_pio_range_count()]; 151 irq_cmd_t irq_cmds[hc_irq_cmd_count()]; 152 153 irq_code_t irq_code = { 154 .rangecount = hc_irq_pio_range_count(), 155 .ranges = irq_ranges, 156 .cmdcount = hc_irq_cmd_count(), 157 .cmds = irq_cmds 158 }; 159 160 rc = hc_get_irq_code(irq_ranges, sizeof(irq_ranges), irq_cmds, 161 sizeof(irq_cmds), regs); 162 if (rc != EOK) { 163 usb_log_error("Failed to generate IRQ code: %s.\n", 164 str_error(rc)); 165 return rc; 166 } 167 168 /* Register handler to avoid interrupt lockup */ 169 rc = register_interrupt_handler(device, irq, handler, &irq_code); 170 if (rc != EOK) { 171 usb_log_error("Failed to register interrupt handler: %s.\n", 172 str_error(rc)); 173 return rc; 174 } 175 176 return EOK; 177 } 178 137 179 /** Initialize OHCI hc driver structure 138 180 * 139 181 * @param[in] instance Memory place for the structure. 140 * @param[in] regs Address of the memory mapped I/O registers. 141 * @param[in] reg_size Size of the memory mapped area. 182 * @param[in] regs Device's I/O registers range. 142 183 * @param[in] interrupts True if w interrupts should be used 143 184 * @return Error code 144 185 */ 145 int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts) 146 { 147 assert(instance); 148 149 int ret = 150 pio_enable((void*)regs, reg_size, (void**)&instance->registers); 186 int hc_init(hc_t *instance, addr_range_t *regs, bool interrupts) 187 { 188 assert(instance); 189 190 int ret = pio_enable_range(regs, (void **) &instance->registers); 151 191 if (ret != EOK) { 152 usb_log_error("Failed to enable access to device regss: %s.\n",192 usb_log_error("Failed to gain access to device registers: %s.\n", 153 193 str_error(ret)); 154 194 return ret; -
uspace/drv/bus/usb/ohci/hc.h
rdd7078c r3f03199 39 39 #include <adt/list.h> 40 40 #include <ddi.h> 41 #include <ddf/interrupt.h> 41 42 42 43 #include <usb/usb.h> … … 73 74 size_t hc_irq_pio_range_count(void); 74 75 size_t hc_irq_cmd_count(void); 75 int hc_get_irq_code(irq_pio_range_t [], size_t, irq_cmd_t [], size_t, uintptr_t, 76 size_t); 76 int hc_get_irq_code(irq_pio_range_t [], size_t, irq_cmd_t [], size_t, 77 addr_range_t *); 78 int hc_register_irq_handler(ddf_dev_t *, addr_range_t *, int, 79 interrupt_handler_t); 77 80 int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun); 78 int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts);81 int hc_init(hc_t *instance, addr_range_t *regs, bool interrupts); 79 82 80 83 /** Safely dispose host controller internal structures -
uspace/drv/bus/usb/ohci/ohci.c
rdd7078c r3f03199 80 80 int device_setup_ohci(ddf_dev_t *device) 81 81 { 82 #define CHECK_RET_RETURN(ret, message...) \83 if (ret != EOK) { \84 usb_log_error(message); \85 return ret; \86 }87 82 88 uintptr_t reg_base = 0; 89 size_t reg_size = 0; 83 addr_range_t regs; 90 84 int irq = 0; 91 85 92 int ret = get_my_registers(device, ®_base, ®_size, &irq); 93 CHECK_RET_RETURN(ret, "Failed to get register memory addresses for %" 94 PRIun ": %s.\n", ddf_dev_get_handle(device), str_error(ret)); 86 int ret = get_my_registers(device, ®s, &irq); 87 if (ret != EOK) { 88 usb_log_error("Failed to get register memory addresses " 89 "for %" PRIun ": %s.\n", ddf_dev_get_handle(device), 90 str_error(ret)); 91 return ret; 92 } 95 93 96 94 usb_log_debug("Memory mapped regs at %p (size %zu), IRQ %d.\n", 97 (void *) reg_base, reg_size, irq);95 RNGABSPTR(regs), RNGSZ(regs), irq); 98 96 99 const size_t ranges_count = hc_irq_pio_range_count(); 100 const size_t cmds_count = hc_irq_cmd_count(); 101 irq_pio_range_t irq_ranges[ranges_count]; 102 irq_cmd_t irq_cmds[cmds_count]; 103 irq_code_t irq_code = { 104 .rangecount = ranges_count, 105 .ranges = irq_ranges, 106 .cmdcount = cmds_count, 107 .cmds = irq_cmds 108 }; 97 /* Initialize generic HCD driver */ 98 ret = hcd_ddf_setup_hc(device, USB_SPEED_FULL, 99 BANDWIDTH_AVAILABLE_USB11, bandwidth_count_usb11); 100 if (ret != EOK) { 101 usb_log_error("Failedd to setup generic hcd: %s.", 102 str_error(ret)); 103 return ret; 104 } 109 105 110 ret = hc_get_irq_code(irq_ranges, sizeof(irq_ranges), irq_cmds, 111 sizeof(irq_cmds), reg_base, reg_size); 112 CHECK_RET_RETURN(ret, "Failed to gen IRQ code: %s.\n", str_error(ret)); 113 114 /* Register handler to avoid interrupt lockup */ 115 ret = register_interrupt_handler(device, irq, irq_handler, &irq_code); 116 CHECK_RET_RETURN(ret, 117 "Failed to register irq handler: %s.\n", str_error(ret)); 106 ret = hc_register_irq_handler(device, ®s, irq, irq_handler); 107 if (ret != EOK) { 108 usb_log_error("Failed to register interrupt handler: %s.\n", 109 str_error(ret)); 110 hcd_ddf_clean_hc(device); 111 return ret; 112 } 118 113 119 114 /* Try to enable interrupts */ … … 130 125 } 131 126 132 /* Initialize generic HCD driver */ 133 ret = hcd_ddf_setup_hc(device, USB_SPEED_FULL, 134 BANDWIDTH_AVAILABLE_USB11, bandwidth_count_usb11); 135 if (ret != EOK) { 127 128 hc_t *hc_impl = malloc(sizeof(hc_t)); 129 if (!hc_impl) { 130 usb_log_error("Failed to allocate driver structure.\n"); 131 hcd_ddf_clean_hc(device); 136 132 unregister_interrupt_handler(device, irq); 137 133 return ret; 138 134 } 139 135 140 // TODO: Undo hcd_setup_device141 #define CHECK_RET_CLEAN_RETURN(ret, message...) \142 if (ret != EOK) { \143 unregister_interrupt_handler(device, irq); \144 CHECK_RET_RETURN(ret, message); \145 } else (void)0146 147 hc_t *hc_impl = malloc(sizeof(hc_t));148 ret = hc_impl ? EOK : ENOMEM;149 CHECK_RET_CLEAN_RETURN(ret, "Failed to allocate driver structure.\n");150 151 136 /* Initialize OHCI HC */ 152 ret = hc_init(hc_impl, reg_base, reg_size, interrupts); 153 CHECK_RET_CLEAN_RETURN(ret, "Failed to init hc: %s.\n", str_error(ret)); 137 ret = hc_init(hc_impl, ®s, interrupts); 138 if (ret != EOK) { 139 usb_log_error("Failed to init hc: %s.\n", str_error(ret)); 140 hcd_ddf_clean_hc(device); 141 unregister_interrupt_handler(device, irq); 142 return ret; 143 } 154 144 155 145 /* Connect OHCI to generic HCD */ … … 159 149 /* HC should be running OK. We can add root hub */ 160 150 ret = hcd_ddf_setup_root_hub(device); 161 CHECK_RET_CLEAN_RETURN(ret, 162 "Failed to register OHCI root hub: %s.\n", str_error(ret)); 151 if (ret != EOK) { 152 usb_log_error("Failed to registter OHCI root hub: %s.\n", 153 str_error(ret)); 154 hcd_ddf_clean_hc(device); 155 unregister_interrupt_handler(device, irq); 156 return ret; 157 } 163 158 164 159 return ret; -
uspace/drv/bus/usb/ohci/res.c
rdd7078c r3f03199 48 48 * 49 49 * @param[in] dev Device asking for the addresses. 50 * @param[out] mem_reg_address Base address of the memory range. 51 * @param[out] mem_reg_size Size of the memory range. 50 * @param[out] p_regs Pointer to register range. 52 51 * @param[out] irq_no IRQ assigned to the device. 53 52 * @return Error code. 54 53 */ 55 int get_my_registers(ddf_dev_t *dev, 56 uintptr_t *mem_reg_address, size_t *mem_reg_size, int *irq_no) 54 int get_my_registers(ddf_dev_t *dev, addr_range_t *p_regs, int *irq_no) 57 55 { 58 56 assert(dev); … … 66 64 hw_res_list_parsed_t hw_res; 67 65 hw_res_list_parsed_init(&hw_res); 68 const int ret = 66 const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0); 69 67 async_hangup(parent_sess); 70 68 if (ret != EOK) { … … 78 76 } 79 77 80 if (mem_reg_address) 81 *mem_reg_address = hw_res.mem_ranges.ranges[0].address; 82 if (mem_reg_size) 83 *mem_reg_size = hw_res.mem_ranges.ranges[0].size; 78 if (p_regs) 79 *p_regs = hw_res.mem_ranges.ranges[0]; 84 80 if (irq_no) 85 81 *irq_no = hw_res.irqs.irqs[0]; -
uspace/drv/bus/usb/ohci/res.h
rdd7078c r3f03199 36 36 37 37 #include <ddf/driver.h> 38 #include <device/hw_res_parsed.h> 38 39 39 int get_my_registers(ddf_dev_t *, uintptr_t *, size_t *, int *);40 int get_my_registers(ddf_dev_t *, addr_range_t *, int *); 40 41 int enable_interrupts(ddf_dev_t *); 41 42 -
uspace/drv/bus/usb/uhci/hc.c
rdd7078c r3f03199 111 111 * @param[out] cmds Commands buffer. 112 112 * @param[in] cmds_size Size of the commands buffer (bytes). 113 * @param[in] regs Physical address of device's registers. 114 * @param[in] reg_size Size of the register area (bytes). 113 * @param[in] regs Device's register range. 115 114 * 116 115 * @return Error code. … … 118 117 int 119 118 hc_get_irq_code(irq_pio_range_t ranges[], size_t ranges_size, irq_cmd_t cmds[], 120 size_t cmds_size, uintptr_t regs, size_t reg_size)119 size_t cmds_size, addr_range_t *regs) 121 120 { 122 121 if ((ranges_size < sizeof(uhci_irq_pio_ranges)) || 123 122 (cmds_size < sizeof(uhci_irq_commands)) || 124 ( reg_size< sizeof(uhci_regs_t)))123 (RNGSZ(*regs) < sizeof(uhci_regs_t))) 125 124 return EOVERFLOW; 126 125 127 126 memcpy(ranges, uhci_irq_pio_ranges, sizeof(uhci_irq_pio_ranges)); 128 ranges[0].base = regs;127 ranges[0].base = RNGABS(*regs); 129 128 130 129 memcpy(cmds, uhci_irq_commands, sizeof(uhci_irq_commands)); 131 uhci_regs_t *registers = (uhci_regs_t *) regs;130 uhci_regs_t *registers = (uhci_regs_t *) RNGABSPTR(*regs); 132 131 cmds[0].addr = (void*)®isters->usbsts; 133 132 cmds[3].addr = (void*)®isters->usbsts; 133 134 return EOK; 135 } 136 137 /** Register interrupt handler. 138 * 139 * @param[in] device Host controller DDF device 140 * @param[in] regs Register range 141 * @param[in] irq Interrupt number 142 * @paran[in] handler Interrupt handler 143 * 144 * @return EOK on success or negative error code 145 */ 146 int hc_register_irq_handler(ddf_dev_t *device, addr_range_t *regs, int irq, 147 interrupt_handler_t handler) 148 { 149 assert(device); 150 irq_pio_range_t irq_ranges[hc_irq_pio_range_count()]; 151 irq_cmd_t irq_cmds[hc_irq_cmd_count()]; 152 153 int ret = hc_get_irq_code(irq_ranges, sizeof(irq_ranges), irq_cmds, 154 sizeof(irq_cmds), regs); 155 if (ret != EOK) { 156 usb_log_error("Failed to generate IRQ commands: %s.\n", 157 str_error(ret)); 158 return ret; 159 } 160 161 irq_code_t irq_code = { 162 .rangecount = hc_irq_pio_range_count(), 163 .ranges = irq_ranges, 164 .cmdcount = hc_irq_cmd_count(), 165 .cmds = irq_cmds 166 }; 167 168 /* Register handler to avoid interrupt lockup */ 169 ret = register_interrupt_handler(device, irq, handler, &irq_code); 170 if (ret != EOK) { 171 usb_log_error("Failed to register interrupt handler: %s.\n", 172 str_error(ret)); 173 return ret; 174 } 134 175 135 176 return EOK; … … 196 237 * 197 238 * @param[in] instance Memory place to initialize. 198 * @param[in] regs Address of I/O control registers. 199 * @param[in] reg_size Size of I/O control registers. 239 * @param[in] regs Range of device's I/O control registers. 200 240 * @param[in] interrupts True if hw interrupts should be used. 201 241 * @return Error code. … … 205 245 * interrupt fibrils. 206 246 */ 207 int hc_init(hc_t *instance, void *regs, size_t reg_size, bool interrupts) 208 { 209 assert(reg_size >= sizeof(uhci_regs_t)); 247 int hc_init(hc_t *instance, addr_range_t *regs, bool interrupts) 248 { 249 assert(instance); 250 assert(regs); 251 assert(regs->size >= sizeof(uhci_regs_t)); 210 252 211 253 instance->hw_interrupts = interrupts; … … 214 256 /* allow access to hc control registers */ 215 257 uhci_regs_t *io; 216 int ret = pio_enable (regs, reg_size, (void **)&io);258 int ret = pio_enable_range(regs, (void **) &io); 217 259 if (ret != EOK) { 218 260 usb_log_error("Failed to gain access to registers at %p: %s.\n", … … 223 265 224 266 usb_log_debug( 225 "Device registers at %p (%zuB) accessible.\n", io, reg _size);267 "Device registers at %p (%zuB) accessible.\n", io, regs->size); 226 268 227 269 ret = hc_init_mem_structures(instance); -
uspace/drv/bus/usb/uhci/hc.h
rdd7078c r3f03199 36 36 #define DRV_UHCI_HC_H 37 37 38 #include <ddf/interrupt.h> 39 #include <device/hw_res_parsed.h> 38 40 #include <fibril.h> 39 41 #include <macros.h> … … 124 126 size_t hc_irq_pio_range_count(void); 125 127 size_t hc_irq_cmd_count(void); 126 int hc_get_irq_code(irq_pio_range_t [], size_t, irq_cmd_t [], size_t, uintptr_t, 127 size_t); 128 int hc_register_irq_handler(ddf_dev_t *, addr_range_t *, int, 129 interrupt_handler_t); 130 int hc_get_irq_code(irq_pio_range_t [], size_t, irq_cmd_t [], size_t, 131 addr_range_t *); 128 132 void hc_interrupt(hc_t *instance, uint16_t status); 129 int hc_init(hc_t *instance, void *regs, size_t reg_size, bool interupts);133 int hc_init(hc_t *instance, addr_range_t *regs, bool interupts); 130 134 int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch); 131 135 … … 136 140 static inline void hc_fini(hc_t *instance) {} /* TODO: implement*/ 137 141 #endif 142 138 143 /** 139 144 * @} -
uspace/drv/bus/usb/uhci/res.c
rdd7078c r3f03199 46 46 * 47 47 * @param[in] dev Device asking for the addresses. 48 * @param[out] io_reg_address Base address of the I/O range. 49 * @param[out] io_reg_size Size of the I/O range. 48 * @param[out] io_regs_p Pointer to register I/O range. 50 49 * @param[out] irq_no IRQ assigned to the device. 51 50 * @return Error code. 52 51 */ 53 int get_my_registers(ddf_dev_t *dev, 54 uintptr_t *io_reg_address, size_t *io_reg_size, int *irq_no) 52 int get_my_registers(ddf_dev_t *dev, addr_range_t *io_regs_p, int *irq_no) 55 53 { 56 54 assert(dev); … … 76 74 } 77 75 78 if (io_reg_address) 79 *io_reg_address = hw_res.io_ranges.ranges[0].address; 80 if (io_reg_size) 81 *io_reg_size = hw_res.io_ranges.ranges[0].size; 76 if (io_regs_p) 77 *io_regs_p = hw_res.io_ranges.ranges[0]; 82 78 if (irq_no) 83 79 *irq_no = hw_res.irqs.irqs[0]; -
uspace/drv/bus/usb/uhci/res.h
rdd7078c r3f03199 37 37 38 38 #include <ddf/driver.h> 39 #include <device/hw_res_parsed.h> 39 40 40 int get_my_registers(ddf_dev_t *, uintptr_t *, size_t *, int *);41 int get_my_registers(ddf_dev_t *, addr_range_t *, int *); 41 42 int enable_interrupts(ddf_dev_t *); 42 43 int disable_legacy(ddf_dev_t *); -
uspace/drv/bus/usb/uhci/uhci.c
rdd7078c r3f03199 80 80 return EBADMEM; 81 81 82 #define CHECK_RET_RETURN(ret, message...) \ 83 if (ret != EOK) { \ 84 usb_log_error(message); \ 85 return ret; \ 86 } else (void)0 87 88 uintptr_t reg_base = 0; 89 size_t reg_size = 0; 82 addr_range_t regs; 90 83 int irq = 0; 91 84 92 int ret = get_my_registers(device, ®_base, ®_size, &irq); 93 CHECK_RET_RETURN(ret, "Failed to get I/O region for %" PRIun ": %s.\n", 94 ddf_dev_get_handle(device), str_error(ret)); 95 usb_log_debug("I/O regs at 0x%p (size %zu), IRQ %d.\n", 96 (void *) reg_base, reg_size, irq); 85 int ret = get_my_registers(device, ®s, &irq); 86 if (ret != EOK) { 87 usb_log_error("Failed to get I/O addresses for %" PRIun ": %s.\n", 88 ddf_dev_get_handle(device), str_error(ret)); 89 return ret; 90 } 91 usb_log_debug("I/O regs at %p (size %zu), IRQ %d.\n", 92 RNGABSPTR(regs), RNGSZ(regs), irq); 97 93 98 const size_t ranges_count = hc_irq_pio_range_count(); 99 const size_t cmds_count = hc_irq_cmd_count(); 100 irq_pio_range_t irq_ranges[ranges_count]; 101 irq_cmd_t irq_cmds[cmds_count]; 102 ret = hc_get_irq_code(irq_ranges, sizeof(irq_ranges), irq_cmds, 103 sizeof(irq_cmds), reg_base, reg_size); 104 CHECK_RET_RETURN(ret, "Failed to generate IRQ commands: %s.\n", 105 str_error(ret)); 94 ret = hcd_ddf_setup_hc(device, USB_SPEED_FULL, 95 BANDWIDTH_AVAILABLE_USB11, bandwidth_count_usb11); 96 if (ret != EOK) { 97 usb_log_error("Failed to setup generic HCD.\n"); 98 return ret; 99 } 106 100 107 irq_code_t irq_code = {108 .rangecount = ranges_count,109 .ranges = irq_ranges,110 .cmdcount = cmds_count,111 .cmds = irq_cmds112 } ;101 hc_t *hc = malloc(sizeof(hc_t)); 102 if (!hc) { 103 usb_log_error("Failed to allocate UHCI HC structure.\n"); 104 hcd_ddf_clean_hc(device); 105 return ENOMEM; 106 } 113 107 114 /* Register handler to avoid interrupt lockup */ 115 ret = register_interrupt_handler(device, irq, irq_handler, &irq_code); 116 CHECK_RET_RETURN(ret, "Failed to register interrupt handler: %s.\n", 117 str_error(ret)); 118 119 ret = disable_legacy(device); 120 CHECK_RET_RETURN(ret, "Failed to disable legacy USB: %s.\n", 121 str_error(ret)); 108 ret = hc_register_irq_handler(device, ®s, irq, irq_handler); 109 if (ret != EOK) { 110 usb_log_error("Failed to register interrupt handler: %s.\n", 111 str_error(ret)); 112 hcd_ddf_clean_hc(device); 113 return ret; 114 } 122 115 123 116 bool interrupts = false; … … 131 124 } 132 125 133 ret = hcd_ddf_setup_hc(device, USB_SPEED_FULL,134 BANDWIDTH_AVAILABLE_USB11, bandwidth_count_usb11);135 CHECK_RET_RETURN(ret, "Failed to setup UHCI HCD.\n");136 137 hc_t *hc = malloc(sizeof(hc_t));138 ret = hc ? EOK : ENOMEM;139 CHECK_RET_RETURN(ret, "Failed to allocate UHCI HC structure.\n");126 ret = disable_legacy(device); 127 if (ret != EOK) { 128 usb_log_error("Failed to disable legacy USB: %s.\n", 129 str_error(ret)); 130 hcd_ddf_clean_hc(device); 131 return ret; 132 } 140 133 141 ret = hc_init(hc, (void*)reg_base, reg_size, interrupts); 142 CHECK_RET_RETURN(ret, 143 "Failed to init uhci_hcd: %s.\n", str_error(ret)); 134 ret = hc_init(hc, ®s, interrupts); 135 if (ret != EOK) { 136 usb_log_error("Failed to init uhci_hcd: %s.\n", str_error(ret)); 137 hcd_ddf_clean_hc(device); 138 // TODO unregister interrupt handler 139 return ret; 140 } 144 141 145 142 hcd_set_implementation(dev_to_hcd(device), hc, hc_schedule, NULL, NULL); … … 151 148 ret = hcd_ddf_setup_root_hub(device); 152 149 if (ret != EOK) { 153 // TODO: Undo hcd_setup_device154 150 hc_fini(hc); 155 CHECK_RET_RETURN(ret, "Failed to setup UHCI root hub: %s.\n", 151 hcd_ddf_clean_hc(device); 152 // TODO unregister interrupt handler 153 usb_log_error("Failed to setup UHCI root hub: %s.\n", 156 154 str_error(ret)); 157 155 return ret; -
uspace/drv/bus/usb/uhci/utils/malloc32.h
rdd7078c r3f03199 92 92 */ 93 93 static inline void free32(void *addr) 94 { free(addr); } 94 { 95 free(addr); 96 } 95 97 96 98 /** Create 4KB page mapping … … 98 100 * @return Address of the mapped page, NULL on failure. 99 101 */ 100 static inline void * 102 static inline void *get_page(void) 101 103 { 102 void *address, *phys; 104 uintptr_t phys; 105 void *address; 106 103 107 const int ret = dmamem_map_anonymous(UHCI_REQUIRED_PAGE_SIZE, 104 AS_AREA_READ | AS_AREA_WRITE, 0, &phys, &address); 105 return ret == EOK ? address : NULL; 108 DMAMEM_4GiB, AS_AREA_READ | AS_AREA_WRITE, 0, &phys, 109 &address); 110 111 return ((ret == EOK) ? address : NULL); 106 112 } 107 113 -
uspace/drv/bus/usb/usbmid/explore.c
rdd7078c r3f03199 50 50 static bool interface_in_list(const list_t *list, int interface_no) 51 51 { 52 list_foreach(*list, l) { 53 const usbmid_interface_t *iface = usbmid_interface_from_link(l); 52 list_foreach(*list, link, const usbmid_interface_t, iface) { 54 53 if (iface->interface_no == interface_no) { 55 54 return true; -
uspace/drv/bus/usb/usbmid/usbmid.c
rdd7078c r3f03199 140 140 } 141 141 142 list_foreach(match_ids.ids, link) { 143 match_id_t *match_id = list_get_instance(link, match_id_t, link); 142 list_foreach(match_ids.ids, link, match_id_t, match_id) { 144 143 rc = ddf_fun_add_match_id(child, match_id->id, match_id->score); 145 144 if (rc != EOK) { -
uspace/drv/bus/usb/vhc/transfer.c
rdd7078c r3f03199 180 180 int targets = 0; 181 181 182 list_foreach(vhc->devices, pos) { 183 vhc_virtdev_t *dev = list_get_instance(pos, vhc_virtdev_t, link); 182 list_foreach(vhc->devices, link, vhc_virtdev_t, dev) { 184 183 fibril_mutex_lock(&dev->guard); 185 184 if (dev->address == transfer->batch->ep->address) { -
uspace/drv/char/i8042/i8042.c
rdd7078c r3f03199 145 145 * 146 146 * @param dev Driver structure to initialize. 147 * @param regs I/O address of registers. 148 * @param reg_size size of the reserved I/O address space. 147 * @param regs I/O range of registers. 149 148 * @param irq_kbd IRQ for primary port. 150 149 * @param irq_mouse IRQ for aux port. … … 154 153 * 155 154 */ 156 int i8042_init(i8042_t *dev, void *regs, size_t reg_size, int irq_kbd,155 int i8042_init(i8042_t *dev, addr_range_t *regs, int irq_kbd, 157 156 int irq_mouse, ddf_dev_t *ddf_dev) 158 157 { … … 162 161 const size_t cmd_count = sizeof(i8042_cmds) / sizeof(irq_cmd_t); 163 162 irq_cmd_t cmds[cmd_count]; 163 i8042_regs_t *ar; 164 164 165 165 int rc; … … 170 170 dev->aux_fun = NULL; 171 171 172 if (reg _size < sizeof(i8042_regs_t)) {172 if (regs->size < sizeof(i8042_regs_t)) { 173 173 rc = EINVAL; 174 174 goto error; 175 175 } 176 176 177 if (pio_enable (regs, sizeof(i8042_regs_t), (void **) &dev->regs) != 0) {177 if (pio_enable_range(regs, (void **) &dev->regs) != 0) { 178 178 rc = EIO; 179 179 goto error; … … 234 234 235 235 memcpy(ranges, i8042_ranges, sizeof(i8042_ranges)); 236 ranges[0].base = (uintptr_t) regs; 237 236 ranges[0].base = RNGABS(*regs); 237 238 239 ar = RNGABSPTR(*regs); 238 240 memcpy(cmds, i8042_cmds, sizeof(i8042_cmds)); 239 cmds[0].addr = (void *) & (((i8042_regs_t *) regs)->status);240 cmds[3].addr = (void *) & (((i8042_regs_t *) regs)->data);241 cmds[0].addr = (void *) &ar->status; 242 cmds[3].addr = (void *) &ar->data; 241 243 242 244 irq_code_t irq_code = { -
uspace/drv/char/i8042/i8042.h
rdd7078c r3f03199 68 68 } i8042_t; 69 69 70 int i8042_init(i8042_t *, void *, size_t, int, int, ddf_dev_t *);70 int i8042_init(i8042_t *, addr_range_t *, int, int, ddf_dev_t *); 71 71 72 72 #endif -
uspace/drv/char/i8042/main.c
rdd7078c r3f03199 49 49 * 50 50 * @param[in] dev Device asking for the addresses. 51 * @param[out] io_reg_address Base address of the memory range. 52 * @param[out] io_reg_size Size of the memory range. 51 * @param[out] p_io_reg Pointer to register range. 53 52 * @param[out] kbd_irq Primary port IRQ. 54 53 * @param[out] mouse_irq Auxiliary port IRQ. … … 57 56 * 58 57 */ 59 static int get_my_registers(ddf_dev_t *dev, uintptr_t *io_reg_address,60 size_t *io_reg_size,int *kbd_irq, int *mouse_irq)58 static int get_my_registers(ddf_dev_t *dev, addr_range_t *p_io_reg, 59 int *kbd_irq, int *mouse_irq) 61 60 { 62 61 assert(dev); … … 79 78 } 80 79 81 if (io_reg_address) 82 *io_reg_address = hw_resources.io_ranges.ranges[0].address; 83 84 if (io_reg_size) 85 *io_reg_size = hw_resources.io_ranges.ranges[0].size; 80 if (p_io_reg) 81 *p_io_reg = hw_resources.io_ranges.ranges[0]; 86 82 87 83 if (kbd_irq) … … 104 100 static int i8042_dev_add(ddf_dev_t *device) 105 101 { 106 uintptr_t io_regs = 0; 107 size_t io_size = 0; 102 addr_range_t io_regs; 108 103 int kbd = 0; 109 104 int mouse = 0; … … 113 108 return EINVAL; 114 109 115 rc = get_my_registers(device, &io_regs, & io_size, &kbd, &mouse);110 rc = get_my_registers(device, &io_regs, &kbd, &mouse); 116 111 if (rc != EOK) { 117 112 ddf_msg(LVL_ERROR, "Failed to get registers: %s.", … … 120 115 } 121 116 122 ddf_msg(LVL_DEBUG, "I/O regs at %p (size %zuB), IRQ kbd %d, IRQ mouse %d.", 123 (void *) io_regs, io_size, kbd, mouse); 117 ddf_msg(LVL_DEBUG, 118 "I/O regs at %p (size %zuB), IRQ kbd %d, IRQ mouse %d.", 119 RNGABSPTR(io_regs), RNGSZ(io_regs), kbd, mouse); 124 120 125 121 i8042_t *i8042 = ddf_dev_data_alloc(device, sizeof(i8042_t)); … … 129 125 } 130 126 131 rc = i8042_init(i8042, (void *) io_regs, io_size, kbd, mouse, device);127 rc = i8042_init(i8042, &io_regs, kbd, mouse, device); 132 128 if (rc != EOK) { 133 129 ddf_msg(LVL_ERROR, "Failed to initialize i8042 driver: %s.", -
uspace/drv/fb/amdm37x_dispc/amdm37x_dispc.c
rdd7078c r3f03199 273 273 ddf_log_note("Setting mode: %ux%ux%u\n", x, y, bpp*8); 274 274 const size_t size = ALIGN_UP(x * y * bpp, PAGE_SIZE); 275 void *buffer, *pa; 276 int ret = dmamem_map_anonymous(size, AS_AREA_READ | AS_AREA_WRITE, 277 0, &pa, &buffer); 275 uintptr_t pa; 276 void *buffer; 277 int ret = dmamem_map_anonymous(size, DMAMEM_4GiB, 278 AS_AREA_READ | AS_AREA_WRITE, 0, &pa, &buffer); 278 279 if (ret != EOK) { 279 280 ddf_log_error("Failed to get new FB\n"); 280 281 return ret; 281 282 } 283 282 284 amdm37x_dispc_setup_fb(dispc->regs, x, y, bpp *8, (uint32_t)pa); 283 285 dispc->active_fb.idx = mode.index; -
uspace/drv/fb/kfb/port.c
rdd7078c r3f03199 333 333 334 334 kfb.size = scanline * height; 335 rc = physmem_map( (void *)paddr + offset,335 rc = physmem_map(paddr + offset, 336 336 ALIGN_UP(kfb.size, PAGE_SIZE) >> PAGE_WIDTH, 337 337 AS_AREA_READ | AS_AREA_WRITE, (void *) &kfb.addr); -
uspace/drv/infrastructure/rootmac/rootmac.c
rdd7078c r3f03199 54 54 .address = 0xfec00000, 55 55 .size = 4, 56 .relative = false, 56 57 .endianness = LITTLE_ENDIAN 57 58 } … … 62 63 .address = 0xfee00000, 63 64 .size = 4, 65 .relative = false, 64 66 .endianness = LITTLE_ENDIAN 65 67 } -
uspace/drv/infrastructure/rootpc/rootpc.c
rdd7078c r3f03199 51 51 #include <ops/hw_res.h> 52 52 #include <device/hw_res.h> 53 #include <ops/pio_window.h> 54 #include <device/pio_window.h> 53 55 54 56 #define NAME "rootpc" … … 56 58 typedef struct rootpc_fun { 57 59 hw_resource_list_t hw_resources; 60 pio_window_t pio_window; 58 61 } rootpc_fun_t; 59 62 … … 78 81 .address = 0xCF8, 79 82 .size = 4, 83 .relative = false, 80 84 .endianness = LITTLE_ENDIAN 81 85 } … … 86 90 .address = 0xCFC, 87 91 .size = 4, 92 .relative = false, 88 93 .endianness = LITTLE_ENDIAN 89 94 } … … 93 98 static rootpc_fun_t pci_data = { 94 99 .hw_resources = { 95 sizeof(pci_conf_regs) /sizeof(pci_conf_regs[0]),100 sizeof(pci_conf_regs) / sizeof(pci_conf_regs[0]), 96 101 pci_conf_regs 102 }, 103 .pio_window = { 104 .mem = { 105 .base = UINT32_C(0), 106 .size = UINT32_C(0xffffffff) /* practical maximum */ 107 }, 108 .io = { 109 .base = UINT32_C(0), 110 .size = UINT32_C(0x10000) 111 } 97 112 } 98 113 }; … … 117 132 118 133 return false; 134 } 135 136 static pio_window_t *rootpc_get_pio_window(ddf_fun_t *fnode) 137 { 138 rootpc_fun_t *fun = rootpc_fun(fnode); 139 140 assert(fun != NULL); 141 return &fun->pio_window; 119 142 } 120 143 … … 122 145 .get_resource_list = &rootpc_get_resources, 123 146 .enable_interrupt = &rootpc_enable_interrupt, 147 }; 148 149 static pio_window_ops_t fun_pio_window_ops = { 150 .get_pio_window = &rootpc_get_pio_window 124 151 }; 125 152 … … 197 224 ddf_log_init(NAME); 198 225 rootpc_fun_ops.interfaces[HW_RES_DEV_IFACE] = &fun_hw_res_ops; 226 rootpc_fun_ops.interfaces[PIO_WINDOW_DEV_IFACE] = &fun_pio_window_ops; 199 227 } 200 228 -
uspace/drv/nic/e1k/e1k.c
rdd7078c r3f03199 59 59 #define E1000_DEFAULT_INTERRUPT_INTERVAL_USEC 250 60 60 61 /* Must be power of 8 */ //TODO power or multiple? previous value was 12862 #define E1000_RX_FRAME_COUNT 863 #define E1000_TX_FRAME_COUNT 861 /* Must be power of 8 */ 62 #define E1000_RX_FRAME_COUNT 128 63 #define E1000_TX_FRAME_COUNT 128 64 64 65 65 #define E1000_RECEIVE_ADDRESS 16 … … 129 129 130 130 /** Physical tx ring address */ 131 void *tx_ring_phys;131 uintptr_t tx_ring_phys; 132 132 /** Virtual tx ring address */ 133 133 void *tx_ring_virt; 134 134 135 135 /** Ring of TX frames, physical address */ 136 void **tx_frame_phys;136 uintptr_t *tx_frame_phys; 137 137 /** Ring of TX frames, virtual address */ 138 138 void **tx_frame_virt; 139 139 140 140 /** Physical rx ring address */ 141 void *rx_ring_phys;141 uintptr_t rx_ring_phys; 142 142 /** Virtual rx ring address */ 143 143 void *rx_ring_virt; 144 144 145 145 /** Ring of RX frames, physical address */ 146 void **rx_frame_phys;146 uintptr_t *rx_frame_phys; 147 147 /** Ring of RX frames, virtual address */ 148 148 void **rx_frame_virt; … … 1377 1377 int rc = dmamem_map_anonymous( 1378 1378 E1000_RX_FRAME_COUNT * sizeof(e1000_rx_descriptor_t), 1379 AS_AREA_READ | AS_AREA_WRITE, 0, &e1000->rx_ring_phys,1380 &e1000->rx_ring_ virt);1379 DMAMEM_4GiB, AS_AREA_READ | AS_AREA_WRITE, 0, 1380 &e1000->rx_ring_phys, &e1000->rx_ring_virt); 1381 1381 if (rc != EOK) 1382 1382 return rc; … … 1387 1387 (uint32_t) PTR_TO_U64(e1000->rx_ring_phys)); 1388 1388 1389 e1000->rx_frame_phys = 1390 calloc(E1000_RX_FRAME_COUNT, sizeof( void *));1389 e1000->rx_frame_phys = (uintptr_t *) 1390 calloc(E1000_RX_FRAME_COUNT, sizeof(uintptr_t)); 1391 1391 e1000->rx_frame_virt = 1392 1392 calloc(E1000_RX_FRAME_COUNT, sizeof(void *)); 1393 if ( e1000->rx_frame_phys == NULL || e1000->rx_frame_virt == NULL) {1393 if ((e1000->rx_frame_phys == NULL) || (e1000->rx_frame_virt == NULL)) { 1394 1394 rc = ENOMEM; 1395 1395 goto error; … … 1397 1397 1398 1398 size_t i; 1399 uintptr_t frame_phys; 1399 1400 void *frame_virt; 1400 void *frame_phys;1401 1401 1402 1402 for (i = 0; i < E1000_RX_FRAME_COUNT; i++) { 1403 rc = dmamem_map_anonymous( 1404 E1000_MAX_SEND_FRAME_SIZE, AS_AREA_READ | AS_AREA_WRITE,1405 0,&frame_phys, &frame_virt);1403 rc = dmamem_map_anonymous(E1000_MAX_SEND_FRAME_SIZE, 1404 DMAMEM_4GiB, AS_AREA_READ | AS_AREA_WRITE, 0, 1405 &frame_phys, &frame_virt); 1406 1406 if (rc != EOK) 1407 1407 goto error; 1408 1408 1409 e1000->rx_frame_phys[i] = frame_phys; 1409 1410 e1000->rx_frame_virt[i] = frame_virt; 1410 e1000->rx_frame_phys[i] = frame_phys;1411 1411 } 1412 1412 … … 1424 1424 if (e1000->rx_frame_virt[i] != NULL) { 1425 1425 dmamem_unmap_anonymous(e1000->rx_frame_virt[i]); 1426 e1000->rx_frame_phys[i] = 0; 1426 1427 e1000->rx_frame_virt[i] = NULL; 1427 e1000->rx_frame_phys[i] = NULL;1428 1428 } 1429 1429 } … … 1436 1436 if (e1000->rx_frame_virt != NULL) { 1437 1437 free(e1000->rx_frame_virt); 1438 e1000->rx_frame_ phys= NULL;1438 e1000->rx_frame_virt = NULL; 1439 1439 } 1440 1440 … … 1454 1454 for (unsigned int offset = 0; offset < E1000_RX_FRAME_COUNT; offset++) { 1455 1455 dmamem_unmap_anonymous(e1000->rx_frame_virt[offset]); 1456 e1000->rx_frame_phys[offset] = 0; 1456 1457 e1000->rx_frame_virt[offset] = NULL; 1457 e1000->rx_frame_phys[offset] = NULL;1458 1458 } 1459 1459 1460 1460 free(e1000->rx_frame_virt); 1461 free(e1000->rx_frame_phys); 1461 1462 e1000->rx_frame_phys = NULL; 1462 1463 e1000->rx_frame_virt = NULL; 1463 e1000->rx_frame_phys = NULL;1464 1464 1465 dmamem_unmap_anonymous(e1000->rx_ring_virt); 1465 1466 } … … 1569 1570 fibril_mutex_lock(&e1000->tx_lock); 1570 1571 1571 e1000->tx_ring_phys = NULL;1572 e1000->tx_ring_phys = 0; 1572 1573 e1000->tx_ring_virt = NULL; 1574 1573 1575 e1000->tx_frame_phys = NULL; 1574 1576 e1000->tx_frame_virt = NULL; … … 1576 1578 int rc = dmamem_map_anonymous( 1577 1579 E1000_TX_FRAME_COUNT * sizeof(e1000_tx_descriptor_t), 1578 AS_AREA_READ | AS_AREA_WRITE, 0, &e1000->tx_ring_phys,1579 &e1000->tx_ring_ virt);1580 DMAMEM_4GiB, AS_AREA_READ | AS_AREA_WRITE, 0, 1581 &e1000->tx_ring_phys, &e1000->tx_ring_virt); 1580 1582 if (rc != EOK) 1581 1583 goto error; … … 1584 1586 E1000_TX_FRAME_COUNT * sizeof(e1000_tx_descriptor_t)); 1585 1587 1586 e1000->tx_frame_phys = calloc(E1000_TX_FRAME_COUNT, sizeof(void *)); 1587 e1000->tx_frame_virt = calloc(E1000_TX_FRAME_COUNT, sizeof(void *)); 1588 1589 if (e1000->tx_frame_phys == NULL || e1000->tx_frame_virt == NULL) { 1588 e1000->tx_frame_phys = (uintptr_t *) 1589 calloc(E1000_TX_FRAME_COUNT, sizeof(uintptr_t)); 1590 e1000->tx_frame_virt = 1591 calloc(E1000_TX_FRAME_COUNT, sizeof(void *)); 1592 1593 if ((e1000->tx_frame_phys == NULL) || (e1000->tx_frame_virt == NULL)) { 1590 1594 rc = ENOMEM; 1591 1595 goto error; … … 1593 1597 1594 1598 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) { 1595 rc = dmamem_map_anonymous( 1596 E1000_MAX_SEND_FRAME_SIZE, AS_AREA_READ | AS_AREA_WRITE,1599 rc = dmamem_map_anonymous(E1000_MAX_SEND_FRAME_SIZE, 1600 DMAMEM_4GiB, AS_AREA_READ | AS_AREA_WRITE, 1597 1601 0, &e1000->tx_frame_phys[i], &e1000->tx_frame_virt[i]); 1598 1602 if (rc != EOK) … … 1616 1620 } 1617 1621 1618 if ( e1000->tx_frame_phys != NULL && e1000->tx_frame_virt != NULL) {1622 if ((e1000->tx_frame_phys != NULL) && (e1000->tx_frame_virt != NULL)) { 1619 1623 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) { 1620 1624 if (e1000->tx_frame_virt[i] != NULL) { 1621 1625 dmamem_unmap_anonymous(e1000->tx_frame_virt[i]); 1626 e1000->tx_frame_phys[i] = 0; 1622 1627 e1000->tx_frame_virt[i] = NULL; 1623 e1000->tx_frame_phys[i] = NULL;1624 1628 } 1625 1629 } … … 1633 1637 if (e1000->tx_frame_virt != NULL) { 1634 1638 free(e1000->tx_frame_virt); 1635 e1000->tx_frame_ phys= NULL;1639 e1000->tx_frame_virt = NULL; 1636 1640 } 1637 1641 … … 1650 1654 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) { 1651 1655 dmamem_unmap_anonymous(e1000->tx_frame_virt[i]); 1656 e1000->tx_frame_phys[i] = 0; 1652 1657 e1000->tx_frame_virt[i] = NULL; 1653 e1000->tx_frame_phys[i] = NULL;1654 1658 } 1655 1659 … … 1661 1665 if (e1000->tx_frame_virt != NULL) { 1662 1666 free(e1000->tx_frame_virt); 1663 e1000->tx_frame_ phys= NULL;1667 e1000->tx_frame_virt = NULL; 1664 1668 } 1665 1669 … … 1937 1941 e1000->irq = hw_resources->irqs.irqs[0]; 1938 1942 e1000->reg_base_phys = 1939 MEMADDR_TO_PTR( hw_resources->mem_ranges.ranges[0].address);1943 MEMADDR_TO_PTR(RNGABS(hw_resources->mem_ranges.ranges[0])); 1940 1944 1941 1945 return EOK; -
uspace/drv/nic/ne2k/ne2k.c
rdd7078c r3f03199 211 211 ne2k->irq = hw_res_parsed.irqs.irqs[0]; 212 212 213 ne2k->base_port = (void *) (uintptr_t)214 hw_res_parsed.io_ranges.ranges[0].address;213 addr_range_t regs = hw_res_parsed.io_ranges.ranges[0]; 214 ne2k->base_port = RNGABSPTR(regs); 215 215 216 216 hw_res_list_parsed_clean(&hw_res_parsed); 217 217 218 /* Enable p ortI/O */219 if (pio_enable (ne2k->base_port, NE2K_IO_SIZE, &ne2k->port) != EOK)218 /* Enable programmed I/O */ 219 if (pio_enable_range(®s, &ne2k->port) != EOK) 220 220 return EADDRNOTAVAIL; 221 222 221 223 222 ne2k->data_port = ne2k->port + NE2K_DATA; -
uspace/drv/nic/rtl8139/driver.c
rdd7078c r3f03199 1087 1087 ddf_msg(LVL_DEBUG, "%s device: irq 0x%x assigned", ddf_dev_get_name(dev), rtl8139->irq); 1088 1088 1089 rtl8139->io_addr = IOADDR_TO_PTR( hw_resources->io_ranges.ranges[0].address);1089 rtl8139->io_addr = IOADDR_TO_PTR(RNGABS(hw_resources->io_ranges.ranges[0])); 1090 1090 if (hw_resources->io_ranges.ranges[0].size < RTL8139_IO_SIZE) { 1091 1091 ddf_msg(LVL_ERROR, "i/o range assigned to the device " … … 1144 1144 ddf_msg(LVL_DEBUG, "Creating buffers"); 1145 1145 1146 rc = dmamem_map_anonymous(TX_PAGES * PAGE_SIZE, AS_AREA_WRITE, 0,1147 &rtl8139->tx_buff_phys, &rtl8139->tx_buff_virt);1146 rc = dmamem_map_anonymous(TX_PAGES * PAGE_SIZE, DMAMEM_4GiB, 1147 AS_AREA_WRITE, 0, &rtl8139->tx_buff_phys, &rtl8139->tx_buff_virt); 1148 1148 if (rc != EOK) { 1149 1149 ddf_msg(LVL_ERROR, "Can not allocate transmitter buffers."); … … 1164 1164 RxBUF_TOT_LENGTH); 1165 1165 1166 rc = dmamem_map_anonymous(RxBUF_TOT_LENGTH, AS_AREA_READ, 0,1167 &rtl8139->rx_buff_phys, &rtl8139->rx_buff_virt);1166 rc = dmamem_map_anonymous(RxBUF_TOT_LENGTH, DMAMEM_4GiB, 1167 AS_AREA_READ, 0, &rtl8139->rx_buff_phys, &rtl8139->rx_buff_virt); 1168 1168 if (rc != EOK) { 1169 1169 ddf_msg(LVL_ERROR, "Can not allocate receive buffer."); -
uspace/drv/nic/rtl8139/driver.h
rdd7078c r3f03199 100 100 * Each buffer takes 2kB 101 101 */ 102 void *tx_buff_phys;102 uintptr_t tx_buff_phys; 103 103 void *tx_buff_virt; 104 104 … … 117 117 118 118 /** Buffer for receiving frames */ 119 void *rx_buff_phys;119 uintptr_t rx_buff_phys; 120 120 void *rx_buff_virt; 121 121
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