Changeset 3e828ea in mainline for kernel/arch/mips32


Ignore:
Timestamp:
2019-09-23T12:49:29Z (6 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
9be2358
Parents:
9259d20 (diff), 1a4ec93f (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
git-author:
Jiri Svoboda <jiri@…> (2019-09-22 12:49:07)
git-committer:
Jiri Svoboda <jiri@…> (2019-09-23 12:49:29)
Message:

Merge changes from master, especially Meson build

Location:
kernel/arch/mips32
Files:
10 edited
1 moved

Legend:

Unmodified
Added
Removed

  • kernel/arch/mips32/include/arch/arch.h

    r9259d20 r3e828ea  
    4242#define CPUMAP_MAX_RECORDS         32
    4343#define BOOTINFO_TASK_NAME_BUFLEN  32
     44#define BOOTINFO_BOOTARGS_BUFLEN   256
    4445
    4546extern size_t cpu_count;
    … …  
    6667        uint32_t cpumap;
    6768        taskmap_t taskmap;
     69        char bootargs[BOOTINFO_BOOTARGS_BUFLEN];
    6870} bootinfo_t;
    6971

  • kernel/arch/mips32/include/arch/exception.h

    r9259d20 r3e828ea  
    5757#define EXC_VCED   31
    5858
     59#define INT_SW0    0
     60#define INT_SW1    1
     61#define INT_HW0    2
     62#define INT_HW1    3
     63#define INT_HW2    4
     64#define INT_HW3    5
     65#define INT_HW4    6
     66#define INT_TIMER  7
     67
     68#define MIPS_INTERRUPTS    8
     69#define HW_INTERRUPTS      (MIPS_INTERRUPTS - 3)
     70
     71typedef void (*int_handler_t)(unsigned int);
     72extern int_handler_t int_handler[];
     73
    5974extern void exception(istate_t *istate);
    6075extern void tlb_refill_entry(void);

  • kernel/arch/mips32/include/arch/mach/malta/malta.h

    r9259d20 r3e828ea  
    3939#include <arch/machine_func.h>
    4040#include <arch/mm/page.h>
     41#include <typedefs.h>
    4142
    42 #define MALTA_PCI_BASE          PA2KSEG1(0x18000000UL)
     43#define MALTA_PCI_PHYSBASE      0x18000000UL
     44
     45#define MALTA_PCI_BASE          PA2KSEG1(MALTA_PCI_PHYSBASE)
    4346#define MALTA_GT64120_BASE      PA2KSEG1(0x1be00000UL)
    4447
    … …  
    4649#define PIC1_BASE               (MALTA_PCI_BASE + 0xa0)
    4750
    48 #define TTY_BASE                (MALTA_PCI_BASE + 0x3f8)
    49 #define TTY_CPU_INT             2
     51#define ISA_IRQ_COUNT           16
     52
     53#define TTY_BASE                (MALTA_PCI_PHYSBASE + 0x3f8)
    5054#define TTY_ISA_IRQ             4
    5155
    52 #define GT64120_PCI0_INTACK     (MALTA_GT64120_BASE + 0xc34)
     56#define GT64120_PCI0_INTACK     ((ioport32_t *) (MALTA_GT64120_BASE + 0xc34))
    5357
    5458extern struct mips32_machine_ops malta_machine_ops;

  • kernel/arch/mips32/include/arch/machine_func.h

    r9259d20 r3e828ea  
    4343
    4444#include <typedefs.h>
     45#include <stdbool.h>
    4546
    4647struct mips32_machine_ops {

  • kernel/arch/mips32/include/arch/mm/as.h

    r9259d20 r3e828ea  
    3737
    3838#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
     39#define KERNEL_SEPARATE_PTL0_ARCH           0
    3940
    4041#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT32_C(0x80000000)

  • kernel/arch/mips32/meson.build

    r9259d20 r3e828ea  
    11#
    22# Copyright (c) 2005 Martin Decky
    3 # Copyright (c) 2007 Jakub Jermar
    43# All rights reserved.
    54#
    … …  
    2827#
    2928
    30 USPACE_PREFIX = ../..
    31 ROOT_PATH = $(USPACE_PREFIX)/..
    32 CONFIG_MAKEFILE = $(ROOT_PATH)/Makefile.config
     29arch_src += files(
     30        'src/start.S',
     31        'src/context.S',
     32        'src/mips32.c',
     33        'src/asm.S',
     34        'src/exception.c',
     35        'src/interrupt.c',
     36        'src/cache.c',
     37        'src/debugger.c',
     38        'src/cpu/cpu.c',
     39        'src/debug/stacktrace.c',
     40        'src/debug/stacktrace_asm.S',
     41        'src/mm/km.c',
     42        'src/mm/frame.c',
     43        'src/mm/page.c',
     44        'src/mm/tlb.c',
     45        'src/mm/as.c',
     46        'src/fpu_context.c',
     47        'src/smc.c',
     48        'src/smp/smp.c',
     49        'src/machine_func.c',
     50)
    3351
    34 include $(CONFIG_MAKEFILE)
     52if MACHINE == 'lmalta' or MACHINE == 'bmalta'
     53        arch_src += files('src/mach/malta/malta.c')
    3554
    36 ifeq ($(UARCH),ia64)
    37         # IA64 has a peculiar linker script with a fixed data segment address.
    38         # Because the loader is a separate nonrelocatable binary in the same
    39         # address space as the application, we provide a modified copy of
    40         # the default linker script to work around that.
    41         EXTRA_LDFLAGS = -T elf64_ia64_loader.x
    42 else
    43         # On all other architectures, we can simply move the text segment.
    44         EXTRA_LDFLAGS = -Wl,-Ttext-segment=0x70000000
     55elif MACHINE == 'msim'
     56        arch_src += files(
     57                'src/mach/msim/msim.c',
     58                'src/mach/msim/dorder.c',
     59        )
     60
    4561endif
    4662
    47 BINARY = loader
    48 STATIC_ONLY = y
    4963
    50 GENERIC_SOURCES = \
    51         main.c
     64_check_headers = [
     65        'include/arch/istate_struct.h',
     66        'include/arch/context_struct.h',
     67        'include/arch/fpu_context_struct.h',
     68]
    5269
    53 SOURCES = \
    54         $(GENERIC_SOURCES) \
    55         $(ARCH_SOURCES)
    56 
    57 include $(USPACE_PREFIX)/Makefile.common
     70foreach h : _check_headers
     71        arch_src += [ autocheck.process(h) ]
     72endforeach

  • kernel/arch/mips32/src/exception.c

    r9259d20 r3e828ea  
    4747#include <symtab.h>
    4848#include <log.h>
     49#include <arch/machine_func.h>
    4950
    5051static const char *exctable[] = {
    … …  
    174175
    175176        unsigned int i;
    176         for (i = 0; i < 8; i++) {
     177        for (i = 0; i < MIPS_INTERRUPTS; i++) {
    177178
    178179                /*
    … …  
    183184                 */
    184185                if (im & ip & (1 << i)) {
    185                         irq_t *irq = irq_dispatch_and_lock(i);
    186                         if (irq) {
    187                                 /*
    188                                  * The IRQ handler was found.
    189                                  */
    190                                 irq->handler(irq);
    191                                 if (irq->cir)
    192                                         irq->cir(irq->cir_arg, i);
    193                                 irq_spinlock_unlock(&irq->lock, false);
    194                         } else {
     186                        if (int_handler[i])
     187                                int_handler[i](i);
     188                        else {
    195189                                /*
    196190                                 * Spurious interrupt.

  • kernel/arch/mips32/src/interrupt.c

    r9259d20 r3e828ea  
    4141#include <ipc/sysipc.h>
    4242
    43 #define IRQ_COUNT   8
    44 #define TIMER_IRQ   7
    45 
    46 function virtual_timer_fnc = NULL;
    47 static irq_t timer_irq;
    48 
    4943// TODO: This is SMP unsafe!!!
    5044
    … …  
    5246static unsigned long nextcount;
    5347static unsigned long lastcount;
     48
     49/** Table of interrupt handlers. */
     50int_handler_t int_handler[MIPS_INTERRUPTS] = { };
    5451
    5552/** Disable interrupts.
    … …  
    113110}
    114111
    115 static irq_ownership_t timer_claim(irq_t *irq)
    116 {
    117         return IRQ_ACCEPT;
    118 }
    119 
    120 static void timer_irq_handler(irq_t *irq)
     112static void timer_interrupt_handler(unsigned int intr)
    121113{
    122114        if (cp0_count_read() < lastcount)
    … …  
    135127        cp0_compare_write(nextcount);
    136128
    137         /*
    138          * We are holding a lock which prevents preemption.
    139          * Release the lock, call clock() and reacquire the lock again.
    140          */
    141         irq_spinlock_unlock(&irq->lock, false);
    142129        clock();
    143         irq_spinlock_lock(&irq->lock, false);
    144 
    145         if (virtual_timer_fnc != NULL)
    146                 virtual_timer_fnc();
    147130}
    148131
    … …  
    150133void interrupt_init(void)
    151134{
    152         irq_init(IRQ_COUNT, IRQ_COUNT);
    153 
    154         irq_initialize(&timer_irq);
    155         timer_irq.inr = TIMER_IRQ;
    156         timer_irq.claim = timer_claim;
    157         timer_irq.handler = timer_irq_handler;
    158         irq_register(&timer_irq);
     135        int_handler[INT_TIMER] = timer_interrupt_handler;
    159136
    160137        timer_start();
    161         cp0_unmask_int(TIMER_IRQ);
     138        cp0_unmask_int(INT_TIMER);
    162139}
    163140

  • kernel/arch/mips32/src/mach/malta/malta.c

    r9259d20 r3e828ea  
    4242#include <genarch/srln/srln.h>
    4343#include <arch/interrupt.h>
     44#include <stdbool.h>
     45#include <byteorder.h>
     46#include <sysinfo/sysinfo.h>
     47#include <log.h>
    4448
    4549static void malta_init(void);
    … …  
    6872#endif
    6973
    70 #ifdef CONFIG_NS16550
    71 static void tty_clear_interrupt(void *arg, inr_t inr)
     74static void malta_isa_irq_handler(unsigned int i)
    7275{
    73         (void) pio_read_8((ioport8_t *) GT64120_PCI0_INTACK);
    74         pic_eoi();
     76        uint8_t isa_irq = host2uint32_t_le(pio_read_32(GT64120_PCI0_INTACK));
     77        if (i8259_is_spurious(isa_irq)) {
     78                i8259_handle_spurious(isa_irq);
     79#ifdef CONFIG_DEBUG
     80                log(LF_ARCH, LVL_DEBUG, "cpu%u: PIC spurious interrupt %u",
     81                    CPU->id, isa_irq);
     82                return;
     83#endif
     84        }
     85        irq_t *irq = irq_dispatch_and_lock(isa_irq);
     86        if (irq) {
     87                irq->handler(irq);
     88                irq_spinlock_unlock(&irq->lock, false);
     89        } else {
     90#ifdef CONFIG_DEBUG
     91                log(LF_ARCH, LVL_DEBUG, "cpu%u: unhandled IRQ (irq=%u)",
     92                    CPU->id, isa_irq);
     93#endif
     94        }
     95        i8259_eoi(isa_irq);
    7596}
    76 #endif
    7797
    7898void malta_init(void)
    7999{
    80         i8259_init((i8259_t *) PIC0_BASE, (i8259_t *) PIC1_BASE, 2, 0, 8);
     100        irq_init(ISA_IRQ_COUNT, ISA_IRQ_COUNT);
     101
     102        i8259_init((i8259_t *) PIC0_BASE, (i8259_t *) PIC1_BASE, 0);
     103        sysinfo_set_item_val("i8259", NULL, true);
     104
     105        int_handler[INT_HW0] = malta_isa_irq_handler;
     106        cp0_unmask_int(INT_HW0);
    81107
    82108#if (defined(CONFIG_NS16550) || defined(CONFIG_NS16550_OUT))
    … …  
    86112        outdev_t **tty_out_ptr = NULL;
    87113#endif
    88         tty_instance = ns16550_init((ioport8_t *) TTY_BASE, 0, TTY_CPU_INT,
    89             tty_clear_interrupt, NULL, tty_out_ptr);
     114        tty_instance = ns16550_init((ioport8_t *) TTY_BASE, 0, TTY_ISA_IRQ,
     115            NULL, NULL, tty_out_ptr);
    90116#endif
    91117}
    … …  
    120146                        indev_t *srln = srln_wire(srln_instance, sink);
    121147                        ns16550_wire(tty_instance, srln);
    122                         pic_enable_irqs(1 << TTY_ISA_IRQ);
    123                         cp0_unmask_int(TTY_CPU_INT);
     148                        i8259_enable_irqs(1 << TTY_ISA_IRQ);
    124149                }
    125150        }

  • kernel/arch/mips32/src/mach/msim/msim.c

    r9259d20 r3e828ea  
    4141#include <genarch/drivers/dsrln/dsrlnout.h>
    4242#include <genarch/srln/srln.h>
     43#include <stdbool.h>
    4344
    4445static void msim_init(void);
    … …  
    6061};
    6162
     63static void msim_irq_handler(unsigned int i)
     64{
     65        irq_t *irq = irq_dispatch_and_lock(i);
     66        if (irq) {
     67                irq->handler(irq);
     68                irq_spinlock_unlock(&irq->lock, false);
     69        } else {
     70#ifdef CONFIG_DEBUG
     71                log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious IRQ (irq=%u)",
     72                    CPU->id, i);
     73#endif
     74        }
     75}
     76
    6277void msim_init(void)
    6378{
     79        irq_init(HW_INTERRUPTS, HW_INTERRUPTS);
     80
     81        int_handler[INT_HW0] = msim_irq_handler;
     82        int_handler[INT_HW1] = msim_irq_handler;
     83        int_handler[INT_HW2] = msim_irq_handler;
     84        int_handler[INT_HW3] = msim_irq_handler;
     85        int_handler[INT_HW4] = msim_irq_handler;
     86
    6487        dorder_init();
    6588        cp0_unmask_int(MSIM_DDISK_IRQ);

  • kernel/arch/mips32/src/mips32.c

    r9259d20 r3e828ea  
    7171arch_ops_t *arch_ops = &mips32_ops;
    7272
    73 /*
    74  * Why the linker moves the variable 64K away in assembler
    75  * when not in .text section?
    76  */
    77 
    7873/* Stack pointer saved when entering user mode */
    79 uintptr_t supervisor_sp __attribute__((section(".text")));
     74// FIXME: This won't work with SMP unless thread creation is globally serialized.
     75uintptr_t supervisor_sp;
    8076
    8177size_t cpu_count = 0;
    … …  
    107103#endif
    108104
     105        str_cpy(bargs, CONFIG_BOOT_ARGUMENTS_BUFLEN, bootinfo->bootargs);
     106
    109107        /* Initialize machine_ops pointer. */
    110108        machine_ops_init();
    … …  
    169167        cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
    170168            cp0_status_um_bit | cp0_status_ie_enabled_bit));
    171         cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
    172         userspace_asm(((uintptr_t) kernel_uarg->uspace_stack +
    173             kernel_uarg->uspace_stack_size),
    174             (uintptr_t) kernel_uarg->uspace_uarg,
    175             (uintptr_t) kernel_uarg->uspace_entry);
     169        cp0_epc_write(kernel_uarg->uspace_entry);
     170        userspace_asm(kernel_uarg->uspace_stack +
     171            kernel_uarg->uspace_stack_size,
     172            kernel_uarg->uspace_uarg,
     173            kernel_uarg->uspace_entry);
    176174
    177175        while (true)
Note: See TracChangeset for help on using the changeset viewer.