Changeset 3bacee1 in mainline for uspace/lib/c/arch/arm32/include/libarch

Timestamp:

2018-04-12T16:27:17Z (7 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

3cf22f9

Parents:

76d0981d

git-author:

Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)

git-committer:

Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)

Message:

Make ccheck-fix again and commit more good files.

File:

• uspace/lib/c/arch/arm32/include/libarch/tls.h (modified) (2 diffs)

uspace/lib/c/arch/arm32/include/libarch/tls.h

@@ -63 +63 @@
         tls += sizeof(tcb_t) + ARM_TP_OFFSET;
         asm volatile (
-                "mov r9, %0"
-                :
-                : "r" (tls)
+            "mov r9, %0"
+            :
+            : "r" (tls)
         );
 }
@@ -79 +79 @@
         void *ret;
         asm volatile (
-                "mov %0, r9"
-                : "=r"(ret)
+            "mov %0, r9"
+            : "=r" (ret)
         );
         return (tcb_t *) (ret - ARM_TP_OFFSET - sizeof(tcb_t));