Changeset 3bacee1 in mainline for uspace/drv/nic
- Timestamp:
- 2018-04-12T16:27:17Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 3cf22f9
- Parents:
- 76d0981d
- git-author:
- Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
- Location:
- uspace/drv/nic
- Files:
-
- 8 edited
-
ar9271/ar9271.c (modified) (1 diff)
-
ar9271/hw.c (modified) (3 diffs)
-
ar9271/wmi.c (modified) (2 diffs)
-
e1k/e1k.c (modified) (1 diff)
-
ne2k/dp8390.c (modified) (5 diffs)
-
ne2k/ne2k.c (modified) (6 diffs)
-
rtl8139/driver.c (modified) (27 diffs)
-
rtl8169/driver.c (modified) (7 diffs)
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/nic/ar9271/ar9271.c
r76d0981d r3bacee1 408 408 ar9271_t *ar9271 = (ar9271_t *) ieee80211_get_specific(ieee80211_dev); 409 409 410 if (insert) {410 if (insert) { 411 411 assert(key_conf); 412 412 -
uspace/drv/nic/ar9271/hw.c
r76d0981d r3bacee1 158 158 159 159 uint16_t two_bytes = uint16_t_be2host(value); 160 ar9271_address.address[2 *i] = two_bytes >> 8;161 ar9271_address.address[2 *i+1] = two_bytes & 0xff;160 ar9271_address.address[2 * i] = two_bytes >> 8; 161 ar9271_address.address[2 * i + 1] = two_bytes & 0xff; 162 162 } 163 163 … … 272 272 uint32_t set_bit = 0x10000000; 273 273 274 switch (op_mode) {274 switch (op_mode) { 275 275 case IEEE80211_OPMODE_ADHOC: 276 276 set_bit |= AR9271_OPMODE_ADHOC_MASK; … … 545 545 wmi_reg_write(ar9271->htc_device, AR9271_PHY_ACTIVE, 0); 546 546 547 if (ar9271->starting_up) {547 if (ar9271->starting_up) { 548 548 wmi_reg_write(ar9271->htc_device, 549 549 AR9271_RESET_POWER_DOWN_CONTROL, -
uspace/drv/nic/ar9271/wmi.c
r76d0981d r3bacee1 232 232 233 233 if (command_buffer != NULL) 234 memcpy(buffer +header_size, command_buffer, command_length);234 memcpy(buffer + header_size, command_buffer, command_length); 235 235 236 236 /* Set up WMI header */ … … 283 283 ((void *) response_buffer + sizeof(htc_frame_header_t)); 284 284 cmd_id = uint16_t_be2host(wmi_hdr->command_id); 285 } while (cmd_id & WMI_MGMT_CMD_MASK);285 } while (cmd_id & WMI_MGMT_CMD_MASK); 286 286 287 287 if (clean_resp_buffer) -
uspace/drv/nic/e1k/e1k.c
r76d0981d r3bacee1 555 555 */ 556 556 static void e1000_write_receive_address(e1000_t *e1000, unsigned int position, 557 const nic_address_t * 557 const nic_address_t *address, bool set_av_bit) 558 558 { 559 559 uint8_t *mac0 = (uint8_t *) address->address; -
uspace/drv/nic/ne2k/dp8390.c
r76d0981d r3bacee1 439 439 440 440 static nic_frame_t *ne2k_receive_frame(nic_t *nic_data, uint8_t page, 441 441 size_t length) 442 442 { 443 443 ne2k_t *ne2k = (ne2k_t *) nic_get_specific(nic_data); … … 451 451 452 452 if (last >= ne2k->stop_page) { 453 size_t left = (ne2k->stop_page - page) * DP_PAGE 454 -sizeof(recv_header_t);453 size_t left = (ne2k->stop_page - page) * DP_PAGE - 454 sizeof(recv_header_t); 455 455 ne2k_download(ne2k, frame->data, page * DP_PAGE + sizeof(recv_header_t), 456 456 left); … … 509 509 uint8_t next = header.next; 510 510 511 if ((length < ETH_MIN_PACK_SIZE) 512 ||(length > ETH_MAX_PACK_SIZE_TAGGED)) {511 if ((length < ETH_MIN_PACK_SIZE) || 512 (length > ETH_MAX_PACK_SIZE_TAGGED)) { 513 513 next = current; 514 } else if ((header.next < ne2k->start_page) 515 ||(header.next > ne2k->stop_page)) {514 } else if ((header.next < ne2k->start_page) || 515 (header.next > ne2k->stop_page)) { 516 516 next = current; 517 517 } else if (header.status & RSR_FO) { … … 525 525 if (frames != NULL) { 526 526 nic_frame_t *frame = 527 527 ne2k_receive_frame(nic_data, boundary, length); 528 528 if (frame != NULL) { 529 529 nic_frame_list_append(frames, frame); … … 558 558 if (tsr & TSR_COL) { 559 559 nic_report_collisions(nic_data, 560 560 pio_read_8(ne2k->port + DP_NCR) & 15); 561 561 } 562 562 -
uspace/drv/nic/ne2k/ne2k.c
r76d0981d r3bacee1 162 162 163 163 return register_interrupt_handler(nic_get_ddf_dev(nic_data), 164 164 ne2k->irq, ne2k_interrupt_handler, &ne2k->code, handle); 165 165 } 166 166 … … 288 288 289 289 static errno_t ne2k_on_unicast_mode_change(nic_t *nic_data, 290 291 290 nic_unicast_mode_t new_mode, 291 const nic_address_t *address_list, size_t address_count) 292 292 { 293 293 ne2k_t *ne2k = (ne2k_t *) nic_get_specific(nic_data); … … 315 315 316 316 static errno_t ne2k_on_multicast_mode_change(nic_t *nic_data, 317 318 317 nic_multicast_mode_t new_mode, 318 const nic_address_t *address_list, size_t address_count) 319 319 { 320 320 ne2k_t *ne2k = (ne2k_t *) nic_get_specific(nic_data); … … 327 327 ne2k_set_accept_mcast(ne2k, true); 328 328 ne2k_set_mcast_hash(ne2k, 329 329 nic_mcast_hash(address_list, address_count)); 330 330 nic_report_hw_filtering(nic_data, -1, 0, -1); 331 331 return EOK; … … 341 341 342 342 static errno_t ne2k_on_broadcast_mode_change(nic_t *nic_data, 343 343 nic_broadcast_mode_t new_mode) 344 344 { 345 345 ne2k_t *ne2k = (ne2k_t *) nic_get_specific(nic_data); … … 367 367 nic_set_send_frame_handler(nic_data, ne2k_send); 368 368 nic_set_state_change_handlers(nic_data, 369 369 ne2k_on_activating, NULL, ne2k_on_stopping); 370 370 nic_set_filtering_change_handlers(nic_data, 371 372 371 ne2k_on_unicast_mode_change, ne2k_on_multicast_mode_change, 372 ne2k_on_broadcast_mode_change, NULL, NULL); 373 373 374 374 ne2k_t *ne2k = malloc(sizeof(ne2k_t)); -
uspace/drv/nic/rtl8139/driver.c
r76d0981d r3bacee1 95 95 #ifndef RXBUF_SIZE_FLAGS 96 96 /** Flags for receiver buffer - 16kB default */ 97 97 #define RXBUF_SIZE_FLAGS RTL8139_RXFLAGS_SIZE_16 98 98 #endif 99 99 100 100 #if (RXBUF_SIZE_FLAGS > RTL8139_RXFLAGS_SIZE_64) || (RXBUF_SIZE_FLAGS < 0) 101 101 #error Bad receiver buffer flags size flags 102 102 #endif 103 103 … … 152 152 static void rtl8139_hw_update_rcr(rtl8139_t *rtl8139) 153 153 { 154 uint32_t rcr = rtl8139->rcr_data.rcr_base | rtl8139->rcr_data.ucast_mask 155 | rtl8139->rcr_data.mcast_mask | rtl8139->rcr_data.bcast_mask156 |rtl8139->rcr_data.defect_mask |154 uint32_t rcr = rtl8139->rcr_data.rcr_base | rtl8139->rcr_data.ucast_mask | 155 rtl8139->rcr_data.mcast_mask | rtl8139->rcr_data.bcast_mask | 156 rtl8139->rcr_data.defect_mask | 157 157 (RXBUF_SIZE_FLAGS << RCR_RBLEN_SHIFT); 158 158 … … 199 199 200 200 async_sess_t *pci_sess = 201 201 ddf_dev_parent_sess_get(nic_get_ddf_dev(rtl8139->nic_data)); 202 202 203 203 if (bit_val) { … … 243 243 assert(addr); 244 244 245 const uint32_t *val1 = (const uint32_t *)addr->address;246 const uint16_t *val2 = (const uint16_t *)(addr->address + sizeof(uint32_t));245 const uint32_t *val1 = (const uint32_t *)addr->address; 246 const uint16_t *val2 = (const uint16_t *)(addr->address + sizeof(uint32_t)); 247 247 248 248 rtl8139_regs_unlock(rtl8139->io_port); … … 258 258 * @param bits_add The value to or 259 259 */ 260 inline static void rtl8139_hw_reg_add_8(rtl8139_t * 260 inline static void rtl8139_hw_reg_add_8(rtl8139_t *rtl8139, size_t reg_offset, 261 261 uint8_t bits_add) 262 262 { … … 272 272 * @param bits_add The mask of bits to remove 273 273 */ 274 inline static void rtl8139_hw_reg_rem_8(rtl8139_t * 274 inline static void rtl8139_hw_reg_rem_8(rtl8139_t *rtl8139, size_t reg_offset, 275 275 uint8_t bits_add) 276 276 { … … 288 288 nic_channel_mode_t duplex, nic_role_t); 289 289 290 static errno_t rtl8139_pause_get(ddf_fun_t *, nic_result_t*, nic_result_t*,290 static errno_t rtl8139_pause_get(ddf_fun_t *, nic_result_t *, nic_result_t *, 291 291 uint16_t *); 292 static errno_t rtl8139_pause_set(ddf_fun_t *, int, int, uint16_t);292 static errno_t rtl8139_pause_set(ddf_fun_t *, int, int, uint16_t); 293 293 294 294 static errno_t rtl8139_autoneg_enable(ddf_fun_t *fun, uint32_t advertisement); … … 303 303 304 304 static errno_t rtl8139_wol_virtue_add(nic_t *nic_data, 305 305 const nic_wol_virtue_t *virtue); 306 306 static void rtl8139_wol_virtue_rem(nic_t *nic_data, 307 307 const nic_wol_virtue_t *virtue); 308 308 309 309 static errno_t rtl8139_poll_mode_change(nic_t *nic_data, nic_poll_mode_t mode, … … 434 434 pio_write_8(io_base + CR, CR_RST); 435 435 memory_barrier(); 436 while (pio_read_8(io_base + CR) & CR_RST) {436 while (pio_read_8(io_base + CR) & CR_RST) { 437 437 async_usleep(1); 438 438 read_barrier(); … … 481 481 { 482 482 nic_frame_t *frame = nic_alloc_frame(nic_data, frame_size); 483 if (! 483 if (!frame) { 484 484 ddf_msg(LVL_ERROR, "Can not allocate frame for received frame."); 485 485 return NULL; … … 560 560 while (!rtl8139_hw_buffer_empty(rtl8139)) { 561 561 void *rx_ptr = rx_buffer + rx_offset % RxBUF_SIZE; 562 uint32_t frame_header = uint32_t_le2host( *((uint32_t*)rx_ptr));562 uint32_t frame_header = uint32_t_le2host(*((uint32_t *)rx_ptr)); 563 563 uint16_t size = frame_header >> 16; 564 564 uint16_t frame_size = size - RTL8139_CRC_SIZE; … … 580 580 } 581 581 if (size < RTL8139_RUNT_MAX_SIZE && !(rcs & RSR_RUNT)) { 582 ddf_msg(LVL_ERROR, "Receiver error -> receiver reset (%" PRIx16")", size);582 ddf_msg(LVL_ERROR, "Receiver error -> receiver reset (%" PRIx16 ")", size); 583 583 goto rx_err; 584 584 } … … 680 680 while (tx_used != tx_next) { 681 681 size_t desc_to_check = tx_used % TX_BUFF_COUNT; 682 void * tsd_to_check = rtl8139->io_port + TSD0683 +desc_to_check * sizeof(uint32_t);682 void *tsd_to_check = rtl8139->io_port + TSD0 + 683 desc_to_check * sizeof(uint32_t); 684 684 uint32_t tsd_value = pio_read_32(tsd_to_check); 685 685 … … 757 757 pio_write_32(rtl8139->io_port + TIMERINT, timer_val); 758 758 pio_write_32(rtl8139->io_port + TCTR, 0x0); 759 ddf_msg(LVL_DEBUG, "rtl8139 timer: %" PRIu32"\treceive: %d", timer_val, receive);759 ddf_msg(LVL_DEBUG, "rtl8139 timer: %" PRIu32 "\treceive: %d", timer_val, receive); 760 760 return receive; 761 761 } … … 784 784 receive = rtl8139_poll_interrupt(nic_data); 785 785 } 786 if (! 786 if (!receive) 787 787 return; 788 788 } … … 883 883 884 884 /* Write transmittion buffer addresses */ 885 for (i = 0; i < TX_BUFF_COUNT; ++i) {886 uint32_t addr = PTR2U32(rtl8139->tx_buff_phys + i *TX_BUFF_SIZE);887 pio_write_32(io_base + TSAD0 + 4 *i, addr);885 for (i = 0; i < TX_BUFF_COUNT; ++i) { 886 uint32_t addr = PTR2U32(rtl8139->tx_buff_phys + i * TX_BUFF_SIZE); 887 pio_write_32(io_base + TSAD0 + 4 * i, addr); 888 888 } 889 889 rtl8139->tx_next = 0; … … 988 988 nic_set_send_frame_handler(nic_data, rtl8139_send_frame); 989 989 nic_set_state_change_handlers(nic_data, 990 990 rtl8139_on_activated, NULL, rtl8139_on_stopped); 991 991 nic_set_filtering_change_handlers(nic_data, 992 993 992 rtl8139_unicast_set, rtl8139_multicast_set, rtl8139_broadcast_set, 993 NULL, NULL); 994 994 nic_set_wol_virtue_change_handlers(nic_data, 995 995 rtl8139_wol_virtue_add, rtl8139_wol_virtue_rem); 996 996 nic_set_poll_handlers(nic_data, rtl8139_poll_mode_change, rtl8139_poll); 997 997 … … 1347 1347 assert(addr); 1348 1348 1349 nic_t *nic_data = nic_get_from_ddf_fun((fun));1349 nic_t *nic_data = nic_get_from_ddf_fun((fun)); 1350 1350 rtl8139_t *rtl8139 = nic_get_specific(nic_data); 1351 1351 assert(rtl8139); … … 1354 1354 1355 1355 errno_t rc = nic_report_address(nic_data, addr); 1356 if ( 1356 if (rc != EOK) { 1357 1357 rtl8139_unlock_all(rtl8139); 1358 1358 return rc; … … 1817 1817 break; 1818 1818 case NIC_UNICAST_LIST: 1819 rtl8139->rcr_data.ucast_mask = RCR_ACCEPT_PHYS_MATCH 1820 |RCR_ACCEPT_ALL_PHYS;1819 rtl8139->rcr_data.ucast_mask = RCR_ACCEPT_PHYS_MATCH | 1820 RCR_ACCEPT_ALL_PHYS; 1821 1821 1822 1822 if (mcast_mode == NIC_MULTICAST_PROMISC) … … 1826 1826 break; 1827 1827 case NIC_UNICAST_PROMISC: 1828 rtl8139->rcr_data.ucast_mask = RCR_ACCEPT_PHYS_MATCH 1829 |RCR_ACCEPT_ALL_PHYS;1828 rtl8139->rcr_data.ucast_mask = RCR_ACCEPT_PHYS_MATCH | 1829 RCR_ACCEPT_ALL_PHYS; 1830 1830 1831 1831 if (mcast_mode == NIC_MULTICAST_PROMISC) … … 1981 1981 */ 1982 1982 static errno_t rtl8139_wol_virtue_add(nic_t *nic_data, 1983 1983 const nic_wol_virtue_t *virtue) 1984 1984 { 1985 1985 assert(nic_data); … … 1989 1989 assert(rtl8139); 1990 1990 1991 switch (virtue->type) {1991 switch (virtue->type) { 1992 1992 case NIC_WV_BROADCAST: 1993 1993 rtl8139_hw_reg_add_8(rtl8139, CONFIG5, CONFIG5_BROADCAST_WAKEUP); … … 2008 2008 return EINVAL; 2009 2009 } 2010 if (rtl8139->pm.active++ == 0)2010 if (rtl8139->pm.active++ == 0) 2011 2011 rtl8139_hw_pmen_set(rtl8139, 1); 2012 2012 return EOK; … … 2019 2019 */ 2020 2020 static void rtl8139_wol_virtue_rem(nic_t *nic_data, 2021 2021 const nic_wol_virtue_t *virtue) 2022 2022 { 2023 2023 assert(nic_data); … … 2027 2027 assert(rtl8139); 2028 2028 2029 switch (virtue->type) {2029 switch (virtue->type) { 2030 2030 case NIC_WV_BROADCAST: 2031 2031 rtl8139_hw_reg_rem_8(rtl8139, CONFIG5, CONFIG5_BROADCAST_WAKEUP); … … 2070 2070 fibril_mutex_lock(&rtl8139->rx_lock); 2071 2071 2072 switch (mode) {2072 switch (mode) { 2073 2073 case NIC_POLL_IMMEDIATE: 2074 2074 rtl8139->int_mask = RTL_DEFAULT_INTERRUPTS; -
uspace/drv/nic/rtl8169/driver.c
r76d0981d r3bacee1 313 313 nic_set_send_frame_handler(nic_data, rtl8169_send_frame); 314 314 nic_set_state_change_handlers(nic_data, 315 315 rtl8169_on_activated, NULL, rtl8169_on_stopped); 316 316 nic_set_filtering_change_handlers(nic_data, 317 318 317 rtl8169_unicast_set, rtl8169_multicast_set, rtl8169_broadcast_set, 318 NULL, NULL); 319 319 320 320 fibril_mutex_initialize(&rtl8169->rx_lock); … … 550 550 uint8_t phystatus = pio_read_8(rtl8169->regs + PHYSTATUS); 551 551 552 *duplex = phystatus & PHYSTATUS_FDX 553 ?NIC_CM_FULL_DUPLEX : NIC_CM_HALF_DUPLEX;552 *duplex = phystatus & PHYSTATUS_FDX ? 553 NIC_CM_FULL_DUPLEX : NIC_CM_HALF_DUPLEX; 554 554 555 555 if (phystatus & PHYSTATUS_10M) … … 575 575 return EINVAL; 576 576 577 577 if (duplex != NIC_CM_HALF_DUPLEX && duplex != NIC_CM_FULL_DUPLEX) 578 578 return EINVAL; 579 579 … … 939 939 940 940 pio_write_32(rtl8169->regs + RCR, rcr); 941 ddf_msg(LVL_DEBUG, " new RCR value: 0x%08x", rcr);941 ddf_msg(LVL_DEBUG, " new RCR value: 0x%08x", rcr); 942 942 943 943 return EOK; … … 1173 1173 uint32_t phyar; 1174 1174 1175 phyar = PHYAR_RW_READ 1176 |((addr & PHYAR_ADDR_MASK) << PHYAR_ADDR_SHIFT);1175 phyar = PHYAR_RW_READ | 1176 ((addr & PHYAR_ADDR_MASK) << PHYAR_ADDR_SHIFT); 1177 1177 1178 1178 pio_write_32(rtl8169->regs + PHYAR, phyar); … … 1190 1190 uint32_t phyar; 1191 1191 1192 phyar = PHYAR_RW_WRITE 1193 | ((addr & PHYAR_ADDR_MASK) << PHYAR_ADDR_SHIFT)1194 |(value & PHYAR_DATA_MASK);1192 phyar = PHYAR_RW_WRITE | 1193 ((addr & PHYAR_ADDR_MASK) << PHYAR_ADDR_SHIFT) | 1194 (value & PHYAR_DATA_MASK); 1195 1195 1196 1196 pio_write_32(rtl8169->regs + PHYAR, phyar); … … 1215 1215 return rc; 1216 1216 nic_driver_implement( 1217 1217 &rtl8169_driver_ops, &rtl8169_dev_ops, &rtl8169_nic_iface); 1218 1218 1219 1219 ddf_log_init(NAME);
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