Changeset 3bacee1 in mainline for uspace/drv/char/ns8250


Ignore:
Timestamp:
2018-04-12T16:27:17Z (8 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
3cf22f9
Parents:
76d0981d
git-author:
Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
git-committer:
Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
Message:

Make ccheck-fix again and commit more good files.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/char/ns8250/ns8250.c

    r76d0981d r3bacee1  
    388388
    389389        pio_write_8(&ns->regs->mcr, NS8250_MCR_ALL);
    390         if ((pio_read_8(&ns->regs->msr) & NS8250_MSR_SIGNALS)
    391             != NS8250_MSR_SIGNALS)
     390        if ((pio_read_8(&ns->regs->msr) & NS8250_MSR_SIGNALS) !=
     391            NS8250_MSR_SIGNALS)
    392392                res = false;
    393393
     
    450450                        ddf_msg(LVL_NOTE, "Device %s was assigned I/O address = "
    451451                            "0x%#" PRIxn ".", ddf_dev_get_name(ns->dev), ns->io_addr);
    452                         break;
     452                        break;
    453453
    454454                default:
     
    483483        /* Interrupt when data received. */
    484484        pio_write_8(&regs->ier, NS8250_IER_RXREADY | NS8250_IER_RXSTATUS);
    485         pio_write_8(&regs->mcr, NS8250_MCR_DTR | NS8250_MCR_RTS
    486             | NS8250_MCR_OUT2);
     485        pio_write_8(&regs->mcr, NS8250_MCR_DTR | NS8250_MCR_RTS |
     486            NS8250_MCR_OUT2);
    487487}
    488488
     
    714714         * reliability.
    715715         */
    716         pio_write_8(&ns->regs->iid, NS8250_FCR_FIFOENABLE
    717             | NS8250_FCR_RXFIFORESET | NS8250_FCR_TXFIFORESET
    718             | NS8250_FCR_RXTRIGGERLOW);
     716        pio_write_8(&ns->regs->iid, NS8250_FCR_FIFOENABLE |
     717            NS8250_FCR_RXFIFORESET | NS8250_FCR_TXFIFORESET |
     718            NS8250_FCR_RXTRIGGERLOW);
    719719        /*
    720720         * RTS/DSR set (Request to Send and Data Terminal Ready lines enabled),
    721721         * Aux Output2 set - needed for interrupts.
    722722         */
    723         pio_write_8(&ns->regs->mcr, NS8250_MCR_DTR | NS8250_MCR_RTS
    724             | NS8250_MCR_OUT2);
     723        pio_write_8(&ns->regs->mcr, NS8250_MCR_DTR | NS8250_MCR_RTS |
     724            NS8250_MCR_OUT2);
    725725}
    726726
     
    10141014 */
    10151015static void
    1016 ns8250_get_props(ddf_dev_t *dev, unsigned int *baud_rate, unsigned int *parity,
    1017     unsigned int *word_length, unsigned int* stop_bits)
     1016    ns8250_get_props(ddf_dev_t *dev, unsigned int *baud_rate, unsigned int *parity,
     1017    unsigned int *word_length, unsigned int *stop_bits)
    10181018{
    10191019        ns8250_t *data = dev_ns8250(dev);
     
    10851085
    10861086        case SERIAL_SET_COM_PROPS:
    1087                 baud_rate = IPC_GET_ARG1(*call);
     1087                baud_rate = IPC_GET_ARG1(*call);
    10881088                parity = IPC_GET_ARG2(*call);
    10891089                word_length = IPC_GET_ARG3(*call);
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