Changeset 3bacee1 in mainline for kernel/arch/mips32/include
- Timestamp:
- 2018-04-12T16:27:17Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 3cf22f9
- Parents:
- 76d0981d
- git-author:
- Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
- Location:
- kernel/arch/mips32/include/arch
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/mips32/include/arch/asm.h
r76d0981d r3bacee1 57 57 58 58 asm volatile ( 59 "and %[base], $29, %[mask]\n"60 : [base] "=r" (base)61 : [mask] "r" (~(STACK_SIZE - 1))59 "and %[base], $29, %[mask]\n" 60 : [base] "=r" (base) 61 : [mask] "r" (~(STACK_SIZE - 1)) 62 62 ); 63 63 -
kernel/arch/mips32/include/arch/mm/tlb.h
r76d0981d r3bacee1 82 82 unsigned : 2; /* zero */ 83 83 #endif 84 } __attribute__ ((packed));84 } __attribute__((packed)); 85 85 uint32_t value; 86 86 } entry_lo_t; … … 97 97 unsigned vpn2 : 19; 98 98 #endif 99 } __attribute__ ((packed));99 } __attribute__((packed)); 100 100 uint32_t value; 101 101 } entry_hi_t; … … 112 112 unsigned : 7; 113 113 #endif 114 } __attribute__ ((packed));114 } __attribute__((packed)); 115 115 uint32_t value; 116 116 } page_mask_t; … … 127 127 unsigned p : 1; 128 128 #endif 129 } __attribute__ ((packed));129 } __attribute__((packed)); 130 130 uint32_t value; 131 131 } tlb_index_t;
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