Changeset 3bacee1 in mainline for kernel/arch/mips32
- Timestamp:
- 2018-04-12T16:27:17Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 3cf22f9
- Parents:
- 76d0981d
- git-author:
- Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
- Location:
- kernel/arch/mips32
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/mips32/include/arch/asm.h
r76d0981d r3bacee1 57 57 58 58 asm volatile ( 59 60 61 59 "and %[base], $29, %[mask]\n" 60 : [base] "=r" (base) 61 : [mask] "r" (~(STACK_SIZE - 1)) 62 62 ); 63 63 -
kernel/arch/mips32/include/arch/mm/tlb.h
r76d0981d r3bacee1 82 82 unsigned : 2; /* zero */ 83 83 #endif 84 } __attribute__ 84 } __attribute__((packed)); 85 85 uint32_t value; 86 86 } entry_lo_t; … … 97 97 unsigned vpn2 : 19; 98 98 #endif 99 } __attribute__ 99 } __attribute__((packed)); 100 100 uint32_t value; 101 101 } entry_hi_t; … … 112 112 unsigned : 7; 113 113 #endif 114 } __attribute__ 114 } __attribute__((packed)); 115 115 uint32_t value; 116 116 } page_mask_t; … … 127 127 unsigned p : 1; 128 128 #endif 129 } __attribute__ 129 } __attribute__((packed)); 130 130 uint32_t value; 131 131 } tlb_index_t; -
kernel/arch/mips32/src/debugger.c
r76d0981d r3bacee1 102 102 uint32_t value; 103 103 } jmpinstr[] = { 104 { 0xf3ff0000, 0x41000000}, /* BCzF */105 { 0xf3ff0000, 0x41020000}, /* BCzFL */106 { 0xf3ff0000, 0x41010000}, /* BCzT */107 { 0xf3ff0000, 0x41030000}, /* BCzTL */108 { 0xfc000000, 0x10000000}, /* BEQ */109 { 0xfc000000, 0x50000000}, /* BEQL */110 { 0xfc1f0000, 0x04010000}, /* BEQL */111 { 0xfc1f0000, 0x04110000}, /* BGEZAL */112 { 0xfc1f0000, 0x04130000}, /* BGEZALL */113 { 0xfc1f0000, 0x04030000}, /* BGEZL */114 { 0xfc1f0000, 0x1c000000}, /* BGTZ */115 { 0xfc1f0000, 0x5c000000}, /* BGTZL */116 { 0xfc1f0000, 0x18000000}, /* BLEZ */117 { 0xfc1f0000, 0x58000000}, /* BLEZL */118 { 0xfc1f0000, 0x04000000}, /* BLTZ */119 { 0xfc1f0000, 0x04100000}, /* BLTZAL */120 { 0xfc1f0000, 0x04120000}, /* BLTZALL */121 { 0xfc1f0000, 0x04020000}, /* BLTZL */122 { 0xfc000000, 0x14000000}, /* BNE */123 { 0xfc000000, 0x54000000}, /* BNEL */124 { 0xfc000000, 0x08000000}, /* J */125 { 0xfc000000, 0x0c000000}, /* JAL */126 { 0xfc1f07ff, 0x00000009}, /* JALR */127 { 0, 0} /* end of table */104 { 0xf3ff0000, 0x41000000 }, /* BCzF */ 105 { 0xf3ff0000, 0x41020000 }, /* BCzFL */ 106 { 0xf3ff0000, 0x41010000 }, /* BCzT */ 107 { 0xf3ff0000, 0x41030000 }, /* BCzTL */ 108 { 0xfc000000, 0x10000000 }, /* BEQ */ 109 { 0xfc000000, 0x50000000 }, /* BEQL */ 110 { 0xfc1f0000, 0x04010000 }, /* BEQL */ 111 { 0xfc1f0000, 0x04110000 }, /* BGEZAL */ 112 { 0xfc1f0000, 0x04130000 }, /* BGEZALL */ 113 { 0xfc1f0000, 0x04030000 }, /* BGEZL */ 114 { 0xfc1f0000, 0x1c000000 }, /* BGTZ */ 115 { 0xfc1f0000, 0x5c000000 }, /* BGTZL */ 116 { 0xfc1f0000, 0x18000000 }, /* BLEZ */ 117 { 0xfc1f0000, 0x58000000 }, /* BLEZL */ 118 { 0xfc1f0000, 0x04000000 }, /* BLTZ */ 119 { 0xfc1f0000, 0x04100000 }, /* BLTZAL */ 120 { 0xfc1f0000, 0x04120000 }, /* BLTZALL */ 121 { 0xfc1f0000, 0x04020000 }, /* BLTZL */ 122 { 0xfc000000, 0x14000000 }, /* BNE */ 123 { 0xfc000000, 0x54000000 }, /* BNEL */ 124 { 0xfc000000, 0x08000000 }, /* J */ 125 { 0xfc000000, 0x0c000000 }, /* JAL */ 126 { 0xfc1f07ff, 0x00000009 }, /* JALR */ 127 { 0, 0 } /* end of table */ 128 128 }; 129 129 … … 273 273 breakpoints[i].counter, (void *) breakpoints[i].address, 274 274 ((breakpoints[i].flags & BKPOINT_INPROG) ? "true" : 275 "false"), ((breakpoints[i].flags & BKPOINT_ONESHOT) 276 ?"true" : "false"), ((breakpoints[i].flags &275 "false"), ((breakpoints[i].flags & BKPOINT_ONESHOT) ? 276 "true" : "false"), ((breakpoints[i].flags & 277 277 BKPOINT_FUNCCALL) ? "true" : "false"), symbol); 278 278 } … … 382 382 smc_coherence(cur->address); 383 383 384 if (! 384 if (!(cur->flags & BKPOINT_ONESHOT)) { 385 385 /* Set Breakpoint on next instruction */ 386 386 ((uint32_t *)cur->address)[1] = 0x0d; … … 422 422 } 423 423 424 if ((cur) && (cur->address == fireaddr) 425 &&((cur->flags & BKPOINT_INPROG))) {424 if ((cur) && (cur->address == fireaddr) && 425 ((cur->flags & BKPOINT_INPROG))) { 426 426 /* Remove one-shot breakpoint */ 427 427 if ((cur->flags & BKPOINT_ONESHOT)) -
kernel/arch/mips32/src/mach/msim/msim.c
r76d0981d r3bacee1 94 94 * interrupts. 95 95 */ 96 dsrlnin_instance_t *dsrlnin_instance 97 =dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ);96 dsrlnin_instance_t *dsrlnin_instance = 97 dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ); 98 98 if (dsrlnin_instance) { 99 99 srln_instance_t *srln_instance = srln_init(); -
kernel/arch/mips32/src/mm/km.c
r76d0981d r3bacee1 51 51 bool km_is_non_identity_arch(uintptr_t addr) 52 52 { 53 return iswithin(KM_MIPS32_KSSEG_START, KM_MIPS32_KSSEG_SIZE, addr, 1) 54 ||iswithin(KM_MIPS32_KSEG3_START, KM_MIPS32_KSEG3_SIZE, addr, 1);53 return iswithin(KM_MIPS32_KSSEG_START, KM_MIPS32_KSSEG_SIZE, addr, 1) || 54 iswithin(KM_MIPS32_KSEG3_START, KM_MIPS32_KSEG3_SIZE, addr, 1); 55 55 } 56 56
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