Changeset 3bacee1 in mainline for kernel/arch/arm32/include
- Timestamp:
- 2018-04-12T16:27:17Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 3cf22f9
- Parents:
- 76d0981d
- git-author:
- Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
- Location:
- kernel/arch/arm32/include/arch
- Files:
-
- 2 edited
-
asm.h (modified) (2 diffs)
-
security_ext.h (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/include/arch/asm.h
r76d0981d r3bacee1 59 59 { 60 60 #ifdef PROCESSOR_ARCH_armv7_a 61 asm volatile ( "wfe");61 asm volatile ("wfe"); 62 62 #elif defined(PROCESSOR_ARCH_armv6) | defined(PROCESSOR_arm926ej_s) | defined(PROCESSOR_arm920t) 63 63 WFI_write(0); … … 107 107 108 108 asm volatile ( 109 "and %[v], sp, %[size]\n"110 : [v] "=r" (v)111 : [size] "r" (~(STACK_SIZE - 1))109 "and %[v], sp, %[size]\n" 110 : [v] "=r" (v) 111 : [size] "r" (~(STACK_SIZE - 1)) 112 112 ); 113 113 -
kernel/arch/arm32/include/arch/security_ext.h
r76d0981d r3bacee1 77 77 static inline bool sec_ext_is_secure(void) 78 78 { 79 return sec_ext_is_implemented() 80 &&(sec_ext_is_monitor_mode() || !(SCR_read() & SCR_NS_FLAG));79 return sec_ext_is_implemented() && 80 (sec_ext_is_monitor_mode() || !(SCR_read() & SCR_NS_FLAG)); 81 81 } 82 82
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