Changeset 3bacee1 in mainline for kernel/arch/amd64
- Timestamp:
- 2018-04-12T16:27:17Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 3cf22f9
- Parents:
- 76d0981d
- git-author:
- Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
- Location:
- kernel/arch/amd64
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/include/arch/asm.h
r76d0981d r3bacee1 55 55 56 56 asm volatile ( 57 58 59 57 "andq %%rsp, %[v]\n" 58 : [v] "=r" (v) 59 : "0" (~((uint64_t) STACK_SIZE - 1)) 60 60 ); 61 61 … … 66 66 { 67 67 asm volatile ( 68 68 "hlt\n" 69 69 ); 70 70 } … … 74 74 while (true) { 75 75 asm volatile ( 76 76 "hlt\n" 77 77 ); 78 78 } … … 93 93 94 94 asm volatile ( 95 96 97 95 "inb %w[port], %b[val]\n" 96 : [val] "=a" (val) 97 : [port] "d" (port) 98 98 ); 99 99 … … 117 117 118 118 asm volatile ( 119 120 121 119 "inw %w[port], %w[val]\n" 120 : [val] "=a" (val) 121 : [port] "d" (port) 122 122 ); 123 123 … … 141 141 142 142 asm volatile ( 143 144 145 143 "inl %w[port], %[val]\n" 144 : [val] "=a" (val) 145 : [port] "d" (port) 146 146 ); 147 147 … … 163 163 if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { 164 164 asm volatile ( 165 166 165 "outb %b[val], %w[port]\n" 166 :: [val] "a" (val), [port] "d" (port) 167 167 ); 168 168 } else … … 182 182 if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { 183 183 asm volatile ( 184 185 184 "outw %w[val], %w[port]\n" 185 :: [val] "a" (val), [port] "d" (port) 186 186 ); 187 187 } else … … 201 201 if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { 202 202 asm volatile ( 203 204 203 "outl %[val], %w[port]\n" 204 :: [val] "a" (val), [port] "d" (port) 205 205 ); 206 206 } else … … 213 213 214 214 asm volatile ( 215 216 217 215 "pushfq\n" 216 "popq %[v]\n" 217 : [v] "=r" (rflags) 218 218 ); 219 219 … … 224 224 { 225 225 asm volatile ( 226 227 228 226 "pushq %[v]\n" 227 "popfq\n" 228 :: [v] "r" (rflags) 229 229 ); 230 230 } … … 300 300 { 301 301 asm volatile ( 302 303 304 305 302 "wrmsr\n" 303 :: "c" (msr), 304 "a" ((uint32_t) (value)), 305 "d" ((uint32_t) (value >> 32)) 306 306 ); 307 307 } … … 312 312 313 313 asm volatile ( 314 315 316 314 "rdmsr\n" 315 : "=a" (ax), "=d" (dx) 316 : "c" (msr) 317 317 ); 318 318 … … 328 328 { 329 329 asm volatile ( 330 331 330 "invlpg %[addr]\n" 331 :: [addr] "m" (*((sysarg_t *) addr)) 332 332 ); 333 333 } … … 341 341 { 342 342 asm volatile ( 343 344 343 "lgdtq %[gdtr_reg]\n" 344 :: [gdtr_reg] "m" (*gdtr_reg) 345 345 ); 346 346 } … … 354 354 { 355 355 asm volatile ( 356 357 356 "sgdtq %[gdtr_reg]\n" 357 :: [gdtr_reg] "m" (*gdtr_reg) 358 358 ); 359 359 } … … 367 367 { 368 368 asm volatile ( 369 370 369 "lidtq %[idtr_reg]\n" 370 :: [idtr_reg] "m" (*idtr_reg)); 371 371 } 372 372 … … 379 379 { 380 380 asm volatile ( 381 382 381 "ltr %[sel]" 382 :: [sel] "r" (sel) 383 383 ); 384 384 } -
kernel/arch/amd64/src/amd64.c
r76d0981d r3bacee1 215 215 outdev_t **ns16550_out_ptr = NULL; 216 216 #endif 217 ns16550_instance_t *ns16550_instance 218 =ns16550_init(NS16550_BASE, 0, IRQ_NS16550, NULL, NULL,217 ns16550_instance_t *ns16550_instance = 218 ns16550_init(NS16550_BASE, 0, IRQ_NS16550, NULL, NULL, 219 219 ns16550_out_ptr); 220 220 if (ns16550_instance) {
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