Changeset 3b05862f in mainline for arch/ia32/include

Timestamp:

2006-03-15T16:12:37Z (20 years ago)

Author:

Jakub Vana <jakub.vana@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

2f7342d

Parents:

b629483

Message:

ia32 MMX and SSEx support

Location:

arch/ia32/include

Files:

• cpu.h (modified) (1 diff)
• cpuid.h (modified) (1 diff)
• fpu_context.h (modified) (1 diff)
• interrupt.h (modified) (1 diff)

arch/ia32/include/cpu.h

@@ -42 +42 @@
 };
 
+
+#define CR4_OSFXSR_MASK (1<<9)
+
 #endif

arch/ia32/include/cpuid.h

@@ -38 +38 @@
         __u32 cpuid_edx;
 } __attribute__ ((packed));
+
+struct __cpuid_extended_feature_info {
+        unsigned sse3 :  1;
+        unsigned      : 31;
+} __attribute__ ((packed));
+
+typedef union cpuid_extended_feature_info 
+{
+        struct __cpuid_extended_feature_info bits;
+        __u32                                word;
+}cpuid_extended_feature_info;
+
+
+struct __cpuid_feature_info {
+        unsigned                        : 23;
+        unsigned mmx  :  1;
+        unsigned fxsr :  1;
+        unsigned sse  :  1;
+        unsigned sse2 :  1;
+        unsigned      :  5;
+} __attribute__ ((packed));
+
+typedef union cpuid_feature_info 
+{
+        struct __cpuid_feature_info bits;
+        __u32                word       ;
+}cpuid_feature_info;
+
 
 static inline __u32 has_cpuid(void)

arch/ia32/include/fpu_context.h

@@ -35 +35 @@
 #define FPU_CONTEXT_ALIGN 16
 
+void fpu_fxsr(void);
+void fpu_fsr(void);
+
+
 struct fpu_context {
         /* TODO: We need malloc that aligns structures on 16-byte boundary */

arch/ia32/include/interrupt.h

@@ -85 +85 @@
 extern void nm_fault(int n, istate_t *istate);
 extern void ss_fault(int n, istate_t *istate);
+extern void simd_fp_exception(int n, istate_t *istate);
 extern void page_fault(int n, istate_t *istate);
 extern void syscall(int n, istate_t *istate);