Changeset 387416b in mainline for kernel/arch


Ignore:
Timestamp:
2009-12-12T10:11:35Z (16 years ago)
Author:
Pavel Rimsky <pavel@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
99de22b
Parents:
58d5803d (diff), 1e4cada (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Synchronizing with head.

Location:
kernel/arch
Files:
2 added
17 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/amd64/src/amd64.c

    r58d5803d r387416b  
    6767#include <ddi/irq.h>
    6868#include <sysinfo/sysinfo.h>
     69#include <memstr.h>
    6970
    7071/** Disable I/O on non-privileged levels
  • kernel/arch/arm32/Makefile.inc

    r58d5803d r387416b  
    6161        arch/$(KARCH)/src/mm/page.c \
    6262        arch/$(KARCH)/src/mm/tlb.c \
    63         arch/$(KARCH)/src/mm/page_fault.c
     63        arch/$(KARCH)/src/mm/page_fault.c \
     64        arch/$(KARCH)/src/ras.c
    6465
    6566ifeq ($(MACHINE),testarm)
  • kernel/arch/arm32/include/atomic.h

    r58d5803d r387416b  
    3737#define KERN_arm32_ATOMIC_H_
    3838
     39#include <arch/asm.h>
     40
    3941/** Atomic addition.
    4042 *
     
    4749static inline long atomic_add(atomic_t *val, int i)
    4850{
    49         int ret;
    50         volatile long *mem = &(val->count);
    51        
    52         asm volatile (
    53                 "1:\n"
    54                         "ldr r2, [%[mem]]\n"
    55                         "add r3, r2, %[i]\n"
    56                         "str r3, %[ret]\n"
    57                         "swp r3, r3, [%[mem]]\n"
    58                         "cmp r3, r2\n"
    59                         "bne 1b\n"
    60                 : [ret] "=m" (ret)
    61                 : [mem] "r" (mem), [i] "r" (i)
    62                 : "r3", "r2"
    63         );
     51        long ret;
     52
     53        /*
     54         * This implementation is for UP pre-ARMv6 systems where we do not have
     55         * the LDREX and STREX instructions.
     56         */
     57        ipl_t ipl = interrupts_disable();
     58        val->count += i;
     59        ret = val->count;
     60        interrupts_restore(ipl);
    6461       
    6562        return ret;
  • kernel/arch/arm32/include/mm/as.h

    r58d5803d r387416b  
    5454#define as_destructor_arch(as)                  (as != as)
    5555#define as_create_arch(as, flags)               (as != as)
    56 #define as_install_arch(as)
    5756#define as_deinstall_arch(as)
    5857#define as_invalidate_translation_cache(as, page, cnt)
  • kernel/arch/arm32/src/arm32.c

    r58d5803d r387416b  
    4848#include <macros.h>
    4949#include <string.h>
     50#include <arch/ras.h>
    5051
    5152#ifdef MACHINE_testarm
     
    8889        exception_init();
    8990        interrupt_init();
     91
     92        /* Initialize Restartable Atomic Sequences support. */
     93        ras_init();
    9094       
    9195        machine_output_init();
     
    136140        uint8_t *stck;
    137141       
    138         tlb_invalidate_all();
    139142        stck = &THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA];
    140143        supervisor_sp = (uintptr_t) stck;
  • kernel/arch/arm32/src/exc_handler.S

    r58d5803d r387416b  
    148148        mov r0, #0
    149149        mov r1, r13
    150         bl exc_dispatch
     150        bl ras_check
    151151        LOAD_REGS_FROM_STACK
    152152
     
    156156        mov r0, #5
    157157        mov r1, r13
    158         bl exc_dispatch
     158        bl ras_check
    159159        LOAD_REGS_FROM_STACK
    160160
     
    164164        mov r0, #6
    165165        mov r1, r13
    166         bl exc_dispatch
     166        bl ras_check
    167167        LOAD_REGS_FROM_STACK
    168168
     
    171171        mov r0, #1
    172172        mov r1, r13
    173         bl exc_dispatch
     173        bl ras_check
    174174        LOAD_REGS_FROM_STACK
    175175
     
    179179        mov r0, #3
    180180        mov r1, r13
    181         bl exc_dispatch
     181        bl ras_check
    182182        LOAD_REGS_FROM_STACK
    183183
     
    187187        mov r0, #4
    188188        mov r1, r13
    189         bl exc_dispatch
     189        bl ras_check
    190190        LOAD_REGS_FROM_STACK
    191191
     
    195195        mov r0, #2
    196196        mov r1, r13
    197         bl exc_dispatch
     197        bl ras_check
    198198        LOAD_REGS_FROM_STACK
    199199
  • kernel/arch/arm32/src/mm/as.c

    r58d5803d r387416b  
    3636#include <arch/mm/as.h>
    3737#include <genarch/mm/as_pt.h>
     38#include <genarch/mm/page_pt.h>
    3839#include <genarch/mm/asid_fifo.h>
    3940#include <mm/as.h>
     41#include <mm/tlb.h>
    4042#include <arch.h>
    4143
     
    4951}
    5052
     53void as_install_arch(as_t *as)
     54{
     55        tlb_invalidate_all();
     56}
     57
    5158/** @}
    5259 */
  • kernel/arch/arm32/src/userspace.c

    r58d5803d r387416b  
    3535
    3636#include <userspace.h>
     37#include <arch/ras.h>
    3738
    3839/** Struct for holding all general purpose registers.
     
    7475        ustate.r1 = 0;
    7576
     77        /* pass the RAS page address in %r2 */
     78        ustate.r2 = (uintptr_t) ras_page;
     79
    7680        /* clear other registers */
    77         ustate.r2 = ustate.r3  = ustate.r4  = ustate.r5 =
    78             ustate.r6  = ustate.r7  = ustate.r8  = ustate.r9 = ustate.r10 =
    79             ustate.r11 = ustate.r12 = ustate.lr = 0;
     81        ustate.r3  = ustate.r4  = ustate.r5 = ustate.r6 = ustate.r7 =
     82            ustate.r8 = ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 =
     83            ustate.lr = 0;
    8084
    8185        /* set user stack */
  • kernel/arch/ia32/src/ia32.c

    r58d5803d r387416b  
    6868#include <sysinfo/sysinfo.h>
    6969#include <arch/boot/boot.h>
     70#include <memstr.h>
    7071
    7172#ifdef CONFIG_SMP
  • kernel/arch/ia64/src/cpu/cpu.c

    r58d5803d r387416b  
    3737#include <arch/register.h>
    3838#include <print.h>
     39#include <memstr.h>
    3940
    4041void cpu_arch_init(void)
  • kernel/arch/ppc32/src/mm/as.c

    r58d5803d r387416b  
    3535#include <arch/mm/as.h>
    3636#include <genarch/mm/as_pt.h>
     37#include <genarch/mm/page_pt.h>
    3738#include <genarch/mm/asid_fifo.h>
    3839#include <arch.h>
  • kernel/arch/ppc32/src/mm/tlb.c

    r58d5803d r387416b  
    3838#include <interrupt.h>
    3939#include <mm/as.h>
     40#include <mm/page.h>
    4041#include <arch.h>
    4142#include <print.h>
  • kernel/arch/ppc32/src/ppc32.c

    r58d5803d r387416b  
    4444#include <genarch/ofw/pci.h>
    4545#include <userspace.h>
     46#include <mm/page.h>
    4647#include <proc/uarg.h>
    4748#include <console/console.h>
  • kernel/arch/sparc64/src/drivers/kbd.c

    r58d5803d r387416b  
    3939#include <console/console.h>
    4040#include <ddi/irq.h>
     41#include <mm/page.h>
    4142#include <arch/mm/page.h>
    4243#include <arch/types.h>
  • kernel/arch/sparc64/src/mm/page.c

    r58d5803d r387416b  
    3333 */
    3434
     35#include <mm/page.h>
    3536#include <arch/mm/page.h>
    3637#include <arch/mm/tlb.h>
  • kernel/arch/sparc64/src/mm/sun4u/tlb.c

    r58d5803d r387416b  
    5050#include <panic.h>
    5151#include <arch/asm.h>
     52#include <genarch/mm/page_ht.h>
    5253
    5354#ifdef CONFIG_TSB
  • kernel/arch/sparc64/src/mm/sun4v/tlb.c

    r58d5803d r387416b  
    5454#include <arch/cpu.h>
    5555#include <arch/mm/pagesize.h>
     56#include <genarch/mm/page_ht.h>
    5657
    5758#ifdef CONFIG_TSB
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