Changeset 3194d83 in mainline for kernel/arch/amd64/src
- Timestamp:
- 2012-11-29T12:05:08Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 69c1995
- Parents:
- e1c6d5df
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/src/fpu_context.c
re1c6d5df r3194d83 57 57 { 58 58 /* TODO: Zero all SSE, MMX etc. registers */ 59 /* Default value of SCR register is 0x1f80, 60 * it masks all FPU exceptions*/ 59 61 asm volatile ( 60 62 "fninit\n"
Note:
See TracChangeset
for help on using the changeset viewer.