Changeset 2f23341 in mainline for kernel/arch/ia64/include

Timestamp:

2011-05-19T20:04:09Z (14 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

326bf65

Parents:

2a922c8

Message:

Fix ia64 regression introduced in mainline,966.
The ia64 stack is actually two stacks in one:

• the regular memory stack, which is now STACK_SIZE / 2 bytes long
• and the equally sized RSE stack

Note that ia64 is now the only architecture which effectively uses
only one memory frame for its memory stack.

Location:

kernel/arch/ia64/include

Files:

• asm.h (modified) (2 diffs)
• context.h (modified) (1 diff)

kernel/arch/ia64/include/asm.h

@@ -122 +122 @@
 }
 
-/** Return base address of current stack
- *
- * Return the base address of the current stack.
- * The stack is assumed to be STACK_SIZE long.
- * The stack must start on page boundary.
- *
+/** Return base address of current memory stack.
+ *
+ * The memory stack is assumed to be STACK_SIZE / 2 long. Note that there is
+ * also the RSE stack, which takes up the upper half of STACK_SIZE.
+ * The memory stack must start on page boundary.
  */
 NO_TRACE static inline uintptr_t get_stack_base(void)
 {
         uint64_t value;
-        
-        /*
-         * I'm not sure why but this code inlines badly
-         * in scheduler, resulting in THE shifting about
-         * 16B and causing kernel panic.
-         *
-         * asm volatile (
-         *     "and %[value] = %[mask], r12"
-         *     : [value] "=r" (v)
-         *     : [mask] "r" (~(STACK_SIZE - 1))
-         * );
-         * return v;
-         *
-         * The following code has the same semantics but
-         * inlines correctly.
-         *
-         */
         
         asm volatile (
@@ -155 +137 @@
         );
         
-        return (value & (~(STACK_SIZE - 1)));
+        return (value & (~(STACK_SIZE / 2 - 1)));
 }
 

kernel/arch/ia64/include/context.h

@@ -49 +49 @@
 #define SP_DELTA        (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
 
-/* RSE stack starts at the bottom of memory stack. */
+/* RSE stack starts at the bottom of memory stack, hence the division by 2. */
 #define context_set(c, _pc, stack, size)                                                                \
         do {                                                                                            \
                 (c)->pc = (uintptr_t) _pc;                                                              \
-                (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size), REGISTER_STACK_ALIGNMENT);            \
+                (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size / 2), REGISTER_STACK_ALIGNMENT);        \
                 (c)->ar_pfs &= PFM_MASK;                                                                \
-                (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - SP_DELTA;           \
+                (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size / 2), STACK_ALIGNMENT) - SP_DELTA;       \
         } while (0);