Changeset 2ccd275 in mainline for arch/ia64/src


Ignore:
Timestamp:
2005-11-09T14:23:05Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
802bb95
Parents:
b183865e
Message:

Changes in build system.
For .S targets, always do -DASM.
Remove unnecessary #define ASM from various *.S files.
At the end of build, generate disassembler dump for kernel.raw.

ia64 work.
Better General Exception handler.

Location:
arch/ia64/src
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • arch/ia64/src/interrupt.c

    rb183865e r2ccd275  
    106106
    107107static char *vector_to_string(__u16 vector);
    108 static void dump_stack(struct exception_regdump *pstate);
     108static void dump_interrupted_context(struct exception_regdump *pstate);
    109109
    110110char *vector_to_string(__u16 vector)
     
    118118}
    119119
    120 void dump_stack(struct exception_regdump *pstate)
     120void dump_interrupted_context(struct exception_regdump *pstate)
    121121{
    122122        char *ifa, *iipa, *iip;
     
    127127
    128128        putchar('\n');
     129        printf("Interrupted context dump:\n");
    129130        printf("ar.bsp=%P\tar.bspstore=%P\n", pstate->ar_bsp, pstate->ar_bspstore);
    130131        printf("ar.rnat=%Q\tar.rsc=%Q\n", pstate->ar_rnat, pstate->ar_rsc);
    131132        printf("ar.ifs=%Q\tar.pfs=%Q\n", pstate->ar_ifs, pstate->ar_pfs);
    132         printf("cr.isr=%Q\tcr.ips=%Q\t\n", pstate->cr_isr, pstate->cr_ips);
     133        printf("cr.isr=%Q\tcr.ips=%Q\t\n", pstate->cr_isr.value, pstate->cr_ips);
    133134       
    134         printf("cr.iip=%Q (%s)\n", pstate->cr_iip, iip ? iip : "?");
    135         printf("cr.iipa=%Q (%s)\n", pstate->cr_iipa, iipa ? iipa : "?");
    136         printf("cr.ifa=%Q (%s)\n", pstate->cr_ifa, ifa ? ifa : "?");
     135        printf("cr.iip=%Q, #%d\t(%s)\n", pstate->cr_iip, pstate->cr_isr.ei ,iip ? iip : "?");
     136        printf("cr.iipa=%Q\t(%s)\n", pstate->cr_iipa, iipa ? iipa : "?");
     137        printf("cr.ifa=%Q\t(%s)\n", pstate->cr_ifa, ifa ? ifa : "?");
    137138}
    138139
    139140void general_exception(__u64 vector, struct exception_regdump *pstate)
    140141{
    141         dump_stack(pstate);
    142         panic("General Exception\n");
     142        char *desc = "";
     143
     144        dump_interrupted_context(pstate);
     145
     146        switch (pstate->cr_isr.ge_code) {
     147            case GE_ILLEGALOP:
     148                desc = "Illegal Operation fault";
     149                break;
     150            case GE_PRIVOP:
     151                desc = "Privileged Operation fault";
     152                break;
     153            case GE_PRIVREG:
     154                desc = "Privileged Register fault";
     155                break;
     156            case GE_RESREGFLD:
     157                desc = "Reserved Register/Field fault";
     158                break;
     159            case GE_DISBLDISTRAN:
     160                desc = "Disabled Instruction Set Transition fault";
     161                break;
     162            case GE_ILLEGALDEP:
     163                desc = "Illegal Dependency fault";
     164                break;
     165            default:
     166                desc = "unknown";
     167                break;
     168        }
     169
     170        panic("General Exception (%s)\n", desc);
    143171}
    144172
    145173void break_instruction(__u64 vector, struct exception_regdump *pstate)
    146174{
    147         dump_stack(pstate);
     175        dump_interrupted_context(pstate);
    148176        panic("Break Instruction\n");
    149177}
     
    151179void universal_handler(__u64 vector, struct exception_regdump *pstate)
    152180{
    153         dump_stack(pstate);
     181        dump_interrupted_context(pstate);
    154182        panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));
    155183}
  • arch/ia64/src/ivt.S

    rb183865e r2ccd275  
    11#
    22# Copyright (C) 2005 Jakub Vana
     3# Copyright (C) 2005 Jakub Jermar
    34# All rights reserved.
    45#
     
    2829
    2930#include <arch/stack.h>
     31#include <arch/register.h>
    3032
    3133#define STACK_ITEMS             12
     
    190192
    191193    /* 6. switch to bank 1 and reenable PSR.ic */
    192         ssm 0x2000
     194        ssm PSR_IC_MASK
    193195        bsw.1 ;;
    194196        srlz.d
     
    308310       
    309311    /* 15. disable PSR.ic and switch to bank 0 */
    310         rsm 0x2000
     312        rsm PSR_IC_MASK
    311313        bsw.0 ;;
    312314        srlz.d
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