Changeset 2ccd275 in mainline for arch/ia64/src
- Timestamp:
- 2005-11-09T14:23:05Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 802bb95
- Parents:
- b183865e
- Location:
- arch/ia64/src
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/src/interrupt.c
rb183865e r2ccd275 106 106 107 107 static char *vector_to_string(__u16 vector); 108 static void dump_ stack(struct exception_regdump *pstate);108 static void dump_interrupted_context(struct exception_regdump *pstate); 109 109 110 110 char *vector_to_string(__u16 vector) … … 118 118 } 119 119 120 void dump_ stack(struct exception_regdump *pstate)120 void dump_interrupted_context(struct exception_regdump *pstate) 121 121 { 122 122 char *ifa, *iipa, *iip; … … 127 127 128 128 putchar('\n'); 129 printf("Interrupted context dump:\n"); 129 130 printf("ar.bsp=%P\tar.bspstore=%P\n", pstate->ar_bsp, pstate->ar_bspstore); 130 131 printf("ar.rnat=%Q\tar.rsc=%Q\n", pstate->ar_rnat, pstate->ar_rsc); 131 132 printf("ar.ifs=%Q\tar.pfs=%Q\n", pstate->ar_ifs, pstate->ar_pfs); 132 printf("cr.isr=%Q\tcr.ips=%Q\t\n", pstate->cr_isr , pstate->cr_ips);133 printf("cr.isr=%Q\tcr.ips=%Q\t\n", pstate->cr_isr.value, pstate->cr_ips); 133 134 134 printf("cr.iip=%Q (%s)\n", pstate->cr_iip,iip ? iip : "?");135 printf("cr.iipa=%Q 136 printf("cr.ifa=%Q 135 printf("cr.iip=%Q, #%d\t(%s)\n", pstate->cr_iip, pstate->cr_isr.ei ,iip ? iip : "?"); 136 printf("cr.iipa=%Q\t(%s)\n", pstate->cr_iipa, iipa ? iipa : "?"); 137 printf("cr.ifa=%Q\t(%s)\n", pstate->cr_ifa, ifa ? ifa : "?"); 137 138 } 138 139 139 140 void general_exception(__u64 vector, struct exception_regdump *pstate) 140 141 { 141 dump_stack(pstate); 142 panic("General Exception\n"); 142 char *desc = ""; 143 144 dump_interrupted_context(pstate); 145 146 switch (pstate->cr_isr.ge_code) { 147 case GE_ILLEGALOP: 148 desc = "Illegal Operation fault"; 149 break; 150 case GE_PRIVOP: 151 desc = "Privileged Operation fault"; 152 break; 153 case GE_PRIVREG: 154 desc = "Privileged Register fault"; 155 break; 156 case GE_RESREGFLD: 157 desc = "Reserved Register/Field fault"; 158 break; 159 case GE_DISBLDISTRAN: 160 desc = "Disabled Instruction Set Transition fault"; 161 break; 162 case GE_ILLEGALDEP: 163 desc = "Illegal Dependency fault"; 164 break; 165 default: 166 desc = "unknown"; 167 break; 168 } 169 170 panic("General Exception (%s)\n", desc); 143 171 } 144 172 145 173 void break_instruction(__u64 vector, struct exception_regdump *pstate) 146 174 { 147 dump_ stack(pstate);175 dump_interrupted_context(pstate); 148 176 panic("Break Instruction\n"); 149 177 } … … 151 179 void universal_handler(__u64 vector, struct exception_regdump *pstate) 152 180 { 153 dump_ stack(pstate);181 dump_interrupted_context(pstate); 154 182 panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector)); 155 183 } -
arch/ia64/src/ivt.S
rb183865e r2ccd275 1 1 # 2 2 # Copyright (C) 2005 Jakub Vana 3 # Copyright (C) 2005 Jakub Jermar 3 4 # All rights reserved. 4 5 # … … 28 29 29 30 #include <arch/stack.h> 31 #include <arch/register.h> 30 32 31 33 #define STACK_ITEMS 12 … … 190 192 191 193 /* 6. switch to bank 1 and reenable PSR.ic */ 192 ssm 0x2000194 ssm PSR_IC_MASK 193 195 bsw.1 ;; 194 196 srlz.d … … 308 310 309 311 /* 15. disable PSR.ic and switch to bank 0 */ 310 rsm 0x2000312 rsm PSR_IC_MASK 311 313 bsw.0 ;; 312 314 srlz.d
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