Changeset 2ccd275 in mainline for arch/ia64/include

Timestamp:

2005-11-09T14:23:05Z (20 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

802bb95

Parents:

b183865e

Message:

Changes in build system.
For .S targets, always do -DASM.
Remove unnecessary #define ASM from various *.S files.
At the end of build, generate disassembler dump for kernel.raw.

ia64 work.
Better General Exception handler.

Location:

arch/ia64/include

Files:

• asm.h (modified) (1 diff)
• interrupt.h (modified) (2 diffs)
• register.h (modified) (3 diffs)

arch/ia64/include/asm.h

@@ -221 +221 @@
 static inline void interrupts_restore(ipl_t ipl)
 {
-        __asm__ volatile (
-                "mov psr.l = %0\n"
-                ";;\n"
-                "srlz.d\n"
-                : : "r" ((__u64) ipl)
-        );
+        if (ipl & PSR_I_MASK)
+                (void) interrupts_enable();
+        else
+                (void) interrupts_disable();
 }
 

arch/ia64/include/interrupt.h

@@ -31 +31 @@
 
 #include <arch/types.h>
+#include <arch/register.h>
 
-/** External interrupt vectors. */
+/** External Interrupt vectors. */
 #define INTERRUPT_TIMER         0
 #define INTERRUPT_SPURIOUS      15
+
+/** General Exception codes. */
+#define GE_ILLEGALOP            0
+#define GE_PRIVOP               1
+#define GE_PRIVREG              2
+#define GE_RESREGFLD            3
+#define GE_DISBLDISTRAN         4
+#define GE_ILLEGALDEP           8
 
 #define EOI     0               /**< The actual value doesn't matter. */
@@ -46 +55 @@
         __u64 ar_rsc;
         __address cr_ifa;
-        __u64 cr_isr;
+        cr_isr_t cr_isr;
         __address cr_iipa;
         __u64 cr_ips;

arch/ia64/include/register.h

@@ -30 +30 @@
 #define __ia64_REGISTER_H__
 
+#ifndef __ASM__
 #include <arch/types.h>
+#endif
 
 #define CR_IVR_MASK     0xf
 #define PSR_I_MASK      0x4000
+#define PSR_IC_MASK     0x2000
 
 /** Application registers. */
@@ -109 +112 @@
 /* CR82-CR127 reserved */
 
+#ifndef __ASM__
 /** External Interrupt Vector Register */
 union cr_ivr {
@@ -144 +148 @@
 typedef union cr_itv cr_itv_t;
 
+/** Interruption Status Register */
+union cr_isr {
+        struct {
+                union {
+                        /** General Exception code field structuring. */
+                        struct {
+                                unsigned ge_na : 4;
+                                unsigned ge_code : 4;
+                        } __attribute__ ((packed));
+                        __u16 code;
+                };
+                __u8 vector;
+                unsigned : 8;
+                unsigned x : 1;                 /**< Execute exception. */
+                unsigned w : 1;                 /**< Write exception. */
+                unsigned r : 1;                 /**< Read exception. */
+                unsigned na : 1;                /**< Non-access exception. */
+                unsigned sp : 1;                /**< Speculative load exception. */
+                unsigned rs : 1;                /**< Register stack. */
+                unsigned ir : 1;                /**< Incomplete Register frame. */
+                unsigned ni : 1;                /**< Nested Interruption. */
+                unsigned so : 1;                /**< IA-32 Supervisor Override. */
+                unsigned ei : 2;                /**< Excepting Instruction. */
+                unsigned ed : 1;                /**< Exception Deferral. */
+                unsigned : 20;
+        } __attribute__ ((packed));
+        __u64 value;
+};
+
+typedef union cr_isr cr_isr_t;
+
+#endif /* !__ASM__ */
+
 #endif