Changeset 2c2d54a in mainline for kernel/arch
- Timestamp:
- 2016-09-02T17:58:05Z (9 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 4c3602c4
- Parents:
- 4bf0926e (diff), 3233adb (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Location:
- kernel/arch
- Files:
-
- 13 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/abs32le/include/arch/mm/page.h
r4bf0926e r2c2d54a 115 115 /* Macros for querying the last level entries. */ 116 116 #define PTE_VALID_ARCH(p) \ 117 ( *((uint32_t *) (p))!= 0)117 ((p)->soft_valid != 0) 118 118 #define PTE_PRESENT_ARCH(p) \ 119 119 ((p)->present != 0) -
kernel/arch/amd64/include/arch/mm/page.h
r4bf0926e r2c2d54a 151 151 /* Macros for querying the last-level PTE entries. */ 152 152 #define PTE_VALID_ARCH(p) \ 153 ( *((uint64_t *) (p))!= 0)153 ((p)->soft_valid != 0) 154 154 #define PTE_PRESENT_ARCH(p) \ 155 155 ((p)->present != 0) -
kernel/arch/arm32/include/arch/mm/page_armv4.h
r4bf0926e r2c2d54a 44 44 /* Macros for querying the last-level PTE entries. */ 45 45 #define PTE_VALID_ARCH(pte) \ 46 ( *((uint32_t *) (pte)) != 0)46 (((pte_t *) (pte))->l0.should_be_zero != 0 || PTE_PRESENT_ARCH(pte)) 47 47 #define PTE_PRESENT_ARCH(pte) \ 48 48 (((pte_t *) (pte))->l0.descriptor_type != 0) -
kernel/arch/arm32/include/arch/mm/page_armv6.h
r4bf0926e r2c2d54a 44 44 /* Macros for querying the last-level PTE entries. */ 45 45 #define PTE_VALID_ARCH(pte) \ 46 ( *((uint32_t *) (pte)) != 0)46 (((pte_t *) (pte))->l0.should_be_zero_0 != 0 || PTE_PRESENT_ARCH(pte)) 47 47 #define PTE_PRESENT_ARCH(pte) \ 48 48 (((pte_t *) (pte))->l0.descriptor_type != 0) -
kernel/arch/ia32/include/arch/mm/page.h
r4bf0926e r2c2d54a 132 132 /* Macros for querying the last level entries. */ 133 133 #define PTE_VALID_ARCH(p) \ 134 ( *((uint32_t *) (p))!= 0)134 ((p)->soft_valid != 0) 135 135 #define PTE_PRESENT_ARCH(p) \ 136 136 ((p)->present != 0) -
kernel/arch/ia64/src/mm/tlb.c
r4bf0926e r2c2d54a 484 484 { 485 485 uintptr_t va; 486 pte_t *t;486 pte_t t; 487 487 488 488 va = istate->cr_ifa; /* faulting address */ … … 490 490 ASSERT(!is_kernel_fault(va)); 491 491 492 t = page_mapping_find(AS, va, true);493 if ( t) {492 bool found = page_mapping_find(AS, va, true, &t); 493 if (found) { 494 494 /* 495 495 * The mapping was found in software page hash table. 496 496 * Insert it into data translation cache. 497 497 */ 498 itc_pte_copy( t);498 itc_pte_copy(&t); 499 499 } else { 500 500 /* … … 600 600 601 601 602 pte_t *entry = page_mapping_find(as, va, true); 603 if (entry) { 602 pte_t t; 603 bool found = page_mapping_find(as, va, true, &t); 604 if (found) { 604 605 /* 605 606 * The mapping was found in the software page hash table. 606 607 * Insert it into data translation cache. 607 608 */ 608 dtc_pte_copy( entry);609 dtc_pte_copy(&t); 609 610 } else { 610 611 if (try_memmap_io_insertion(va, istate)) … … 641 642 { 642 643 uintptr_t va; 643 pte_t *t;644 pte_t t; 644 645 as_t *as = AS; 645 646 … … 649 650 as = AS_KERNEL; 650 651 651 t = page_mapping_find(as, va, true); 652 ASSERT((t) && (t->p)); 653 if ((t) && (t->p) && (t->w)) { 652 bool found = page_mapping_find(as, va, true, &t); 653 654 ASSERT(found); 655 ASSERT(t.p); 656 657 if (found && t.p && t.w) { 654 658 /* 655 659 * Update the Dirty bit in page tables and reinsert 656 660 * the mapping into DTC. 657 661 */ 658 t->d = true; 659 dtc_pte_copy(t); 662 t.d = true; 663 dtc_pte_copy(&t); 664 page_mapping_update(as, va, true, &t); 660 665 } else { 661 666 as_page_fault(va, PF_ACCESS_WRITE, istate); … … 672 677 { 673 678 uintptr_t va; 674 pte_t *t;679 pte_t t; 675 680 676 681 va = istate->cr_ifa; /* faulting address */ … … 678 683 ASSERT(!is_kernel_fault(va)); 679 684 680 t = page_mapping_find(AS, va, true); 681 ASSERT((t) && (t->p)); 682 if ((t) && (t->p) && (t->x)) { 685 bool found = page_mapping_find(AS, va, true, &t); 686 687 ASSERT(found); 688 ASSERT(t.p); 689 690 if (found && t.p && t.x) { 683 691 /* 684 692 * Update the Accessed bit in page tables and reinsert 685 693 * the mapping into ITC. 686 694 */ 687 t->a = true; 688 itc_pte_copy(t); 695 t.a = true; 696 itc_pte_copy(&t); 697 page_mapping_update(AS, va, true, &t); 689 698 } else { 690 699 as_page_fault(va, PF_ACCESS_EXEC, istate); … … 701 710 { 702 711 uintptr_t va; 703 pte_t *t;712 pte_t t; 704 713 as_t *as = AS; 705 714 … … 709 718 as = AS_KERNEL; 710 719 711 t = page_mapping_find(as, va, true); 712 ASSERT((t) && (t->p)); 713 if ((t) && (t->p)) { 720 bool found = page_mapping_find(as, va, true, &t); 721 722 ASSERT(found); 723 ASSERT(t.p); 724 725 if (found && t.p) { 714 726 /* 715 727 * Update the Accessed bit in page tables and reinsert 716 728 * the mapping into DTC. 717 729 */ 718 t->a = true; 719 dtc_pte_copy(t); 730 t.a = true; 731 dtc_pte_copy(&t); 732 page_mapping_update(as, va, true, &t); 720 733 } else { 721 734 if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) { … … 736 749 { 737 750 uintptr_t va; 738 pte_t *t;751 pte_t t; 739 752 740 753 va = istate->cr_ifa; /* faulting address */ … … 745 758 * Assume a write to a read-only page. 746 759 */ 747 t = page_mapping_find(AS, va, true); 748 ASSERT((t) && (t->p)); 749 ASSERT(!t->w); 760 bool found = page_mapping_find(AS, va, true, &t); 761 762 ASSERT(found); 763 ASSERT(t.p); 764 ASSERT(!t.w); 765 750 766 as_page_fault(va, PF_ACCESS_WRITE, istate); 751 767 } … … 760 776 { 761 777 uintptr_t va; 762 pte_t *t;778 pte_t t; 763 779 764 780 va = istate->cr_ifa; /* faulting address */ … … 766 782 ASSERT(!is_kernel_fault(va)); 767 783 768 t = page_mapping_find(AS, va, true); 769 ASSERT(t); 770 771 if (t->p) { 784 bool found = page_mapping_find(AS, va, true, &t); 785 786 ASSERT(found); 787 788 if (t.p) { 772 789 /* 773 790 * If the Present bit is set in page hash table, just copy it 774 791 * and update ITC/DTC. 775 792 */ 776 if (t ->x)777 itc_pte_copy( t);793 if (t.x) 794 itc_pte_copy(&t); 778 795 else 779 dtc_pte_copy( t);796 dtc_pte_copy(&t); 780 797 } else { 781 798 as_page_fault(va, PF_ACCESS_READ, istate); -
kernel/arch/mips32/include/arch/mm/page.h
r4bf0926e r2c2d54a 137 137 138 138 /* Last-level info macros. */ 139 #define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte))!= 0)140 #define PTE_PRESENT_ARCH(pte) 141 #define PTE_GET_FRAME_ARCH(pte) 142 #define PTE_WRITABLE_ARCH(pte) 143 #define PTE_EXECUTABLE_ARCH(pte) 139 #define PTE_VALID_ARCH(pte) ((pte)->soft_valid != 0) 140 #define PTE_PRESENT_ARCH(pte) ((pte)->p != 0) 141 #define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) 142 #define PTE_WRITABLE_ARCH(pte) ((pte)->w != 0) 143 #define PTE_EXECUTABLE_ARCH(pte) 1 144 144 145 145 #ifndef __ASM__ -
kernel/arch/mips32/src/mm/tlb.c
r4bf0926e r2c2d54a 97 97 entry_lo_t lo; 98 98 uintptr_t badvaddr; 99 pte_t *pte;99 pte_t pte; 100 100 101 101 badvaddr = cp0_badvaddr_read(); 102 102 103 pte = page_mapping_find(AS, badvaddr, true);104 if ( pte && pte->p) {103 bool found = page_mapping_find(AS, badvaddr, true, &pte); 104 if (found && pte.p) { 105 105 /* 106 106 * Record access to PTE. 107 107 */ 108 pte->a = 1; 109 110 tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, 111 pte->cacheable, pte->pfn); 108 pte.a = 1; 109 110 tlb_prepare_entry_lo(&lo, pte.g, pte.p, pte.d, 111 pte.cacheable, pte.pfn); 112 113 page_mapping_update(AS, badvaddr, true, &pte); 112 114 113 115 /* … … 138 140 tlb_index_t index; 139 141 uintptr_t badvaddr; 140 pte_t *pte;142 pte_t pte; 141 143 142 144 /* … … 162 164 badvaddr = cp0_badvaddr_read(); 163 165 164 pte = page_mapping_find(AS, badvaddr, true);165 if ( pte && pte->p) {166 bool found = page_mapping_find(AS, badvaddr, true, &pte); 167 if (found && pte.p) { 166 168 /* 167 169 * Read the faulting TLB entry. … … 172 174 * Record access to PTE. 173 175 */ 174 pte->a = 1; 175 176 tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, 177 pte->cacheable, pte->pfn); 176 pte.a = 1; 177 178 tlb_prepare_entry_lo(&lo, pte.g, pte.p, pte.d, 179 pte.cacheable, pte.pfn); 180 181 page_mapping_update(AS, badvaddr, true, &pte); 178 182 179 183 /* … … 200 204 tlb_index_t index; 201 205 uintptr_t badvaddr; 202 pte_t *pte;206 pte_t pte; 203 207 204 208 badvaddr = cp0_badvaddr_read(); … … 224 228 } 225 229 226 pte = page_mapping_find(AS, badvaddr, true);227 if ( pte && pte->p && pte->w) {230 bool found = page_mapping_find(AS, badvaddr, true, &pte); 231 if (found && pte.p && pte.w) { 228 232 /* 229 233 * Read the faulting TLB entry. … … 234 238 * Record access and write to PTE. 235 239 */ 236 pte->a = 1; 237 pte->d = 1; 238 239 tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->w, 240 pte->cacheable, pte->pfn); 240 pte.a = 1; 241 pte.d = 1; 242 243 tlb_prepare_entry_lo(&lo, pte.g, pte.p, pte.w, 244 pte.cacheable, pte.pfn); 245 246 page_mapping_update(AS, badvaddr, true, &pte); 241 247 242 248 /* -
kernel/arch/ppc32/include/arch/mm/page.h
r4bf0926e r2c2d54a 140 140 141 141 /* Macros for querying the last-level PTEs. */ 142 #define PTE_VALID_ARCH(pte) ( *((uint32_t *) (pte))!= 0)142 #define PTE_VALID_ARCH(pte) ((pte)->valid != 0) 143 143 #define PTE_PRESENT_ARCH(pte) ((pte)->present != 0) 144 144 #define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) -
kernel/arch/ppc32/src/mm/pht.c
r4bf0926e r2c2d54a 49 49 * @param access Access mode that caused the fault. 50 50 * @param istate Pointer to interrupted state. 51 * 52 * @return PTE on success, NULL otherwise. 53 * 54 */ 55 static pte_t *find_mapping_and_check(as_t *as, uintptr_t badvaddr, int access, 56 istate_t *istate) 51 * @param[out] pte Structure that will receive a copy of the found PTE. 52 * 53 * @return True if the mapping was found, false otherwise. 54 * 55 */ 56 static bool find_mapping_and_check(as_t *as, uintptr_t badvaddr, int access, 57 istate_t *istate, pte_t *pte) 57 58 { 58 59 /* 59 60 * Check if the mapping exists in page tables. 60 61 */ 61 pte_t *pte = page_mapping_find(as, badvaddr, true);62 if ( (pte) && (pte->present)) {62 bool found = page_mapping_find(as, badvaddr, true, pte); 63 if (found && pte->present) { 63 64 /* 64 65 * Mapping found in page tables. 65 66 * Immediately succeed. 66 67 */ 67 return pte;68 return true; 68 69 } 69 70 /* … … 76 77 * The mapping ought to be in place. 77 78 */ 78 pte = page_mapping_find(as, badvaddr, true); 79 ASSERT((pte) && (pte->present)); 80 return pte; 81 } 82 83 return NULL; 79 found = page_mapping_find(as, badvaddr, true, pte); 80 81 ASSERT(found); 82 ASSERT(pte->present); 83 84 return found; 85 } 86 87 return false; 84 88 } 85 89 … … 182 186 badvaddr = istate->pc; 183 187 184 pte_t *pte = find_mapping_and_check(AS, badvaddr, 185 PF_ACCESS_READ /* FIXME */, istate); 186 187 if (pte) { 188 pte_t pte; 189 bool found = find_mapping_and_check(AS, badvaddr, 190 PF_ACCESS_READ /* FIXME */, istate, &pte); 191 192 if (found) { 188 193 /* Record access to PTE */ 189 pte ->accessed = 1;190 pht_insert(badvaddr, pte);194 pte.accessed = 1; 195 pht_insert(badvaddr, &pte); 191 196 } 192 197 } -
kernel/arch/sparc32/include/arch/mm/page.h
r4bf0926e r2c2d54a 129 129 /* Macros for querying the last level entries. */ 130 130 #define PTE_VALID_ARCH(p) \ 131 ( *((uint32_t *) (p)) != 0)131 ((p)->et != PTE_ET_INVALID) 132 132 #define PTE_PRESENT_ARCH(p) \ 133 133 ((p)->et != 0) -
kernel/arch/sparc64/src/mm/sun4u/tlb.c
r4bf0926e r2c2d54a 197 197 { 198 198 size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE; 199 pte_t *t;200 201 t = page_mapping_find(AS, istate->tpc, true);202 if ( t && PTE_EXECUTABLE(t)) {199 pte_t t; 200 201 bool found = page_mapping_find(AS, istate->tpc, true, &t); 202 if (found && PTE_EXECUTABLE(&t)) { 203 203 /* 204 204 * The mapping was found in the software page hash table. 205 205 * Insert it into ITLB. 206 206 */ 207 t ->a = true;208 itlb_pte_copy( t, index);207 t.a = true; 208 itlb_pte_copy(&t, index); 209 209 #ifdef CONFIG_TSB 210 itsb_pte_copy(t, index); 211 #endif 210 itsb_pte_copy(&t, index); 211 #endif 212 page_mapping_update(AS, istate->tpc, true, &t); 212 213 } else { 213 214 /* … … 233 234 uintptr_t page_16k; 234 235 size_t index; 235 pte_t *t;236 pte_t t; 236 237 as_t *as = AS; 237 238 … … 253 254 } 254 255 255 t = page_mapping_find(as, page_16k, true);256 if ( t) {256 bool found = page_mapping_find(as, page_16k, true, &t); 257 if (found) { 257 258 /* 258 259 * The mapping was found in the software page hash table. 259 260 * Insert it into DTLB. 260 261 */ 261 t ->a = true;262 dtlb_pte_copy( t, index, true);262 t.a = true; 263 dtlb_pte_copy(&t, index, true); 263 264 #ifdef CONFIG_TSB 264 dtsb_pte_copy(t, index, true); 265 #endif 265 dtsb_pte_copy(&t, index, true); 266 #endif 267 page_mapping_update(as, page_16k, true, &t); 266 268 } else { 267 269 /* … … 283 285 uintptr_t page_16k; 284 286 size_t index; 285 pte_t *t;287 pte_t t; 286 288 as_t *as = AS; 287 289 … … 293 295 as = AS_KERNEL; 294 296 295 t = page_mapping_find(as, page_16k, true);296 if ( t && PTE_WRITABLE(t)) {297 bool found = page_mapping_find(as, page_16k, true, &t); 298 if (found && PTE_WRITABLE(&t)) { 297 299 /* 298 300 * The mapping was found in the software page hash table and is … … 300 302 * into DTLB. 301 303 */ 302 t ->a = true;303 t ->d = true;304 t.a = true; 305 t.d = true; 304 306 dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_SECONDARY, 305 307 page_16k + index * MMU_PAGE_SIZE); 306 dtlb_pte_copy( t, index, false);308 dtlb_pte_copy(&t, index, false); 307 309 #ifdef CONFIG_TSB 308 dtsb_pte_copy(t, index, false); 309 #endif 310 dtsb_pte_copy(&t, index, false); 311 #endif 312 page_mapping_update(as, page_16k, true, &t); 310 313 } else { 311 314 /* -
kernel/arch/sparc64/src/mm/sun4v/tlb.c
r4bf0926e r2c2d54a 211 211 { 212 212 uintptr_t va = ALIGN_DOWN(istate->tpc, PAGE_SIZE); 213 pte_t *t; 214 215 t = page_mapping_find(AS, va, true); 216 217 if (t && PTE_EXECUTABLE(t)) { 213 pte_t t; 214 215 bool found = page_mapping_find(AS, va, true, &t); 216 if (found && PTE_EXECUTABLE(&t)) { 218 217 /* 219 218 * The mapping was found in the software page hash table. 220 219 * Insert it into ITLB. 221 220 */ 222 t ->a = true;223 itlb_pte_copy( t);221 t.a = true; 222 itlb_pte_copy(&t); 224 223 #ifdef CONFIG_TSB 225 itsb_pte_copy(t); 226 #endif 224 itsb_pte_copy(&t); 225 #endif 226 page_mapping_update(AS, va, true, &t); 227 227 } else { 228 228 /* … … 244 244 void fast_data_access_mmu_miss(unsigned int tt, istate_t *istate) 245 245 { 246 pte_t *t;246 pte_t t; 247 247 uintptr_t va = DMISS_ADDRESS(istate->tlb_tag_access); 248 248 uint16_t ctx = DMISS_CONTEXT(istate->tlb_tag_access); … … 261 261 } 262 262 263 t = page_mapping_find(as, va, true);264 if ( t) {263 bool found = page_mapping_find(as, va, true, &t); 264 if (found) { 265 265 /* 266 266 * The mapping was found in the software page hash table. 267 267 * Insert it into DTLB. 268 268 */ 269 t ->a = true;270 dtlb_pte_copy( t, true);269 t.a = true; 270 dtlb_pte_copy(&t, true); 271 271 #ifdef CONFIG_TSB 272 dtsb_pte_copy(t, true); 273 #endif 272 dtsb_pte_copy(&t, true); 273 #endif 274 page_mapping_update(as, va, true, &t); 274 275 } else { 275 276 /* … … 288 289 void fast_data_access_protection(unsigned int tt, istate_t *istate) 289 290 { 290 pte_t *t;291 pte_t t; 291 292 uintptr_t va = DMISS_ADDRESS(istate->tlb_tag_access); 292 293 uint16_t ctx = DMISS_CONTEXT(istate->tlb_tag_access); … … 296 297 as = AS_KERNEL; 297 298 298 t = page_mapping_find(as, va, true);299 if ( t && PTE_WRITABLE(t)) {299 bool found = page_mapping_find(as, va, true, &t); 300 if (found && PTE_WRITABLE(&t)) { 300 301 /* 301 302 * The mapping was found in the software page hash table and is … … 303 304 * into DTLB. 304 305 */ 305 t ->a = true;306 t ->d = true;306 t.a = true; 307 t.d = true; 307 308 mmu_demap_page(va, ctx, MMU_FLAG_DTLB); 308 dtlb_pte_copy( t, false);309 dtlb_pte_copy(&t, false); 309 310 #ifdef CONFIG_TSB 310 dtsb_pte_copy(t, false); 311 #endif 311 dtsb_pte_copy(&t, false); 312 #endif 313 page_mapping_update(as, va, true, &t); 312 314 } else { 313 315 /*
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