Changeset 235d31d in mainline for kernel/arch/ia64/src
- Timestamp:
- 2014-12-22T17:47:40Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8c7d5ad
- Parents:
- eae91e0 (diff), 759ea0d (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Location:
- kernel/arch/ia64/src
- Files:
-
- 1 added
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia64/src/ia64.c
reae91e0 r235d31d 37 37 #include <errno.h> 38 38 #include <interrupt.h> 39 #include <arch/interrupt.h> 39 40 #include <macros.h> 40 41 #include <str.h> … … 85 86 void arch_pre_mm_init(void) 86 87 { 88 if (config.cpu_active == 1) 89 exception_init(); 87 90 } 88 91 -
kernel/arch/ia64/src/interrupt.c
reae91e0 r235d31d 54 54 #include <synch/spinlock.h> 55 55 #include <mm/tlb.h> 56 #include <arch/mm/tlb.h> 56 57 #include <symtab.h> 57 58 #include <putchar.h> … … 59 60 #define VECTORS_64_BUNDLE 20 60 61 #define VECTORS_16_BUNDLE 48 61 #define VECTORS_16_BUNDLE_START 0x5000 62 63 #define VECTOR_MAX 0x7f00 64 65 #define BUNDLE_SIZE 16 62 #define VECTORS_16_BUNDLE_START 0x50 63 64 #define VECTOR_MAX 0x7f 66 65 67 66 static const char *vector_names_64_bundle[VECTORS_64_BUNDLE] = { … … 122 121 }; 123 122 124 static const char *vector_to_string(uint16_t vector) 125 { 126 ASSERT(vector <= VECTOR_MAX); 127 128 if (vector >= VECTORS_16_BUNDLE_START) 129 return vector_names_16_bundle[(vector - 130 VECTORS_16_BUNDLE_START) / (16 * BUNDLE_SIZE)]; 123 static const char *vector_to_string(unsigned int n) 124 { 125 ASSERT(n <= VECTOR_MAX); 126 127 if (n >= VECTORS_16_BUNDLE_START) 128 return vector_names_16_bundle[n - VECTORS_16_BUNDLE_START]; 131 129 else 132 return vector_names_64_bundle[ vector / (64 * BUNDLE_SIZE)];130 return vector_names_64_bundle[n / 4]; 133 131 } 134 132 … … 153 151 } 154 152 155 void general_exception(u int64_t vector, istate_t *istate)153 void general_exception(unsigned int n, istate_t *istate) 156 154 { 157 155 const char *desc; … … 182 180 183 181 fault_if_from_uspace(istate, "General Exception (%s).", desc); 184 panic_badtrap(istate, vector, "General Exception (%s).", desc);185 } 186 187 void disabled_fp_register(u int64_t vector, istate_t *istate)182 panic_badtrap(istate, n, "General Exception (%s).", desc); 183 } 184 185 void disabled_fp_register(unsigned int n, istate_t *istate) 188 186 { 189 187 #ifdef CONFIG_FPU_LAZY … … 191 189 #else 192 190 fault_if_from_uspace(istate, "Interruption: %#hx (%s).", 193 (uint16_t) vector, vector_to_string(vector));191 (uint16_t) n, vector_to_string(n)); 194 192 panic_badtrap(istate, vector, "Interruption: %#hx (%s).", 195 (uint16_t) vector, vector_to_string(vector));193 (uint16_t) n, vector_to_string(n)); 196 194 #endif 197 195 } 198 196 199 void nop_handler(uint64_t vector, istate_t *istate)200 {201 }202 203 197 /** Handle syscall. */ 204 int break_instruction(uint64_t vector, istate_t *istate) 205 { 198 sysarg_t break_instruction(unsigned int n, istate_t *istate) 199 { 200 sysarg_t ret; 201 206 202 /* 207 203 * Move to next instruction after BREAK. … … 214 210 } 215 211 216 return syscall_handler(istate->in0, istate->in1, istate->in2, 212 interrupts_enable(); 213 ret = syscall_handler(istate->in0, istate->in1, istate->in2, 217 214 istate->in3, istate->in4, istate->in5, istate->in6); 218 } 219 220 void universal_handler(uint64_t vector, istate_t *istate) 215 interrupts_disable(); 216 217 return ret; 218 } 219 220 void universal_handler(unsigned int n, istate_t *istate) 221 221 { 222 222 fault_if_from_uspace(istate, "Interruption: %#hx (%s).", 223 (uint16_t) vector, vector_to_string(vector));224 panic_badtrap(istate, vector, "Interruption: %#hx (%s).",225 (uint16_t) vector, vector_to_string(vector));223 n, vector_to_string(n)); 224 panic_badtrap(istate, n, "Interruption: %#hx (%s).", 225 n, vector_to_string(n)); 226 226 } 227 227 … … 229 229 { 230 230 asm volatile ( 231 "mov cr.eoi =r0;;"231 "mov cr.eoi = r0 ;;" 232 232 ); 233 233 } 234 234 235 void external_interrupt(u int64_t vector, istate_t *istate)235 void external_interrupt(unsigned int n, istate_t *istate) 236 236 { 237 237 cr_ivr_t ivr; … … 298 298 } 299 299 300 void exception_init(void) 301 { 302 unsigned int i; 303 304 for (i = 0; i < IVT_ITEMS; i++) 305 exc_register(i, "universal_handler", false, universal_handler); 306 307 exc_register(EXC_ALT_ITLB_FAULT, 308 vector_to_string(EXC_ALT_ITLB_FAULT), true, 309 alternate_instruction_tlb_fault); 310 exc_register(EXC_ALT_DTLB_FAULT, 311 vector_to_string(EXC_ALT_DTLB_FAULT), true, 312 alternate_data_tlb_fault); 313 exc_register(EXC_NESTED_TLB_FAULT, 314 vector_to_string(EXC_NESTED_TLB_FAULT), false, 315 data_nested_tlb_fault); 316 exc_register(EXC_DATA_D_BIT_FAULT, 317 vector_to_string(EXC_DATA_D_BIT_FAULT), true, 318 data_dirty_bit_fault); 319 exc_register(EXC_INST_A_BIT_FAULT, 320 vector_to_string(EXC_INST_A_BIT_FAULT), true, 321 instruction_access_bit_fault); 322 exc_register(EXC_DATA_A_BIT_FAULT, 323 vector_to_string(EXC_DATA_A_BIT_FAULT), true, 324 data_access_bit_fault); 325 exc_register(EXC_EXT_INTERRUPT, 326 vector_to_string(EXC_EXT_INTERRUPT), true, 327 external_interrupt); 328 329 exc_register(EXC_PAGE_NOT_PRESENT, 330 vector_to_string(EXC_PAGE_NOT_PRESENT), true, 331 page_not_present); 332 exc_register(EXC_DATA_AR_FAULT, 333 vector_to_string(EXC_DATA_AR_FAULT), true, 334 data_access_rights_fault); 335 exc_register(EXC_GENERAL_EXCEPTION, 336 vector_to_string(EXC_GENERAL_EXCEPTION), false, 337 general_exception); 338 exc_register(EXC_DISABLED_FP_REG, 339 vector_to_string(EXC_DISABLED_FP_REG), true, 340 disabled_fp_register); 341 } 342 300 343 /** @} 301 344 */ -
kernel/arch/ia64/src/ivt.S
reae91e0 r235d31d 31 31 #include <arch/register.h> 32 32 #include <arch/mm/page.h> 33 #include <arch/interrupt.h> 33 34 #include <arch/istate_struct.h> 34 35 #include <align.h> … … 39 40 40 41 /** Partitioning of bank 0 registers. */ 41 #define R_ OFFSr1642 #define R_VECTOR r16 42 43 #define R_HANDLER r17 43 44 #define R_RET r18 44 #define R_TMP r1945 45 #define R_KSTACK_BSP r22 /* keep in sync with before_thread_runs_arch() */ 46 46 #define R_KSTACK r23 /* keep in sync with before_thread_runs_arch() */ 47 47 48 48 /* Speculation vector handler */ 49 .macro SPECULATION_VECTOR_HANDLER offs50 .org ivt + \ offs49 .macro SPECULATION_VECTOR_HANDLER vector 50 .org ivt + \vector * 0x100 51 51 52 52 /* 1. Save predicates, IIM, IIP, IPSR and ISR CR's in bank 0 registers. */ … … 94 94 * @param handler Interrupt handler address. 95 95 */ 96 .macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler97 .org ivt + \ offs98 mov R_ OFFS = \offs96 .macro HEAVYWEIGHT_HANDLER vector, handler=exc_dispatch 97 .org ivt + \vector * 0x100 98 mov R_VECTOR = \vector 99 99 movl R_HANDLER = \handler ;; 100 100 br heavyweight_handler … … 165 165 * copy input parameters to stack. 166 166 */ 167 mov R_TMP = 0x2c00 ;; 168 cmp.eq p6, p5 = R_OFFS, R_TMP ;; 167 cmp.eq p6, p5 = EXC_BREAK_INSTRUCTION, R_VECTOR ;; 169 168 170 169 /* … … 309 308 mov loc1 = R_RET /* b0 belonging to interrupted context */ 310 309 mov loc2 = R_HANDLER 311 mov out0 = R_ OFFS310 mov out0 = R_VECTOR 312 311 313 312 add out1 = STACK_SCRATCH_AREA_SIZE, r12 … … 543 542 .align 32768 544 543 ivt: 545 HEAVYWEIGHT_HANDLER 0x00 00546 HEAVYWEIGHT_HANDLER 0x04 00547 HEAVYWEIGHT_HANDLER 0x08 00548 HEAVYWEIGHT_HANDLER 0x0c 00 alternate_instruction_tlb_fault549 HEAVYWEIGHT_HANDLER 0x10 00 alternate_data_tlb_fault550 HEAVYWEIGHT_HANDLER 0x14 00 data_nested_tlb_fault551 HEAVYWEIGHT_HANDLER 0x18 00552 HEAVYWEIGHT_HANDLER 0x1c 00553 HEAVYWEIGHT_HANDLER 0x20 00 data_dirty_bit_fault554 HEAVYWEIGHT_HANDLER 0x24 00 instruction_access_bit_fault555 HEAVYWEIGHT_HANDLER 0x28 00 data_access_bit_fault556 HEAVYWEIGHT_HANDLER 0x2c 00break_instruction557 HEAVYWEIGHT_HANDLER 0x30 00 external_interrupt /* For external interrupt, heavyweight handler is used. */558 HEAVYWEIGHT_HANDLER 0x34 00559 HEAVYWEIGHT_HANDLER 0x38 00560 HEAVYWEIGHT_HANDLER 0x3c 00561 HEAVYWEIGHT_HANDLER 0x40 00562 HEAVYWEIGHT_HANDLER 0x44 00563 HEAVYWEIGHT_HANDLER 0x48 00564 HEAVYWEIGHT_HANDLER 0x4c 00565 566 HEAVYWEIGHT_HANDLER 0x50 00 page_not_present567 HEAVYWEIGHT_HANDLER 0x51 00568 HEAVYWEIGHT_HANDLER 0x52 00569 HEAVYWEIGHT_HANDLER 0x53 00 data_access_rights_fault570 HEAVYWEIGHT_HANDLER 0x54 00 general_exception571 HEAVYWEIGHT_HANDLER 0x55 00 disabled_fp_register572 HEAVYWEIGHT_HANDLER 0x56 00573 SPECULATION_VECTOR_HANDLER 0x57 00574 HEAVYWEIGHT_HANDLER 0x58 00575 HEAVYWEIGHT_HANDLER 0x59 00576 HEAVYWEIGHT_HANDLER 0x5a 00577 HEAVYWEIGHT_HANDLER 0x5b 00578 HEAVYWEIGHT_HANDLER 0x5c 00579 HEAVYWEIGHT_HANDLER 0x5d 00580 HEAVYWEIGHT_HANDLER 0x5e 00581 HEAVYWEIGHT_HANDLER 0x5f 00582 583 HEAVYWEIGHT_HANDLER 0x60 00584 HEAVYWEIGHT_HANDLER 0x61 00585 HEAVYWEIGHT_HANDLER 0x62 00586 HEAVYWEIGHT_HANDLER 0x63 00587 HEAVYWEIGHT_HANDLER 0x64 00588 HEAVYWEIGHT_HANDLER 0x65 00589 HEAVYWEIGHT_HANDLER 0x66 00590 HEAVYWEIGHT_HANDLER 0x67 00591 HEAVYWEIGHT_HANDLER 0x68 00592 HEAVYWEIGHT_HANDLER 0x69 00593 HEAVYWEIGHT_HANDLER 0x6a 00594 HEAVYWEIGHT_HANDLER 0x6b 00595 HEAVYWEIGHT_HANDLER 0x6c 00596 HEAVYWEIGHT_HANDLER 0x6d 00597 HEAVYWEIGHT_HANDLER 0x6e 00598 HEAVYWEIGHT_HANDLER 0x6f 00599 600 HEAVYWEIGHT_HANDLER 0x70 00601 HEAVYWEIGHT_HANDLER 0x71 00602 HEAVYWEIGHT_HANDLER 0x72 00603 HEAVYWEIGHT_HANDLER 0x73 00604 HEAVYWEIGHT_HANDLER 0x74 00605 HEAVYWEIGHT_HANDLER 0x75 00606 HEAVYWEIGHT_HANDLER 0x76 00607 HEAVYWEIGHT_HANDLER 0x77 00608 HEAVYWEIGHT_HANDLER 0x78 00609 HEAVYWEIGHT_HANDLER 0x79 00610 HEAVYWEIGHT_HANDLER 0x7a 00611 HEAVYWEIGHT_HANDLER 0x7b 00612 HEAVYWEIGHT_HANDLER 0x7c 00613 HEAVYWEIGHT_HANDLER 0x7d 00614 HEAVYWEIGHT_HANDLER 0x7e 00615 HEAVYWEIGHT_HANDLER 0x7f 00544 HEAVYWEIGHT_HANDLER 0x00 545 HEAVYWEIGHT_HANDLER 0x04 546 HEAVYWEIGHT_HANDLER 0x08 547 HEAVYWEIGHT_HANDLER 0x0c 548 HEAVYWEIGHT_HANDLER 0x10 549 HEAVYWEIGHT_HANDLER 0x14 550 HEAVYWEIGHT_HANDLER 0x18 551 HEAVYWEIGHT_HANDLER 0x1c 552 HEAVYWEIGHT_HANDLER 0x20 553 HEAVYWEIGHT_HANDLER 0x24 554 HEAVYWEIGHT_HANDLER 0x28 555 HEAVYWEIGHT_HANDLER 0x2c break_instruction 556 HEAVYWEIGHT_HANDLER 0x30 557 HEAVYWEIGHT_HANDLER 0x34 558 HEAVYWEIGHT_HANDLER 0x38 559 HEAVYWEIGHT_HANDLER 0x3c 560 HEAVYWEIGHT_HANDLER 0x40 561 HEAVYWEIGHT_HANDLER 0x44 562 HEAVYWEIGHT_HANDLER 0x48 563 HEAVYWEIGHT_HANDLER 0x4c 564 565 HEAVYWEIGHT_HANDLER 0x50 566 HEAVYWEIGHT_HANDLER 0x51 567 HEAVYWEIGHT_HANDLER 0x52 568 HEAVYWEIGHT_HANDLER 0x53 569 HEAVYWEIGHT_HANDLER 0x54 570 HEAVYWEIGHT_HANDLER 0x55 571 HEAVYWEIGHT_HANDLER 0x56 572 SPECULATION_VECTOR_HANDLER 0x57 573 HEAVYWEIGHT_HANDLER 0x58 574 HEAVYWEIGHT_HANDLER 0x59 575 HEAVYWEIGHT_HANDLER 0x5a 576 HEAVYWEIGHT_HANDLER 0x5b 577 HEAVYWEIGHT_HANDLER 0x5c 578 HEAVYWEIGHT_HANDLER 0x5d 579 HEAVYWEIGHT_HANDLER 0x5e 580 HEAVYWEIGHT_HANDLER 0x5f 581 582 HEAVYWEIGHT_HANDLER 0x60 583 HEAVYWEIGHT_HANDLER 0x61 584 HEAVYWEIGHT_HANDLER 0x62 585 HEAVYWEIGHT_HANDLER 0x63 586 HEAVYWEIGHT_HANDLER 0x64 587 HEAVYWEIGHT_HANDLER 0x65 588 HEAVYWEIGHT_HANDLER 0x66 589 HEAVYWEIGHT_HANDLER 0x67 590 HEAVYWEIGHT_HANDLER 0x68 591 HEAVYWEIGHT_HANDLER 0x69 592 HEAVYWEIGHT_HANDLER 0x6a 593 HEAVYWEIGHT_HANDLER 0x6b 594 HEAVYWEIGHT_HANDLER 0x6c 595 HEAVYWEIGHT_HANDLER 0x6d 596 HEAVYWEIGHT_HANDLER 0x6e 597 HEAVYWEIGHT_HANDLER 0x6f 598 599 HEAVYWEIGHT_HANDLER 0x70 600 HEAVYWEIGHT_HANDLER 0x71 601 HEAVYWEIGHT_HANDLER 0x72 602 HEAVYWEIGHT_HANDLER 0x73 603 HEAVYWEIGHT_HANDLER 0x74 604 HEAVYWEIGHT_HANDLER 0x75 605 HEAVYWEIGHT_HANDLER 0x76 606 HEAVYWEIGHT_HANDLER 0x77 607 HEAVYWEIGHT_HANDLER 0x78 608 HEAVYWEIGHT_HANDLER 0x79 609 HEAVYWEIGHT_HANDLER 0x7a 610 HEAVYWEIGHT_HANDLER 0x7b 611 HEAVYWEIGHT_HANDLER 0x7c 612 HEAVYWEIGHT_HANDLER 0x7d 613 HEAVYWEIGHT_HANDLER 0x7e 614 HEAVYWEIGHT_HANDLER 0x7f -
kernel/arch/ia64/src/mm/tlb.c
reae91e0 r235d31d 477 477 /** Instruction TLB fault handler for faults with VHPT turned off. 478 478 * 479 * @param vectorInterruption vector.480 * @param istate Structure with saved interruption state. 481 * 482 */ 483 void alternate_instruction_tlb_fault(u int64_t vector, istate_t *istate)479 * @param n Interruption vector. 480 * @param istate Structure with saved interruption state. 481 * 482 */ 483 void alternate_instruction_tlb_fault(unsigned int n, istate_t *istate) 484 484 { 485 485 uintptr_t va; … … 566 566 /** Data TLB fault handler for faults with VHPT turned off. 567 567 * 568 * @param vectorInterruption vector.569 * @param istate Structure with saved interruption state. 570 * 571 */ 572 void alternate_data_tlb_fault(u int64_t vector, istate_t *istate)568 * @param n Interruption vector. 569 * @param istate Structure with saved interruption state. 570 * 571 */ 572 void alternate_data_tlb_fault(unsigned int n, istate_t *istate) 573 573 { 574 574 if (istate->cr_isr.sp) { … … 623 623 * This fault should not occur. 624 624 * 625 * @param vectorInterruption vector.626 * @param istate Structure with saved interruption state. 627 * 628 */ 629 void data_nested_tlb_fault(u int64_t vector, istate_t *istate)625 * @param n Interruption vector. 626 * @param istate Structure with saved interruption state. 627 * 628 */ 629 void data_nested_tlb_fault(unsigned int n, istate_t *istate) 630 630 { 631 631 ASSERT(false); … … 634 634 /** Data Dirty bit fault handler. 635 635 * 636 * @param vectorInterruption vector.637 * @param istate Structure with saved interruption state. 638 * 639 */ 640 void data_dirty_bit_fault(u int64_t vector, istate_t *istate)636 * @param n Interruption vector. 637 * @param istate Structure with saved interruption state. 638 * 639 */ 640 void data_dirty_bit_fault(unsigned int n, istate_t *istate) 641 641 { 642 642 uintptr_t va; … … 665 665 /** Instruction access bit fault handler. 666 666 * 667 * @param vectorInterruption vector.668 * @param istate Structure with saved interruption state. 669 * 670 */ 671 void instruction_access_bit_fault(u int64_t vector, istate_t *istate)667 * @param n Interruption vector. 668 * @param istate Structure with saved interruption state. 669 * 670 */ 671 void instruction_access_bit_fault(unsigned int n, istate_t *istate) 672 672 { 673 673 uintptr_t va; … … 694 694 /** Data access bit fault handler. 695 695 * 696 * @param vectorInterruption vector.697 * @param istate Structure with saved interruption state. 698 * 699 */ 700 void data_access_bit_fault(u int64_t vector, istate_t *istate)696 * @param n Interruption vector. 697 * @param istate Structure with saved interruption state. 698 * 699 */ 700 void data_access_bit_fault(unsigned int n, istate_t *istate) 701 701 { 702 702 uintptr_t va; … … 729 729 /** Data access rights fault handler. 730 730 * 731 * @param vectorInterruption vector.732 * @param istate Structure with saved interruption state. 733 * 734 */ 735 void data_access_rights_fault(u int64_t vector, istate_t *istate)731 * @param n Interruption vector. 732 * @param istate Structure with saved interruption state. 733 * 734 */ 735 void data_access_rights_fault(unsigned int n, istate_t *istate) 736 736 { 737 737 uintptr_t va; … … 753 753 /** Page not present fault handler. 754 754 * 755 * @param vectorInterruption vector.756 * @param istate Structure with saved interruption state. 757 * 758 */ 759 void page_not_present(u int64_t vector, istate_t *istate)755 * @param n Interruption vector. 756 * @param istate Structure with saved interruption state. 757 * 758 */ 759 void page_not_present(unsigned int n, istate_t *istate) 760 760 { 761 761 uintptr_t va;
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