Changeset 22f7769 in mainline for arch/ppc32/include


Ignore:
Timestamp:
2005-10-17T23:31:41Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
4b2c872d
Parents:
75eacab
Message:

Rename cpu_priority_{high|low|restore|read} functions to interrupts_{disable|enable|restore|read}.
Rename pri_t to ipl_t (Interrupt Priority Level).
Rename thread_t::pri to thread_t::priority.

Location:
arch/ppc32/include
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • arch/ppc32/include/asm.h

    r75eacab r22f7769  
    3333#include <config.h>
    3434
    35 /** Set priority level low
     35/** Enable interrupts.
    3636 *
    3737 * Enable interrupts and return previous
    3838 * value of EE.
     39 *
     40 * @return Old interrupt priority level.
    3941 */
    40 static inline pri_t cpu_priority_low(void) {
    41         pri_t v;
    42         pri_t tmp;
     42static inline ipl_t interrupts_enable(void) {
     43        ipl_t v;
     44        ipl_t tmp;
    4345       
    4446        __asm__ volatile (
    … …  
    5254}
    5355
    54 /** Set priority level high
     56/** Disable interrupts.
    5557 *
    5658 * Disable interrupts and return previous
    5759 * value of EE.
     60 *
     61 * @return Old interrupt priority level.
    5862 */
    59 static inline pri_t cpu_priority_high(void) {
    60         pri_t v;
    61         pri_t tmp;
     63static inline ipl_t interrupts_disable(void) {
     64        ipl_t v;
     65        ipl_t tmp;
    6266       
    6367        __asm__ volatile (
    … …  
    7175}
    7276
    73 /** Restore priority level
     77/** Restore interrupt priority level.
    7478 *
    7579 * Restore EE.
     80 *
     81 * @param ipl Saved interrupt priority level.
    7682 */
    77 static inline void cpu_priority_restore(pri_t pri) {
    78         pri_t tmp;
     83static inline void interrupts_restore(ipl_t ipl) {
     84        ipl_t tmp;
    7985       
    8086        __asm__ volatile (
    … …  
    8591                "mtmsr %0\n"
    8692                "0:\n"
    87                 : "=r" (pri), "=r" (tmp)
    88                 : "0" (pri)
     93                : "=r" (ipl), "=r" (tmp)
     94                : "0" (ipl)
    8995        );
    9096}
    9197
    92 /** Return raw priority level
     98/** Return interrupt priority level.
    9399 *
    94100 * Return EE.
     101 *
     102 * @return Current interrupt priority level.
    95103 */
    96 static inline pri_t cpu_priority_read(void) {
    97         pri_t v;
     104static inline ipl_t interrupts_read(void) {
     105        ipl_t v;
    98106        __asm__ volatile (
    99107                "mfmsr %0\n"

  • arch/ppc32/include/context.h

    r75eacab r22f7769  
    6868        __u32 r31;
    6969        __u32 pc;
    70         pri_t pri;
     70        ipl_t ipl;
    7171} __attribute__ ((packed));
    7272

  • arch/ppc32/include/types.h

    r75eacab r22f7769  
    4141typedef __u32 __address;
    4242
    43 typedef __u32 pri_t;
     43typedef __u32 ipl_t;
    4444
    4545typedef __u32 __native;
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