Changeset 2057572 in mainline for kernel/arch/sparc64/include/mm


Ignore:
Timestamp:
2007-03-27T23:40:25Z (18 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
399ece9
Parents:
8d37a06
Message:

The Ultimate Solution To Illegal Virtual Aliases.
It is better to avoid them completely than to fight them.
Switch the sparc64 port to 16K pages. The TLBs and TSBs
continue to operate with 8K pages only. Page tables and
other generic parts operate with 16K pages.

Because the MMU doesn't support 16K directly, each 16K
page is emulated by a pair of 8K pages. With 16K pages,
illegal aliases cannot be created in 16K D-cache.

Location:
kernel/arch/sparc64/include/mm
Files:
5 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/include/mm/as.h

    r8d37a06 r2057572  
    8282
    8383#ifdef CONFIG_TSB
    84 #       include <arch/mm/tsb.h>
    85 #       define as_invalidate_translation_cache(as, page, cnt)   tsb_invalidate(as, page, cnt)
     84#include <arch/mm/tsb.h>
     85#define as_invalidate_translation_cache(as, page, cnt) \
     86        tsb_invalidate((as), (page), (cnt))
    8687#else
    87 #       define as_invalidate_translation_cache(as, page, cnt)
     88#define as_invalidate_translation_cache(as, page, cnt)
    8889#endif
    8990

  • kernel/arch/sparc64/include/mm/cache.h

    r8d37a06 r2057572  
    4444        dcache_flush_tag(PAGE_COLOR((p)), ADDR2PFN((f)));
    4545
    46 /**
    47  * Enumerations to differentiate among different scopes of D-Cache
    48  * invalidation.
    49  */
    50 typedef enum {
    51         DCACHE_INVL_INVALID,
    52         DCACHE_INVL_ALL,
    53         DCACHE_INVL_COLOR,
    54         DCACHE_INVL_FRAME
    55 } dcache_invalidate_type_t;
    56 
    57 /**
    58  * Number of messages that can be queued in the cpu_arch_t structure at a time.
    59  */
    60 #define DCACHE_MSG_QUEUE_LEN    10
    61 
    62 /** D-cache shootdown message type. */
    63 typedef struct {
    64         dcache_invalidate_type_t type;
    65         int color;
    66         uintptr_t frame;
    67 } dcache_shootdown_msg_t;
    68 
    6946extern void dcache_flush(void);
    7047extern void dcache_flush_color(int c);
    7148extern void dcache_flush_tag(int c, pfn_t tag);
    72 
    73 #ifdef CONFIG_SMP
    74 extern void dcache_shootdown_start(dcache_invalidate_type_t type, int color,
    75     uintptr_t frame);
    76 extern void dcache_shootdown_finalize(void);
    77 extern void dcache_shootdown_ipi_recv(void);
    78 #else
    79 #define dcache_shootdown_start(t, c, f)
    80 #define dcache_shootdown_finalize()
    81 #define dcache_shootdown_ipi_recv()
    82 #endif /* CONFIG_SMP */
    8349
    8450#endif

  • kernel/arch/sparc64/include/mm/frame.h

    r8d37a06 r2057572  
    3636#define KERN_sparc64_FRAME_H_
    3737
    38 #define FRAME_WIDTH             13      /* 8K */
     38/*
     39 * Page size supported by the MMU.
     40 * For 8K there is the nasty illegal virtual aliasing problem.
     41 * Therefore, the kernel uses 8K only internally on the TLB and TSB levels.
     42 */
     43#define MMU_FRAME_WIDTH         13      /* 8K */
     44#define MMU_FRAME_SIZE          (1 << MMU_FRAME_WIDTH)
     45
     46/*
     47 * Page size exported to the generic memory management subsystems.
     48 * This page size is not directly supported by the MMU, but we can emulate
     49 * each 16K page with a pair of adjacent 8K pages.
     50 */
     51#define FRAME_WIDTH             14      /* 16K */
    3952#define FRAME_SIZE              (1 << FRAME_WIDTH)
    4053

  • kernel/arch/sparc64/include/mm/page.h

    r8d37a06 r2057572  
    3838#include <arch/mm/frame.h>
    3939
     40/*
     41 * On the TLB and TSB level, we still use 8K pages, which are supported by the
     42 * MMU.
     43 */
     44#define MMU_PAGE_WIDTH  MMU_FRAME_WIDTH
     45#define MMU_PAGE_SIZE   MMU_FRAME_SIZE
     46
     47/*
     48 * On the page table level, we use 16K pages. 16K pages are not supported by
     49 * the MMU but we emulate them with pairs of 8K pages.
     50 */
    4051#define PAGE_WIDTH      FRAME_WIDTH
    4152#define PAGE_SIZE       FRAME_SIZE
    4253
    43 #define PAGE_COLOR_BITS 1       /**< 14 - 13; 2^14 == 16K == alias boundary. */
     54#define MMU_PAGES_PER_PAGE      (1 << (PAGE_WIDTH - MMU_PAGE_WIDTH))
     55
     56/*
     57 * With 16K pages, there is only one page color.
     58 */
     59#define PAGE_COLOR_BITS 0       /**< 14 - 14; 2^14 == 16K == alias boundary. */
    4460
    4561#ifdef KERNEL

  • kernel/arch/sparc64/include/mm/tsb.h

    r8d37a06 r2057572  
    113113
    114114extern void tsb_invalidate(struct as *as, uintptr_t page, count_t pages);
    115 extern void itsb_pte_copy(struct pte *t);
    116 extern void dtsb_pte_copy(struct pte *t, bool ro);
     115extern void itsb_pte_copy(struct pte *t, index_t index);
     116extern void dtsb_pte_copy(struct pte *t, index_t index, bool ro);
    117117
    118118#endif /* !def __ASM__ */
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