Changeset 1f7cb3a in mainline for kernel/arch/amd64/src
- Timestamp:
- 2009-02-14T20:14:38Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 74bcf5e
- Parents:
- 6c1f763
- Location:
- kernel/arch/amd64/src
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/src/asm_utils.S
r6c1f763 r1f7cb3a 27 27 # 28 28 29 #define IREGISTER_SPACE 120 30 31 #define IOFFSET_RAX 0x0 32 #define IOFFSET_RBX 0x8 33 #define IOFFSET_RCX 0x10 34 #define IOFFSET_RDX 0x18 35 #define IOFFSET_RSI 0x20 36 #define IOFFSET_RDI 0x28 37 #define IOFFSET_R8 0x30 38 #define IOFFSET_R9 0x38 39 #define IOFFSET_R10 0x40 40 #define IOFFSET_R11 0x48 41 #define IOFFSET_R12 0x50 42 #define IOFFSET_R13 0x58 43 #define IOFFSET_R14 0x60 44 #define IOFFSET_R15 0x68 45 #define IOFFSET_RBP 0x70 29 #define IREGISTER_SPACE 72 30 31 #define IOFFSET_RAX 0x0 32 #define IOFFSET_RCX 0x8 33 #define IOFFSET_RDX 0x10 34 #define IOFFSET_RSI 0x18 35 #define IOFFSET_RDI 0x20 36 #define IOFFSET_R8 0x28 37 #define IOFFSET_R9 0x30 38 #define IOFFSET_R10 0x38 39 #define IOFFSET_R11 0x40 46 40 47 41 # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word … … 174 168 ret 175 169 176 # Push all general purpose registers on stack except %rbp, %rsp170 # Push all volatile general purpose registers on stack 177 171 .macro save_all_gpr 178 172 movq %rax, IOFFSET_RAX(%rsp) … … 185 179 movq %r10, IOFFSET_R10(%rsp) 186 180 movq %r11, IOFFSET_R11(%rsp) 187 #ifdef CONFIG_DEBUG_ALLREGS188 movq %rbx, IOFFSET_RBX(%rsp)189 movq %rbp, IOFFSET_RBP(%rsp)190 movq %r12, IOFFSET_R12(%rsp)191 movq %r13, IOFFSET_R13(%rsp)192 movq %r14, IOFFSET_R14(%rsp)193 movq %r15, IOFFSET_R15(%rsp)194 #endif195 181 .endm 196 182 … … 205 191 movq IOFFSET_R10(%rsp), %r10 206 192 movq IOFFSET_R11(%rsp), %r11 207 #ifdef CONFIG_DEBUG_ALLREGS208 movq IOFFSET_RBX(%rsp), %rbx209 movq IOFFSET_RBP(%rsp), %rbp210 movq IOFFSET_R12(%rsp), %r12211 movq IOFFSET_R13(%rsp), %r13212 movq IOFFSET_R14(%rsp), %r14213 movq IOFFSET_R15(%rsp), %r15214 #endif215 193 .endm 216 194 217 #ifdef CONFIG_DEBUG_ALLREGS 218 # define INTERRUPT_ALIGN 256 219 #else 220 # define INTERRUPT_ALIGN 128 221 #endif 195 #define INTERRUPT_ALIGN 128 222 196 223 197 ## Declare interrupt handlers -
kernel/arch/amd64/src/interrupt.c
r6c1f763 r1f7cb3a 81 81 printf("%%r9=%#llx, %%r10=%#llx, %%r11=%#llx\n", istate->r9, 82 82 istate->r10, istate->r11); 83 #ifdef CONFIG_DEBUG_ALLREGS84 printf("%%r12=%#llx, %%r13=%#llx, %%r14=%#llx\n", istate->r12,85 istate->r13, istate->r14);86 printf("%%r15=%#llx, %%rbx=%#llx, %%rbp=%#llx\n", istate->r15,87 istate->rbx, &istate->rbp);88 #endif89 83 printf("%%rsp=%#llx\n", &istate->stack[0]); 90 84 }
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