Changeset 1df1905 in mainline for uspace/lib/c/arch/sparc32/include


Ignore:
Timestamp:
2013-12-28T17:30:44Z (12 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
41b735f3
Parents:
c1023bcb
Message:

code revision
coding style fixes
removal of debugging printouts and other temporary stuff

Location:
uspace/lib/c/arch/sparc32/include/libarch
Files:
9 edited

Legend:

Unmodified
Added
Removed

  • uspace/lib/c/arch/sparc32/include/libarch/atomic.h

    rc1023bcb r1df1905  
    2727 */
    2828
    29 /** @addtogroup libcsparc64
     29/** @addtogroup libcsparc32
    3030 * @{
    3131 */
    … …  
    3333 */
    3434
    35 #ifndef LIBC_sparc64_ATOMIC_H_
    36 #define LIBC_sparc64_ATOMIC_H_
     35#ifndef LIBC_sparc32_ATOMIC_H_
     36#define LIBC_sparc32_ATOMIC_H_
    3737
    3838#define LIBC_ARCH_ATOMIC_H_
    3939
    40 #define CAS
     40#define CAS
    4141
    4242#include <atomicdflt.h>
    … …  
    5353}
    5454
    55 static inline void atomic_inc(atomic_t *val) {
    56         /* On real hardware the increment has to be done
    57            as an atomic action. */
    58        
     55static inline void atomic_inc(atomic_t *val)
     56{
     57        // FIXME TODO
    5958        val->count++;
    6059}
    6160
    62 static inline void atomic_dec(atomic_t *val) {
    63         /* On real hardware the decrement has to be done
    64            as an atomic action. */
    65        
     61static inline void atomic_dec(atomic_t *val)
     62{
     63        // FIXME TODO
    6664        val->count++;
    6765}
    … …  
    6967static inline atomic_count_t atomic_postinc(atomic_t *val)
    7068{
    71         /* On real hardware both the storing of the previous
    72            value and the increment have to be done as a single
    73            atomic action. */
     69        // FIXME TODO
    7470       
    7571        atomic_count_t prev = val->count;
    … …  
    8177static inline atomic_count_t atomic_postdec(atomic_t *val)
    8278{
    83         /* On real hardware both the storing of the previous
    84            value and the decrement have to be done as a single
    85            atomic action. */
     79        // FIXME TODO
    8680       
    8781        atomic_count_t prev = val->count;
    … …  
    9488#define atomic_predec(val) (atomic_postdec(val) - 1)
    9589
    96 #if 0
    97 /** Atomic add operation.
    98  *
    99  * Use atomic compare and swap operation to atomically add signed value.
    100  *
    101  * @param val Atomic variable.
    102  * @param i   Signed value to be added.
    103  *
    104  * @return Value of the atomic variable as it existed before addition.
    105  *
    106  */
    107 static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i)
    108 {
    109         atomic_count_t a;
    110         atomic_count_t b;
    111        
    112         do {
    113                 volatile uintptr_t ptr = (uintptr_t) &val->count;
    114                
    115                 a = *((atomic_count_t *) ptr);
    116                 b = a + i;
    117                
    118 // XXX          asm volatile (
    119 //                      "cas %0, %2, %1\n"
    120 //                      : "+m" (*((atomic_count_t *) ptr)),
    121 //                        "+r" (b)
    122 //                      : "r" (a)
    123 //              );
    124         } while (a != b);
    125        
    126         return a;
    127 }
    128 
    129 static inline atomic_count_t atomic_preinc(atomic_t *val)
    130 {
    131         return atomic_add(val, 1) + 1;
    132 }
    133 
    134 static inline atomic_count_t atomic_postinc(atomic_t *val)
    135 {
    136         return atomic_add(val, 1);
    137 }
    138 
    139 static inline atomic_count_t atomic_predec(atomic_t *val)
    140 {
    141         return atomic_add(val, -1) - 1;
    142 }
    143 
    144 static inline atomic_count_t atomic_postdec(atomic_t *val)
    145 {
    146         return atomic_add(val, -1);
    147 }
    148 
    149 static inline void atomic_inc(atomic_t *val)
    150 {
    151         (void) atomic_add(val, 1);
    152 }
    153 
    154 static inline void atomic_dec(atomic_t *val)
    155 {
    156         (void) atomic_add(val, -1);
    157 }
    158 #endif
    159 
    16090#endif
    16191

  • uspace/lib/c/arch/sparc32/include/libarch/config.h

    rc1023bcb r1df1905  
    3636#define LIBC_sparc32_CONFIG_H_
    3737
    38 #define PAGE_WIDTH      12
    39 #define PAGE_SIZE       (1 << PAGE_WIDTH)
     38#define PAGE_WIDTH  12
     39#define PAGE_SIZE   (1 << PAGE_WIDTH)
    4040
    4141#endif

  • uspace/lib/c/arch/sparc32/include/libarch/ddi.h

    rc1023bcb r1df1905  
    11/*
    2  * Copyright (c) 2009 Jakub Jermar 
     2 * Copyright (c) 2009 Jakub Jermar
    33 * All rights reserved.
    44 *
    … …  
    2828
    2929/** @file
    30  * @ingroup libsparc64
     30 * @ingroup libsparc32
    3131 */
    3232
    33 #ifndef LIBC_sparc64_DDI_H_
    34 #define LIBC_sparc64_DDI_H_
     33#ifndef LIBC_sparc32_DDI_H_
     34#define LIBC_sparc32_DDI_H_
    3535
    3636#include <sys/types.h>
    … …  
    6565static inline uint8_t arch_pio_read_8(const ioport8_t *port)
    6666{
    67         uint8_t rv;
    68 
    69         rv = *port;
     67        uint8_t rv = *port;
    7068        memory_barrier();
    71 
     69       
    7270        return rv;
    7371}
    … …  
    7573static inline uint16_t arch_pio_read_16(const ioport16_t *port)
    7674{
    77         uint16_t rv;
    78 
    79         rv = *port;
     75        uint16_t rv = *port;
    8076        memory_barrier();
    81 
     77       
    8278        return rv;
    8379}
    … …  
    8581static inline uint32_t arch_pio_read_32(const ioport32_t *port)
    8682{
    87         uint32_t rv;
    88 
    89         rv = *port;
     83        uint32_t rv = *port;
    9084        memory_barrier();
    91 
     85       
    9286        return rv;
    9387}

  • uspace/lib/c/arch/sparc32/include/libarch/elf_linux.h

    rc1023bcb r1df1905  
    2727 */
    2828
    29 /** @addtogroup libcsparc64
     29/** @addtogroup libcsparc32
    3030 * @{
    3131 */
    … …  
    3333 */
    3434
    35 #ifndef LIBC_sparc64_ELF_LINUX_H_
    36 #define LBIC_sparc64_ELF_LINUX_H_
     35#ifndef LIBC_sparc32_ELF_LINUX_H_
     36#define LBIC_sparc32_ELF_LINUX_H_
    3737
    3838#include <libarch/istate.h>
    … …  
    4747{
    4848        /* TODO */
    49         (void) istate; (void) elf_regs;
     49        (void) istate;
     50        (void) elf_regs;
    5051}
    5152

  • uspace/lib/c/arch/sparc32/include/libarch/faddr.h

    rc1023bcb r1df1905  
    2727 */
    2828
    29 /** @addtogroup libcsparc64
     29/** @addtogroup libcsparc32
    3030 * @{
    3131 */
    … …  
    3333 */
    3434
    35 #ifndef LIBC_sparc64_FADDR_H_
    36 #define LIBC_sparc64_FADDR_H_
     35#ifndef LIBC_sparc32_FADDR_H_
     36#define LIBC_sparc32_FADDR_H_
    3737
    3838#include <libarch/types.h>
    3939
    40 #define FADDR(fptr)             ((uintptr_t) (fptr))
     40#define FADDR(fptr)  ((uintptr_t) (fptr))
    4141
    4242#endif

  • uspace/lib/c/arch/sparc32/include/libarch/fibril.h

    rc1023bcb r1df1905  
    5656 */
    5757typedef struct {
    58         uintptr_t sp;           /* %o6 */
    59         uintptr_t pc;           /* %o7 */
     58        uintptr_t sp;  /* %o6 */
     59        uintptr_t pc;  /* %o7 */
    6060        uint32_t i0;
    6161        uint32_t i1;
    … …  
    6464        uint32_t i4;
    6565        uint32_t i5;
    66         uintptr_t fp;           /* %i6 */
     66        uintptr_t fp;  /* %i6 */
    6767        uintptr_t i7;
    6868        uint32_t l0;
    … …  
    7474        uint32_t l6;
    7575        uint32_t l7;
    76         uint32_t tp;            /* %g7 */
     76        uint32_t tp;  /* %g7 */
    7777} context_t;
    7878

  • uspace/lib/c/arch/sparc32/include/libarch/stack.h

    rc1023bcb r1df1905  
    2727 */
    2828
    29 /** @addtogroup libcsparc64
     29/** @addtogroup libcsparc32
    3030 * @{
    3131 */
    … …  
    3636#define LIBC_sparc32_STACK_H_
    3737
    38 #define STACK_ITEM_SIZE                 4
     38#define STACK_ITEM_SIZE  4
    3939
    40 /** According to SPARC Compliance Definition, every stack frame is 16-byte aligned. */
    41 #define STACK_ALIGNMENT                 8
     40#define STACK_ALIGNMENT  8
    4241
    43 /**
    44  * 16-extended-word save area for %i[0-7] and %l[0-7] registers.
    45  */
    46 #define STACK_WINDOW_SAVE_AREA_SIZE     (16 * STACK_ITEM_SIZE)
     42/** 16-extended-word save area for %i[0-7] and %l[0-7] registers. */
     43#define STACK_WINDOW_SAVE_AREA_SIZE  (16 * STACK_ITEM_SIZE)
    4744
    48 /*
    49  * Six extended words for first six arguments.
    50  */
    51 #define STACK_ARG_SAVE_AREA_SIZE                (6 * STACK_ITEM_SIZE)
     45/* Six extended words for first six arguments. */
     46#define STACK_ARG_SAVE_AREA_SIZE  (6 * STACK_ITEM_SIZE)
    5247
    5348#endif

  • uspace/lib/c/arch/sparc32/include/libarch/syscall.h

    rc1023bcb r1df1905  
    3939#include <abi/syscall.h>
    4040
    41 #define __syscall0      __syscall
    42 #define __syscall1      __syscall
    43 #define __syscall2      __syscall
    44 #define __syscall3      __syscall
    45 #define __syscall4      __syscall
    46 #define __syscall5      __syscall
    47 #define __syscall6      __syscall
     41#define __syscall0  __syscall
     42#define __syscall1  __syscall
     43#define __syscall2  __syscall
     44#define __syscall3  __syscall
     45#define __syscall4  __syscall
     46#define __syscall5  __syscall
     47#define __syscall6  __syscall
    4848
    49 static inline sysarg_t
    50 __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3,
    51     const sysarg_t p4, const sysarg_t p5, const sysarg_t p6, const syscall_t id)
     49static inline sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2,
     50    const sysarg_t p3, const sysarg_t p4, const sysarg_t p5, const sysarg_t p6,
     51    const syscall_t id)
    5252{
    5353        register uint32_t a1 asm("o0") = p1;
    … …  
    5757        register uint32_t a5 asm("o4") = p5;
    5858        register uint32_t a6 asm("o5") = p6;
    59 
     59       
    6060        asm volatile (
    6161                "ta %7\n"
    6262                : "=r" (a1)
    63                 : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6),
     63                : "r" (a1),
     64                  "r" (a2),
     65                  "r" (a3),
     66                  "r" (a4),
     67                  "r" (a5),
     68                  "r" (a6),
    6469                  "i" (id)
    6570                : "memory"

  • uspace/lib/c/arch/sparc32/include/libarch/tls.h

    rc1023bcb r1df1905  
    2828 */
    2929
    30 /** @addtogroup libcsparc64
     30/** @addtogroup libcsparc32
    3131 * @{
    3232 */
    33 /**
    34  * @file
    35  * @brief       sparc64 TLS functions.
     33/** @file
     34 * @brief sparc32 TLS functions.
    3635 */
    3736
    38 #ifndef LIBC_sparc64_TLS_H_
    39 #define LIBC_sparc64_TLS_H_
     37#ifndef LIBC_sparc32_TLS_H_
     38#define LIBC_sparc32_TLS_H_
    4039
    4140#define CONFIG_TLS_VARIANT_2
    … …  
    4847static inline void __tcb_set(tcb_t *tcb)
    4948{
    50         asm volatile ("mov %0, %%g7\n" : : "r" (tcb) : "g7");
     49        asm volatile(
     50                "mov %0, %%g7\n"
     51                :: "r" (tcb)
     52                : "g7"
     53        );
    5154}
    5255
    53 static inline tcb_t * __tcb_get(void)
     56static inline tcb_t *__tcb_get(void)
    5457{
    5558        void *retval;
    56 
    57         asm volatile ("mov %%g7, %0\n" : "=r" (retval));
    58 
     59       
     60        asm volatile(
     61                "mov %%g7, %0\n"
     62                : "=r" (retval)
     63        );
     64       
    5965        return retval;
    6066}
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