Changeset 1b20da0 in mainline for kernel/arch/sparc64/include


Ignore:
Timestamp:
2018-02-28T17:52:03Z (8 years ago)
Author:
Jiří Zárevúcky <zarevucky.jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
3061bc1
Parents:
df6ded8
git-author:
Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:26:03)
git-committer:
Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:52:03)
Message:

style: Remove trailing whitespace on non-empty lines, in certain file types.

Command used: tools/srepl '\([^[:space:]]\)\s\+$' '\1' -- *.c *.h *.py *.sh *.s *.S *.ag

Location:
kernel/arch/sparc64/include/arch
Files:
40 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/include/arch/console.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/context_struct.ag

    rdf6ded8 r1b20da0  
    1 # Copyright (c) 2014 Jakub Jermar 
     1# Copyright (c) 2014 Jakub Jermar
    22# All rights reserved.
    33#

  • kernel/arch/sparc64/include/arch/cpu.h

    rdf6ded8 r1b20da0  
    6565
    6666
    67 #endif 
     67#endif
    6868
    6969#endif

  • kernel/arch/sparc64/include/arch/cpu_family.h

    rdf6ded8 r1b20da0  
    4343/**
    4444 * Find the processor (sub)family.
    45  * 
     45 *
    4646 * @return      true iff the CPU belongs to the US family
    4747 */
    … …  
    5555/**
    5656 * Find the processor (sub)family.
    57  * 
     57 *
    5858 * @return      true iff the CPU belongs to the US-III subfamily
    5959 */
    … …  
    6868/**
    6969 * Find the processor (sub)family.
    70  * 
     70 *
    7171 * @return      true iff the CPU belongs to the US-IV subfamily
    7272 */

  • kernel/arch/sparc64/include/arch/cpu_node.h

    rdf6ded8 r1b20da0  
    4343 *  Depending on the machine type (and possibly the OFW version), CPUs can be
    4444 *  at "/" or at "/ssm@0,0".
    45  */ 
     45 */
    4646static inline ofw_tree_node_t *cpus_parent(void)
    4747{

  • kernel/arch/sparc64/include/arch/drivers/fb.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/drivers/niagara.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/drivers/pci.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/fpu_context.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/interrupt.h

    rdf6ded8 r1b20da0  
    4040
    4141#define IVT_ITEMS  512
    42 #define IVT_FIRST  0 
     42#define IVT_FIRST  0
    4343
    4444/* This needs to be defined for inter-architecture API portability. */

  • kernel/arch/sparc64/include/arch/istate_struct.ag

    rdf6ded8 r1b20da0  
    1 # Copyright (c) 2014 Jakub Jermar 
     1# Copyright (c) 2014 Jakub Jermar
    22# All rights reserved.
    33#

  • kernel/arch/sparc64/include/arch/mm/asid.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/mm/mmu.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/mm/page.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/mm/pagesize.h

    rdf6ded8 r1b20da0  
    2828 */
    2929
    30 /** @addtogroup sparc64mm       
     30/** @addtogroup sparc64mm
    3131 * @{
    3232 */

  • kernel/arch/sparc64/include/arch/mm/sun4u/mmu.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */
    … …  
    4343/* I-MMU ASIs. */
    4444#define ASI_IMMU                        0x50
    45 #define ASI_IMMU_TSB_8KB_PTR_REG        0x51   
     45#define ASI_IMMU_TSB_8KB_PTR_REG        0x51
    4646#define ASI_IMMU_TSB_64KB_PTR_REG       0x52
    4747#define ASI_ITLB_DATA_IN_REG            0x54
    … …  
    6363/* D-MMU ASIs. */
    6464#define ASI_DMMU                        0x58
    65 #define ASI_DMMU_TSB_8KB_PTR_REG        0x59   
     65#define ASI_DMMU_TSB_8KB_PTR_REG        0x59
    6666#define ASI_DMMU_TSB_64KB_PTR_REG       0x5a
    6767#define ASI_DMMU_TSB_DIRECT_PTR_REG     0x5b
    … …  
    106106                unsigned vw : 1;
    107107                unsigned : 1;
    108                 unsigned fm : 16;       
     108                unsigned fm : 16;
    109109                unsigned dm : 1;        /**< D-MMU enable. */
    110110                unsigned im : 1;        /**< I-MMU enable. */

  • kernel/arch/sparc64/include/arch/mm/sun4u/tlb.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */
    … …  
    143143 * behind this is to prevent careless mistakes in the code
    144144 * caused by setting only the entry number and not the TLB
    145  * number in the US3 code (when taking the code from US). 
     145 * number in the US3 code (when taking the code from US).
    146146 */
    147147
    … …  
    241241
    242242/**
    243  * Determine the number of entries in the DMMU's small TLB. 
     243 * Determine the number of entries in the DMMU's small TLB.
    244244 */
    245245NO_TRACE static inline uint16_t tlb_dsmall_size(void)
    … …  
    249249
    250250/**
    251  * Determine the number of entries in each DMMU's big TLB. 
     251 * Determine the number of entries in each DMMU's big TLB.
    252252 */
    253253NO_TRACE static inline uint16_t tlb_dbig_size(void)
    … …  
    257257
    258258/**
    259  * Determine the number of entries in the IMMU's small TLB. 
     259 * Determine the number of entries in the IMMU's small TLB.
    260260 */
    261261NO_TRACE static inline uint16_t tlb_ismall_size(void)
    … …  
    265265
    266266/**
    267  * Determine the number of entries in the IMMU's big TLB. 
     267 * Determine the number of entries in the IMMU's big TLB.
    268268 */
    269269NO_TRACE static inline uint16_t tlb_ibig_size(void)
    … …  
    449449/** Read DMMU TLB Data Access Register.
    450450 *
    451  * @param tlb           TLB number (one of TLB_DSMALL, TLB_DBIG, TLB_DBIG) 
     451 * @param tlb           TLB number (one of TLB_DSMALL, TLB_DBIG, TLB_DBIG)
    452452 * @param entry         TLB Entry index.
    453453 *
    … …  
    467467/** Write DMMU TLB Data Access Register.
    468468 *
    469  * @param tlb           TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1) 
     469 * @param tlb           TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1)
    470470 * @param entry         TLB Entry index.
    471471 * @param value         Value to be written.
    … …  
    485485/** Read IMMU TLB Tag Read Register.
    486486 *
    487  * @param tlb           TLB number (one of TLB_ISMALL or TLB_IBIG) 
     487 * @param tlb           TLB number (one of TLB_ISMALL or TLB_IBIG)
    488488 * @param entry         TLB Entry index.
    489489 *
    … …  
    646646        da.vpn = pg.vpn;
    647647       
    648         /* da.value is the address within the ASI */ 
     648        /* da.value is the address within the ASI */
    649649        asi_u64_write(ASI_IMMU_DEMAP, da.value, 0);
    650650
    … …  
    672672        da.vpn = pg.vpn;
    673673       
    674         /* da.value is the address within the ASI */ 
     674        /* da.value is the address within the ASI */
    675675        asi_u64_write(ASI_DMMU_DEMAP, da.value, 0);
    676676

  • kernel/arch/sparc64/include/arch/mm/sun4u/tsb.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/mm/sun4u/tte.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/mm/sun4v/as.h

    rdf6ded8 r1b20da0  
    2828 */
    2929
    30 /** @addtogroup sparc64mm       
     30/** @addtogroup sparc64mm
    3131 * @{
    3232 */
    … …  
    5454 * Even though for sun4v the format of the TSB Tag states that the context
    5555 * field has 16 bits, the T1 CPU still only supports 13-bit contexts and the
    56  * three most significant bits are always zero. 
     56 * three most significant bits are always zero.
    5757 */
    5858typedef union tte_tag {

  • kernel/arch/sparc64/include/arch/mm/sun4v/page.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/mm/tsb.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/mm/tte.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/regdef.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */
    … …  
    5858/*
    5959 * The following definitions concern the UPA_CONFIG register on US and the
    60  * FIREPLANE_CONFIG register on US3. 
     60 * FIREPLANE_CONFIG register on US3.
    6161 */
    6262#define ICBUS_CONFIG_MID_SHIFT    17

  • kernel/arch/sparc64/include/arch/register.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */
    … …  
    9898        uint64_t value;
    9999        struct {
    100                 uint64_t : 47; 
     100                uint64_t : 47;
    101101                unsigned stick_int : 1;
    102102                unsigned int_level : 15;

  • kernel/arch/sparc64/include/arch/smp/sun4u/ipi.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/smp/sun4v/smp.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/stack.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/sun4u/arch.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/sun4v/arch.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */
    … …  
    4747
    4848/* register where the address of the MMU fault status area will be stored */
    49 #define SCRATCHPAD_MMU_FSA      0x00   
     49#define SCRATCHPAD_MMU_FSA      0x00
    5050
    5151/* register where the CPUID will be stored */

  • kernel/arch/sparc64/include/arch/sun4v/ipi.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/sun4v/register.h

    rdf6ded8 r1b20da0  
    2727 */
    2828
    29 /** @addtogroup sparc64 
     29/** @addtogroup sparc64
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/arch/trap/interrupt.h

    rdf6ded8 r1b20da0  
    3030 * @{
    3131 */
    32 /** 
     32/**
    3333 * @file
    3434 * @brief This file contains level N interrupt and inter-processor interrupt

  • kernel/arch/sparc64/include/arch/trap/regwin.h

    rdf6ded8 r1b20da0  
    8484 */
    8585.macro SPILL_NORMAL_HANDLER_KERNEL
    86         stx %l0, [%sp + STACK_BIAS + L0_OFFSET] 
     86        stx %l0, [%sp + STACK_BIAS + L0_OFFSET]
    8787        stx %l1, [%sp + STACK_BIAS + L1_OFFSET]
    8888        stx %l2, [%sp + STACK_BIAS + L2_OFFSET]

  • kernel/arch/sparc64/include/arch/trap/sun4u/interrupt.h

    rdf6ded8 r1b20da0  
    3030 * @{
    3131 */
    32 /** 
     32/**
    3333 * @file
    3434 * @brief This file contains interrupt vector trap handler.

  • kernel/arch/sparc64/include/arch/trap/sun4u/mmu.h

    rdf6ded8 r1b20da0  
    7777        mov VA_IMMU_TAG_ACCESS, %g5
    7878        ldxa [%g5] ASI_IMMU, %g5                        ! read the faulting Context and VPN
    79         PREEMPTIBLE_HANDLER exc_dispatch 
     79        PREEMPTIBLE_HANDLER exc_dispatch
    8080.endm
    8181
    … …  
    143143        mov TT_FAST_DATA_ACCESS_MMU_MISS, %g2
    144144        ldxa [VA_DMMU_TAG_ACCESS] %asi, %g5             ! read the faulting Context and VPN
    145         PREEMPTIBLE_HANDLER exc_dispatch 
     145        PREEMPTIBLE_HANDLER exc_dispatch
    146146.endm
    147147
    … …  
    163163        mov VA_DMMU_TAG_ACCESS, %g5
    164164        ldxa [%g5] ASI_DMMU, %g5                        ! read the faulting Context and VPN
    165         PREEMPTIBLE_HANDLER exc_dispatch 
     165        PREEMPTIBLE_HANDLER exc_dispatch
    166166.endm
    167167

  • kernel/arch/sparc64/include/arch/trap/sun4u/regwin.h

    rdf6ded8 r1b20da0  
    4242 */
    4343.macro SPILL_TO_USPACE_WINDOW_BUFFER
    44         stx %l0, [%g7 + L0_OFFSET]     
     44        stx %l0, [%g7 + L0_OFFSET]
    4545        stx %l1, [%g7 + L1_OFFSET]
    4646        stx %l2, [%g7 + L2_OFFSET]

  • kernel/arch/sparc64/include/arch/trap/sun4v/interrupt.h

    rdf6ded8 r1b20da0  
    3030 * @{
    3131 */
    32 /** 
     32/**
    3333 * @file
    3434 * @brief This file contains interrupt vector trap handler.

  • kernel/arch/sparc64/include/arch/trap/sun4v/mmu.h

    rdf6ded8 r1b20da0  
    7575        mov TT_FAST_INSTRUCTION_ACCESS_MMU_MISS, %g2
    7676        clr %g5         ! XXX
    77         PREEMPTIBLE_HANDLER exc_dispatch 
     77        PREEMPTIBLE_HANDLER exc_dispatch
    7878.endm
    7979
    … …  
    179179        or %g1, %g3, %g5
    180180
    181         PREEMPTIBLE_HANDLER exc_dispatch 
     181        PREEMPTIBLE_HANDLER exc_dispatch
    182182.endm
    183183#endif /* __ASM__ */

  • kernel/arch/sparc64/include/arch/trap/sun4v/regwin.h

    rdf6ded8 r1b20da0  
    4848        set SCRATCHPAD_WBUF, \tmpreg2
    4949        ldxa [\tmpreg2] ASI_SCRATCHPAD, \tmpreg1
    50         stx %l0, [\tmpreg1 + L0_OFFSET] 
     50        stx %l0, [\tmpreg1 + L0_OFFSET]
    5151        stx %l1, [\tmpreg1 + L1_OFFSET]
    5252        stx %l2, [\tmpreg1 + L2_OFFSET]
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