Changeset 1b20da0 in mainline for kernel/arch/arm32

Timestamp:

2018-02-28T17:52:03Z (8 years ago)

Author:

Jiří Zárevúcky <zarevucky.jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

3061bc1

Parents:

df6ded8

git-author:

Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:26:03)

git-committer:

Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:52:03)

Message:

style: Remove trailing whitespace on non-empty lines, in certain file types.

Command used: tools/srepl '\([^[:space:]]\)\s\+$' '\1' -- *.c *.h *.py *.sh *.s *.S *.ag

Location:

kernel/arch/arm32

Files:

• include/arch/asm.h (modified) (1 diff)
• include/arch/barrier.h (modified) (1 diff)
• include/arch/context_struct.ag (modified) (1 diff)
• include/arch/fpu_context.h (modified) (1 diff)
• include/arch/istate_struct.ag (modified) (1 diff)
• include/arch/mm/as.h (modified) (1 diff)
• include/arch/mm/asid.h (modified) (2 diffs)
• include/arch/stack.h (modified) (1 diff)
• src/atomic.c (modified) (1 diff)
• src/context.S (modified) (1 diff)
• src/exc_handler.S (modified) (1 diff)
• src/interrupt.c (modified) (1 diff)
• src/mach/integratorcp/integratorcp.c (modified) (2 diffs)
• src/mm/as.c (modified) (1 diff)
• src/mm/tlb.c (modified) (1 diff)
• src/ras.c (modified) (1 diff)

kernel/arch/arm32/include/arch/asm.h

@@ -107 +107 @@
         
         asm volatile (
-                "and %[v], sp, %[size]\n" 
+                "and %[v], sp, %[size]\n"
                 : [v] "=r" (v)
                 : [size] "r" (~(STACK_SIZE - 1))

kernel/arch/arm32/include/arch/barrier.h

@@ -78 +78 @@
 #define memory_barrier()  CP15DSB_write(0)
 #endif
-#define read_barrier()    CP15DSB_write(0) 
+#define read_barrier()    CP15DSB_write(0)
 #define write_barrier()   read_barrier()
 #if defined(PROCESSOR_ARCH_armv6) || defined(PROCESSOR_ARCH_armv7_a)

kernel/arch/arm32/include/arch/context_struct.ag

@@ -1 @@
-# Copyright (c) 2014 Jakub Jermar 
+# Copyright (c) 2014 Jakub Jermar
 # All rights reserved.
 #

kernel/arch/arm32/include/arch/fpu_context.h

@@ -27 +27 @@
  */
 
-/** @addtogroup arm32   
+/** @addtogroup arm32
  * @{
  */

kernel/arch/arm32/include/arch/istate_struct.ag

@@ -1 @@
-# Copyright (c) 2014 Jakub Jermar 
+# Copyright (c) 2014 Jakub Jermar
 # All rights reserved.
 #

kernel/arch/arm32/include/arch/mm/as.h

@@ -27 +27 @@
  */
 
-/** @addtogroup arm32mm 
+/** @addtogroup arm32mm
  * @{
  */

kernel/arch/arm32/include/arch/mm/asid.h

@@ -27 +27 @@
  */
 
-/** @addtogroup arm32mm 
+/** @addtogroup arm32mm
  * @{
  */
@@ -51 +51 @@
 #define asid_get()              (ASID_START + 1)
 
-#define asid_put(asid) 
+#define asid_put(asid)
 
 #endif

kernel/arch/arm32/include/arch/stack.h

@@ -27 +27 @@
  */
 
-/** @addtogroup arm32   
+/** @addtogroup arm32
  * @{
  */

kernel/arch/arm32/src/atomic.c

@@ -46 +46 @@
 void * __sync_val_compare_and_swap_4(void **ptr, void *expected, void *new_val)
 {
-        /* 
+        /*
          * Using an interrupt disabling spinlock might still lead to deadlock
          * if CAS() is used in an exception handler. Eg. if a CAS() results

kernel/arch/arm32/src/context.S

@@ -29 +29 @@
 #include <abi/asmtool.h>
 
-.text   
+.text
 
 FUNCTION_BEGIN(context_save_arch)

kernel/arch/arm32/src/exc_handler.S

@@ -29 +29 @@
 #include <abi/asmtool.h>
 
-.text   
+.text
 
 # Switches to kernel stack and saves all registers there.

kernel/arch/arm32/src/interrupt.c

@@ -73 +73 @@
 {
         current_status_reg_control_write(
-            (current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) | 
+            (current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) |
             (ipl & STATUS_REG_IRQ_DISABLED_BIT));
 }

kernel/arch/arm32/src/mach/integratorcp/integratorcp.c

@@ -113 +113 @@
 
 /** Masks interrupt.
- * 
+ *
  * @param irq interrupt number
  */
@@ -123 +123 @@
 
 /** Unmasks interrupt.
- * 
+ *
  * @param irq interrupt number
  */

kernel/arch/arm32/src/mm/as.c

@@ -43 +43 @@
 
 /** Architecture dependent address space init.
- *  
+ *
  *  Since ARM supports page tables, #as_pt_operations are used.
  */

kernel/arch/arm32/src/mm/tlb.c

@@ -27 +27 @@
  */
 
-/** @addtogroup arm32mm 
+/** @addtogroup arm32mm
  * @{
  */

kernel/arch/arm32/src/ras.c

@@ -59 +59 @@
             PAGE_SIZE, PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);
         
-        memsetb(ras_page, PAGE_SIZE, 0); 
+        memsetb(ras_page, PAGE_SIZE, 0);
         ras_page[RAS_START] = 0;
         ras_page[RAS_END] = 0xffffffff;