Changeset 18e0a6c in mainline for arch/ia32/src


Ignore:
Timestamp:
2005-06-09T23:43:45Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
74df77d
Parents:
d896525
Message:

Implement several assembler functions in gcc's asm notation instead of in .s or .S file.
Gain both better speed and size.

Location:
arch/ia32/src
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • arch/ia32/src/asm.s

    rd896525 r18e0a6c  
    3131.text
    3232
    33 .global cpu_priority_high
    34 .global cpu_priority_low
    35 .global cpu_priority_restore
    36 .global cpu_priority_read
    3733.global cpu_halt
    3834.global cpu_sleep
    3935.global paging_on
    40 .global cpu_read_dba
    41 .global cpu_write_dba
    42 .global cpu_read_cr2
    4336.global enable_l_apic_in_msr
    4437.global interrupt_handlers
    … …  
    5548
    5649
    57 ## Set priority level high
    58 #
    59 # Disable interrupts and return previous
    60 # EFLAGS in EAX.
    61 #
    62 cpu_priority_high:
    63         pushf
    64         pop %eax
    65         cli
    66         ret
    67 
    68 
    69 ## Set priority level low
    70 #
    71 # Enable interrupts and return previous
    72 # EFLAGS in EAX.
    73 #   
    74 cpu_priority_low:
    75         pushf
    76         pop %eax
    77         sti
    78         ret
    79 
    80 
    81 ## Restore priority level
    82 #
    83 # Restore EFLAGS.
    84 #
    85 cpu_priority_restore:
    86         push 4(%esp)
    87         popf
    88         ret
    89 
    90 ## Return raw priority level
    91 #
    92 # Return EFLAFS in EAX.
    93 #
    94 cpu_priority_read:
    95         pushf
    96         pop %eax
    97         ret
    98 
    99 
    100 ## Halt the CPU
    101 #
    102 # Halt the CPU using HLT.
    103 #
    104 cpu_halt:
    105 cpu_sleep:
    106         hlt
    107         ret
    108 
    109 
    11050## Turn paging on
    11151#
    … …  
    12464
    12565
    126 ## Read CR3
    127 #
    128 # Store CR3 in EAX.
    129 #
    130 cpu_read_dba:
    131         movl %cr3,%eax
    132         ret
    133 
    134 
    135 ## Write CR3
    136 #
    137 # Set CR3.
    138 #
    139 cpu_write_dba:
    140         pushl %eax
    141         movl 8(%esp),%eax
    142         movl %eax,%cr3
    143         popl %eax
    144         ret
    145 
    146 
    147 ## Read CR2
    148 #
    149 # Store CR2 in EAX.
    150 #
    151 cpu_read_cr2:
    152         movl %cr2,%eax
    153         ret
    154 
    155 
    15666## Enable local APIC
    15767#

  • arch/ia32/src/atomic.S

    rd896525 r18e0a6c  
    2929.text
    3030
    31 .global atomic_inc
    32 atomic_inc:
    33         pushl %ebx
    34         movl 8(%esp),%ebx
    35 #ifdef __SMP__ 
    36         lock incl (%ebx)
    37 #else
    38         incl (%ebx)
    39 #endif         
    40         popl %ebx
    41         ret
    42 
    43 .global atomic_dec
    44 atomic_dec:
    45         pushl %ebx
    46         movl 8(%esp),%ebx
    47 #ifdef __SMP__ 
    48         lock decl (%ebx)
    49 #else
    50         decl (%ebx)
    51 #endif
    52         popl %ebx
    53         ret
    54        
    55 
    5631#ifdef __SMP__
    5732
    58 
    59 .global test_and_set
    6033.global spinlock_arch
    61 
    62 test_and_set:
    63         pushl %ebx
    64    
    65         movl 8(%esp),%ebx
    66         movl $1,%eax
    67         xchgl %eax,(%ebx)       # xchg implicitly turns on the LOCK signal
    68    
    69         popl %ebx
    70         ret
    71 
    7234
    7335#

  • arch/ia32/src/interrupt.c

    rd896525 r18e0a6c  
    112112void page_fault(__u8 n, __u32 stack[])
    113113{
    114         printf("page fault address: %X\n", cpu_read_cr2());
     114        printf("page fault address: %X\n", read_cr2());
    115115        printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
    116116        printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);

  • arch/ia32/src/mm/page.c

    rd896525 r18e0a6c  
    7070
    7171                trap_register(14, page_fault);
    72                 cpu_write_dba(KA2PA(dba));
     72                write_cr3(KA2PA(dba));
    7373        }
    7474        else {
    … …  
    8282                dba = frame_alloc(FRAME_KA | FRAME_PANIC);
    8383                memcopy(bootstrap_dba, dba, PAGE_SIZE);
    84                 cpu_write_dba(KA2PA(dba));
     84                write_cr3(KA2PA(dba));
    8585        }
    8686
    … …  
    108108
    109109        if (root) dba = root;
    110         else dba = cpu_read_dba();
     110        else dba = read_cr3();
    111111
    112112        pde = page >> 22;               /* page directory entry */

  • arch/ia32/src/mm/tlb.c

    rd896525 r18e0a6c  
    3232void tlb_invalidate(int asid)
    3333{
    34         cpu_write_dba(cpu_read_dba());
     34        write_cr3(read_cr3());
    3535}

  • arch/ia32/src/smp/apic.c

    rd896525 r18e0a6c  
    4545 * Tested on:
    4646 *      Bochs 2.0.2 - Bochs 2.2 with 2-8 CPUs
     47 *      Simics 2.0.28
    4748 *      ASUS P/I-P65UP5 + ASUS C-P55T2D REV. 1.41 with 2x 200Mhz Pentium CPUs
    4849 */
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