Changeset 18b6a88 in mainline for uspace/drv


Ignore:
Timestamp:
2018-04-15T09:35:04Z (7 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
c1f44ca
Parents:
8ebe212
Message:

More ccheck fixes, sometimes with manual intervention.

Location:
uspace/drv
Files:
11 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/block/ddisk/ddisk.c

    r8ebe212 r18b6a88  
    198198}
    199199
    200 static
    201 errno_t ddisk_rw_block(ddisk_t *ddisk, bool read, aoff64_t ba, void *buf)
     200static errno_t ddisk_rw_block(ddisk_t *ddisk, bool read, aoff64_t ba, void *buf)
    202201{
    203202        fibril_mutex_lock(&ddisk->lock);
     
    235234}
    236235
    237 static
    238 errno_t ddisk_bd_rw_blocks(bd_srv_t *bd, aoff64_t ba, size_t cnt, void *buf,
    239     size_t size, bool is_read)
     236static errno_t ddisk_bd_rw_blocks(bd_srv_t *bd, aoff64_t ba, size_t cnt,
     237    void *buf, size_t size, bool is_read)
    240238{
    241239        ddisk_t *ddisk = (ddisk_t *) bd->srvs->sarg;
  • uspace/drv/bus/usb/uhci/uhci_batch.c

    r8ebe212 r18b6a88  
    5353
    5454/** Transfer batch setup table. */
    55 static void (*const batch_setup[])(uhci_transfer_batch_t*);
     55static void (*const batch_setup[])(uhci_transfer_batch_t *);
    5656
    5757/** Destroys uhci_transfer_batch_t structure.
     
    7272 * NULL otherwise.
    7373 */
    74 uhci_transfer_batch_t * uhci_transfer_batch_create(endpoint_t *ep)
     74uhci_transfer_batch_t *uhci_transfer_batch_create(endpoint_t *ep)
    7575{
    7676        uhci_transfer_batch_t *uhci_batch =
     
    9999        usb_transfer_batch_t *usb_batch = &uhci_batch->base;
    100100
    101         uhci_batch->td_count = (usb_batch->size + usb_batch->ep->max_packet_size - 1)
    102                 / usb_batch->ep->max_packet_size;
     101        uhci_batch->td_count = (usb_batch->size + usb_batch->ep->max_packet_size - 1) /
     102            usb_batch->ep->max_packet_size;
    103103
    104104        if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
     
    106106        }
    107107
    108         const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL)
    109                 ? USB_SETUP_PACKET_SIZE
    110                 : 0;
    111 
    112         const size_t total_size = (sizeof(td_t) * uhci_batch->td_count)
    113             + sizeof(qh_t) + setup_size;
     108        const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) ?
     109            USB_SETUP_PACKET_SIZE :
     110            0;
     111
     112        const size_t total_size = (sizeof(td_t) * uhci_batch->td_count) +
     113            sizeof(qh_t) + setup_size;
    114114
    115115        if (dma_buffer_alloc(&uhci_batch->uhci_dma_buffer, total_size)) {
     
    162162        uhci_endpoint_t *uhci_ep = (uhci_endpoint_t *) batch->ep;
    163163
    164         for (size_t i = 0;i < uhci_batch->td_count; ++i) {
     164        for (size_t i = 0; i < uhci_batch->td_count; ++i) {
    165165                if (td_is_active(&uhci_batch->tds[i])) {
    166166                        return false;
     
    180180                }
    181181
    182                 batch->transferred_size
    183                     += td_act_size(&uhci_batch->tds[i]);
     182                batch->transferred_size +=
     183                    td_act_size(&uhci_batch->tds[i]);
    184184                if (td_is_short(&uhci_batch->tds[i]))
    185185                        goto substract_ret;
     
    235235                const size_t packet_size = min(remain_size, mps);
    236236
    237                 const td_t *next_td = (td + 1 < uhci_batch->td_count)
    238                     ? &uhci_batch->tds[td + 1] : NULL;
     237                const td_t *next_td = (td + 1 < uhci_batch->td_count) ?
     238                    &uhci_batch->tds[td + 1] : NULL;
    239239
    240240                assert(td < uhci_batch->td_count);
     
    328328}
    329329
    330 static void (*const batch_setup[])(uhci_transfer_batch_t*) =
    331 {
     330static void (*const batch_setup[])(uhci_transfer_batch_t *) =
     331    {
    332332        [USB_TRANSFER_CONTROL] = batch_control,
    333333        [USB_TRANSFER_BULK] = batch_data,
  • uspace/drv/bus/usb/vhc/hub/hub.c

    r8ebe212 r18b6a88  
    148148                 */
    149149                //if (port->state == HUB_PORT_STATE_DISCONNECTED) {
    150                         port->state = HUB_PORT_STATE_DISABLED;
    151                         set_port_status_change(port, HUB_STATUS_C_PORT_CONNECTION);
     150                port->state = HUB_PORT_STATE_DISABLED;
     151                set_port_status_change(port, HUB_STATUS_C_PORT_CONNECTION);
    152152                //}
    153153
     
    343343            port->state == HUB_PORT_STATE_ENABLED ? 1 : 0,
    344344            /* Suspend. */
    345             (port->state == HUB_PORT_STATE_SUSPENDED)
    346             || (port->state == HUB_PORT_STATE_RESUMING) ? 1 : 0,
     345            (port->state == HUB_PORT_STATE_SUSPENDED) ||
     346            (port->state == HUB_PORT_STATE_RESUMING) ? 1 : 0,
    347347            /* Over-current. */
    348348            0,
     
    358358            0,
    359359            /* Reserved. */
    360             0, 0, 0, 0, 0, 0
    361             ) << 8;
     360            0, 0, 0, 0, 0, 0) << 8;
    362361
    363362        status |= (port->status_change << 16);
  • uspace/drv/char/ns8250/ns8250.c

    r8ebe212 r18b6a88  
    10131013 * @param stop_bits     The number of stop bits used.
    10141014 */
    1015 static void
    1016     ns8250_get_props(ddf_dev_t *dev, unsigned int *baud_rate, unsigned int *parity,
    1017     unsigned int *word_length, unsigned int *stop_bits)
     1015static void ns8250_get_props(ddf_dev_t *dev, unsigned int *baud_rate,
     1016    unsigned int *parity, unsigned int *word_length, unsigned int *stop_bits)
    10181017{
    10191018        ns8250_t *data = dev_ns8250(dev);
  • uspace/drv/hid/usbhid/kbd/kbddev.c

    r8ebe212 r18b6a88  
    191191                } else {
    192192                        usb_log_error("%s: console session already set",
    193                            __FUNCTION__);
     193                            __FUNCTION__);
    194194                        async_answer_0(icall_handle, ELIMIT);
    195195                }
    196196                break;
    197197        default:
    198                         usb_log_error("%s: Unknown method: %d.",
    199                             __FUNCTION__, (int) method);
    200                         async_answer_0(icall_handle, EINVAL);
    201                         break;
     198                usb_log_error("%s: Unknown method: %d.",
     199                    __FUNCTION__, (int) method);
     200                async_answer_0(icall_handle, EINVAL);
     201                break;
    202202        }
    203203
     
    236236        while (field != NULL) {
    237237
    238                 if ((field->usage == USB_HID_LED_NUM_LOCK)
    239                     && (kbd_dev->mods & KM_NUM_LOCK)){
     238                if ((field->usage == USB_HID_LED_NUM_LOCK) &&
     239                    (kbd_dev->mods & KM_NUM_LOCK)) {
    240240                        field->value = 1;
    241241                }
    242242
    243                 if ((field->usage == USB_HID_LED_CAPS_LOCK)
    244                     && (kbd_dev->mods & KM_CAPS_LOCK)){
     243                if ((field->usage == USB_HID_LED_CAPS_LOCK) &&
     244                    (kbd_dev->mods & KM_CAPS_LOCK)) {
    245245                        field->value = 1;
    246246                }
    247247
    248                 if ((field->usage == USB_HID_LED_SCROLL_LOCK)
    249                     && (kbd_dev->mods & KM_SCROLL_LOCK)){
     248                if ((field->usage == USB_HID_LED_SCROLL_LOCK) &&
     249                    (kbd_dev->mods & KM_SCROLL_LOCK)) {
    250250                        field->value = 1;
    251251                }
     
    253253                field = usb_hid_report_get_sibling(
    254254                    &hid_dev->report, field, kbd_dev->led_path,
    255                 USB_HID_PATH_COMPARE_END | USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY,
     255                    USB_HID_PATH_COMPARE_END | USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY,
    256256                    USB_HID_REPORT_TYPE_OUTPUT);
    257257        }
     
    269269        usb_log_debug("Output report buffer: %s",
    270270            usb_debug_str_buffer(kbd_dev->output_buffer, kbd_dev->output_size,
    271                 0));
     271            0));
    272272
    273273        rc = usbhid_req_set_report(
     
    308308static inline int usb_kbd_is_lock(unsigned int key_code)
    309309{
    310         return (key_code == KC_NUM_LOCK
    311             || key_code == KC_SCROLL_LOCK
    312             || key_code == KC_CAPS_LOCK);
     310        return (key_code == KC_NUM_LOCK ||
     311            key_code == KC_SCROLL_LOCK ||
     312            key_code == KC_CAPS_LOCK);
    313313}
    314314
     
    437437
    438438        errno_t ret =
    439            usb_hid_report_path_append_item(path, USB_HIDUT_PAGE_KEYBOARD, 0);
     439            usb_hid_report_path_append_item(path, USB_HIDUT_PAGE_KEYBOARD, 0);
    440440        if (ret != EOK) {
    441441                usb_log_error("Failed to append to hid/kbd report path.");
     
    461461                if (field->value != 0) {
    462462                        kbd_dev->keys[i] = field->usage;
    463                 }
    464                 else {
     463                } else {
    465464                        kbd_dev->keys[i] = 0;
    466465                }
     
    469468                ++i;
    470469                field = usb_hid_report_get_sibling(
    471                     &hid_dev->report, field, path, USB_HID_PATH_COMPARE_END
    472                         | USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY,
     470                    &hid_dev->report, field, path, USB_HID_PATH_COMPARE_END |
     471                    USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY,
    473472                    USB_HID_REPORT_TYPE_INPUT);
    474473        }
     
    742741        // FIXME - the fibril_mutex_is_locked may not cause
    743742        // fibril scheduling
    744         while (fibril_mutex_is_locked(&kbd_dev->repeat_mtx)) {}
     743        while (fibril_mutex_is_locked(&kbd_dev->repeat_mtx)) {
     744        }
    745745
    746746        /* Free all buffers. */
  • uspace/drv/hid/usbhid/mouse/mousedev.c

    r8ebe212 r18b6a88  
    184184            hid_dev->report_id, &hid_dev->report,
    185185            USB_HIDUT_USAGE_GENERIC_DESKTOP_Y);
    186         const usb_hid_report_field_t *wheel= get_mouse_axis_move_field(
     186        const usb_hid_report_field_t *wheel = get_mouse_axis_move_field(
    187187            hid_dev->report_id, &hid_dev->report,
    188188            USB_HIDUT_USAGE_GENERIC_DESKTOP_WHEEL);
     
    232232        }
    233233        errno_t ret =
    234            usb_hid_report_path_append_item(path, USB_HIDUT_PAGE_BUTTON, 0);
     234            usb_hid_report_path_append_item(path, USB_HIDUT_PAGE_BUTTON, 0);
    235235        if (ret != EOK) {
    236236                usb_hid_report_path_free(path);
     
    241241
    242242        usb_hid_report_field_t *field = usb_hid_report_get_sibling(
    243             &hid_dev->report, NULL, path, USB_HID_PATH_COMPARE_END
    244             | USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY, USB_HID_REPORT_TYPE_INPUT);
     243            &hid_dev->report, NULL, path, USB_HID_PATH_COMPARE_END |
     244            USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY, USB_HID_REPORT_TYPE_INPUT);
    245245
    246246        while (field != NULL) {
     
    263263
    264264                field = usb_hid_report_get_sibling(
    265                     &hid_dev->report, field, path, USB_HID_PATH_COMPARE_END
    266                     | USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY,
     265                    &hid_dev->report, field, path, USB_HID_PATH_COMPARE_END |
     266                    USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY,
    267267                    USB_HID_REPORT_TYPE_INPUT);
    268268        }
  • uspace/drv/hid/usbhid/multimedia/multimedia.c

    r8ebe212 r18b6a88  
    260260
    261261        usb_hid_report_field_t *field = usb_hid_report_get_sibling(
    262             &hid_dev->report, NULL, path, USB_HID_PATH_COMPARE_END
    263             | USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY,
     262            &hid_dev->report, NULL, path, USB_HID_PATH_COMPARE_END |
     263            USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY,
    264264            USB_HID_REPORT_TYPE_INPUT);
    265265
     
    279279
    280280                field = usb_hid_report_get_sibling(
    281                     &hid_dev->report, field, path, USB_HID_PATH_COMPARE_END
    282                     | USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY,
     281                    &hid_dev->report, field, path, USB_HID_PATH_COMPARE_END |
     282                    USB_HID_PATH_COMPARE_USAGE_PAGE_ONLY,
    283283                    USB_HID_REPORT_TYPE_INPUT);
    284284        }
  • uspace/drv/nic/rtl8139/defs.h

    r8ebe212 r18b6a88  
    219219static inline void rtl8139_regs_unlock(void *io_base)
    220220{
    221         pio_write_8((io_base) + CR9346, RTL8139_REGS_UNLOCKED);
     221        pio_write_8(io_base + CR9346, RTL8139_REGS_UNLOCKED);
    222222}
    223223
     
    261261/** Transmit status descriptor registers bits */
    262262enum rtl8139_tsd {
    263         TSD_CRS          = (1 << 31),   /**< Carrier Sense Lost */
    264         TSD_TABT         = (1 << 30),   /**<  Transmit Abort */
    265         TSD_OWC          = (1 << 29),   /**< Out of Window Collision */
    266         TSD_CDH          = (1 << 28),   /**< CD Heart Beat */
    267         TSD_NCC_SHIFT    = 24,          /**< Collision Count - bit shift */
    268         TSD_NCC_SIZE     = 4,           /**< Collision Count - bit size */
    269         TSD_NCC_MASK     = (1 << 4)-1, /**< Collision Count - bit size */
    270         TSD_ERTXTH_SHIFT = 16,          /**< Early Tx Threshold - bit shift */
    271         TSD_ERTXTH_SIZE  = 6,           /**< Early Tx  Treshold - bit size */
    272         TSD_TOK          = (1 << 15),   /**< Transmit OK */
    273         TSD_TUN          = (1 << 14),   /**< Transmit FIFO Underrun */
    274         TSD_OWN          = (1 << 13),   /**< OWN */
    275         TSD_SIZE_SHIFT   = 0,           /**< Size - bit shift */
    276         TSD_SIZE_SIZE    = 13,          /**< Size - bit size */
    277         TSD_SIZE_MASK    = 0x1fff       /**< Size - bit mask */
     263        TSD_CRS          = (1 << 31),    /**< Carrier Sense Lost */
     264        TSD_TABT         = (1 << 30),    /**<  Transmit Abort */
     265        TSD_OWC          = (1 << 29),    /**< Out of Window Collision */
     266        TSD_CDH          = (1 << 28),    /**< CD Heart Beat */
     267        TSD_NCC_SHIFT    = 24,           /**< Collision Count - bit shift */
     268        TSD_NCC_SIZE     = 4,            /**< Collision Count - bit size */
     269        TSD_NCC_MASK     = (1 << 4) - 1, /**< Collision Count - bit size */
     270        TSD_ERTXTH_SHIFT = 16,           /**< Early Tx Threshold - bit shift */
     271        TSD_ERTXTH_SIZE  = 6,            /**< Early Tx  Treshold - bit size */
     272        TSD_TOK          = (1 << 15),    /**< Transmit OK */
     273        TSD_TUN          = (1 << 14),    /**< Transmit FIFO Underrun */
     274        TSD_OWN          = (1 << 13),    /**< OWN */
     275        TSD_SIZE_SHIFT   = 0,            /**< Size - bit shift */
     276        TSD_SIZE_SIZE    = 13,           /**< Size - bit size */
     277        TSD_SIZE_MASK    = 0x1fff        /**< Size - bit mask */
    278278};
    279279
     
    480480/** Mapping of HW version -> version ID */
    481481extern const struct rtl8139_hwver_map rtl8139_versions[RTL8139_VER_COUNT + 1];
    482 extern const char* model_names[RTL8139_VER_COUNT];
     482extern const char *model_names[RTL8139_VER_COUNT];
    483483
    484484/** Size in the frame header while copying from RxFIFO to Rx buffer */
  • uspace/drv/platform/amdm37x/amdm37x.c

    r8ebe212 r18b6a88  
    4848    void *data, bool write)
    4949{
    50         printf("PIO %s: %p(%p) %#"PRIx64"\n", write ? "WRITE" : "READ",
     50        printf("PIO %s: %p(%p) %#" PRIx64 "\n", write ? "WRITE" : "READ",
    5151            (place - base) + data, place, val);
    5252}
     
    5858        errno_t ret = EOK;
    5959
    60         ret = pio_enable((void*)USBHOST_CM_BASE_ADDRESS, USBHOST_CM_SIZE,
    61             (void**)&device->cm.usbhost);
    62         if (ret != EOK)
    63                 return ret;
    64 
    65         ret = pio_enable((void*)CORE_CM_BASE_ADDRESS, CORE_CM_SIZE,
    66             (void**)&device->cm.core);
    67         if (ret != EOK)
    68                 return ret;
    69 
    70         ret = pio_enable((void*)CLOCK_CONTROL_CM_BASE_ADDRESS,
    71                     CLOCK_CONTROL_CM_SIZE, (void**)&device->cm.clocks);
    72         if (ret != EOK)
    73                 return ret;
    74 
    75         ret = pio_enable((void*)MPU_CM_BASE_ADDRESS,
    76                     MPU_CM_SIZE, (void**)&device->cm.mpu);
    77         if (ret != EOK)
    78                 return ret;
    79 
    80         ret = pio_enable((void*)IVA2_CM_BASE_ADDRESS,
    81                     IVA2_CM_SIZE, (void**)&device->cm.iva2);
    82         if (ret != EOK)
    83                 return ret;
    84 
    85         ret = pio_enable((void*)CLOCK_CONTROL_PRM_BASE_ADDRESS,
    86             CLOCK_CONTROL_PRM_SIZE, (void**)&device->prm.clocks);
    87         if (ret != EOK)
    88                 return ret;
    89 
    90         ret = pio_enable((void*)GLOBAL_REG_PRM_BASE_ADDRESS,
    91             GLOBAL_REG_PRM_SIZE, (void**)&device->prm.global);
    92         if (ret != EOK)
    93                 return ret;
    94 
    95         ret = pio_enable((void*)AMDM37x_USBTLL_BASE_ADDRESS,
    96             AMDM37x_USBTLL_SIZE, (void**)&device->tll);
    97         if (ret != EOK)
    98                 return ret;
    99 
    100         ret = pio_enable((void*)AMDM37x_UHH_BASE_ADDRESS,
    101             AMDM37x_UHH_SIZE, (void**)&device->uhh);
     60        ret = pio_enable((void *)USBHOST_CM_BASE_ADDRESS, USBHOST_CM_SIZE,
     61            (void **)&device->cm.usbhost);
     62        if (ret != EOK)
     63                return ret;
     64
     65        ret = pio_enable((void *)CORE_CM_BASE_ADDRESS, CORE_CM_SIZE,
     66            (void **)&device->cm.core);
     67        if (ret != EOK)
     68                return ret;
     69
     70        ret = pio_enable((void *)CLOCK_CONTROL_CM_BASE_ADDRESS,
     71            CLOCK_CONTROL_CM_SIZE, (void **)&device->cm.clocks);
     72        if (ret != EOK)
     73                return ret;
     74
     75        ret = pio_enable((void *)MPU_CM_BASE_ADDRESS,
     76            MPU_CM_SIZE, (void **)&device->cm.mpu);
     77        if (ret != EOK)
     78                return ret;
     79
     80        ret = pio_enable((void *)IVA2_CM_BASE_ADDRESS,
     81            IVA2_CM_SIZE, (void **)&device->cm.iva2);
     82        if (ret != EOK)
     83                return ret;
     84
     85        ret = pio_enable((void *)CLOCK_CONTROL_PRM_BASE_ADDRESS,
     86            CLOCK_CONTROL_PRM_SIZE, (void **)&device->prm.clocks);
     87        if (ret != EOK)
     88                return ret;
     89
     90        ret = pio_enable((void *)GLOBAL_REG_PRM_BASE_ADDRESS,
     91            GLOBAL_REG_PRM_SIZE, (void **)&device->prm.global);
     92        if (ret != EOK)
     93                return ret;
     94
     95        ret = pio_enable((void *)AMDM37x_USBTLL_BASE_ADDRESS,
     96            AMDM37x_USBTLL_SIZE, (void **)&device->tll);
     97        if (ret != EOK)
     98                return ret;
     99
     100        ret = pio_enable((void *)AMDM37x_UHH_BASE_ADDRESS,
     101            AMDM37x_UHH_SIZE, (void **)&device->uhh);
    102102        if (ret != EOK)
    103103                return ret;
    104104
    105105        if (trace) {
    106                 pio_trace_enable(device->tll, AMDM37x_USBTLL_SIZE, log_message, (void*)AMDM37x_USBTLL_BASE_ADDRESS);
    107                 pio_trace_enable(device->cm.clocks, CLOCK_CONTROL_CM_SIZE, log_message, (void*)CLOCK_CONTROL_CM_BASE_ADDRESS);
    108                 pio_trace_enable(device->cm.core, CORE_CM_SIZE, log_message, (void*)CORE_CM_BASE_ADDRESS);
    109                 pio_trace_enable(device->cm.mpu, MPU_CM_SIZE, log_message, (void*)MPU_CM_BASE_ADDRESS);
    110                 pio_trace_enable(device->cm.iva2, IVA2_CM_SIZE, log_message, (void*)IVA2_CM_BASE_ADDRESS);
    111                 pio_trace_enable(device->cm.usbhost, USBHOST_CM_SIZE, log_message, (void*)USBHOST_CM_BASE_ADDRESS);
    112                 pio_trace_enable(device->uhh, AMDM37x_UHH_SIZE, log_message, (void*)AMDM37x_UHH_BASE_ADDRESS);
    113                 pio_trace_enable(device->prm.clocks, CLOCK_CONTROL_PRM_SIZE, log_message, (void*)CLOCK_CONTROL_PRM_BASE_ADDRESS);
    114                 pio_trace_enable(device->prm.global, GLOBAL_REG_PRM_SIZE, log_message, (void*)GLOBAL_REG_PRM_BASE_ADDRESS);
     106                pio_trace_enable(device->tll, AMDM37x_USBTLL_SIZE, log_message, (void *)AMDM37x_USBTLL_BASE_ADDRESS);
     107                pio_trace_enable(device->cm.clocks, CLOCK_CONTROL_CM_SIZE, log_message, (void *)CLOCK_CONTROL_CM_BASE_ADDRESS);
     108                pio_trace_enable(device->cm.core, CORE_CM_SIZE, log_message, (void *)CORE_CM_BASE_ADDRESS);
     109                pio_trace_enable(device->cm.mpu, MPU_CM_SIZE, log_message, (void *)MPU_CM_BASE_ADDRESS);
     110                pio_trace_enable(device->cm.iva2, IVA2_CM_SIZE, log_message, (void *)IVA2_CM_BASE_ADDRESS);
     111                pio_trace_enable(device->cm.usbhost, USBHOST_CM_SIZE, log_message, (void *)USBHOST_CM_BASE_ADDRESS);
     112                pio_trace_enable(device->uhh, AMDM37x_UHH_SIZE, log_message, (void *)AMDM37x_UHH_BASE_ADDRESS);
     113                pio_trace_enable(device->prm.clocks, CLOCK_CONTROL_PRM_SIZE, log_message, (void *)CLOCK_CONTROL_PRM_BASE_ADDRESS);
     114                pio_trace_enable(device->prm.global, GLOBAL_REG_PRM_SIZE, log_message, (void *)GLOBAL_REG_PRM_BASE_ADDRESS);
    115115        }
    116116        return EOK;
     
    129129        /* Get SYS_CLK value, it is used as reference clock by all DPLLs,
    130130         * NFI who sets this or why it is set to specific value. */
    131         const unsigned osc_clk = pio_read_32(&device->prm.clocks->clksel)
    132             & CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_MASK;
     131        const unsigned osc_clk = pio_read_32(&device->prm.clocks->clksel) &
     132            CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_MASK;
    133133        const unsigned clk_reg = pio_read_32(&device->prm.global->clksrc_ctrl);
    134         const unsigned base_freq = sys_clk_freq_kHz(osc_clk)
    135             / GLOBAL_REG_PRM_CLKSRC_CTRL_SYSCLKDIV_GET(clk_reg);
     134        const unsigned base_freq = sys_clk_freq_kHz(osc_clk) /
     135            GLOBAL_REG_PRM_CLKSRC_CTRL_SYSCLKDIV_GET(clk_reg);
    136136        ddf_msg(LVL_NOTE, "Base frequency: %d.%dMhz",
    137137            base_freq / 1000, base_freq % 1000);
     
    150150                        const uint32_t reg = pio_read_32(&mpu->clksel1_pll);
    151151                        const unsigned multiplier =
    152                             (reg & MPU_CM_CLKSEL1_PLL_MPU_DPLL_MULT_MASK)
    153                                 >> MPU_CM_CLKSEL1_PLL_MPU_DPLL_MULT_SHIFT;
     152                            (reg & MPU_CM_CLKSEL1_PLL_MPU_DPLL_MULT_MASK) >>
     153                            MPU_CM_CLKSEL1_PLL_MPU_DPLL_MULT_SHIFT;
    154154                        const unsigned divisor =
    155                             (reg & MPU_CM_CLKSEL1_PLL_MPU_DPLL_DIV_MASK)
    156                                 >> MPU_CM_CLKSEL1_PLL_MPU_DPLL_DIV_SHIFT;
     155                            (reg & MPU_CM_CLKSEL1_PLL_MPU_DPLL_DIV_MASK) >>
     156                            MPU_CM_CLKSEL1_PLL_MPU_DPLL_DIV_SHIFT;
    157157                        const unsigned divisor2 =
    158                             (pio_read_32(&mpu->clksel2_pll)
    159                                 & MPU_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV_MASK);
     158                            (pio_read_32(&mpu->clksel2_pll) &
     159                            MPU_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV_MASK);
    160160                        if (multiplier && divisor && divisor2) {
    161161                                /** See AMDM37x TRM p. 300 for the formula */
    162162                                const unsigned freq =
    163                                     ((base_freq * multiplier) / (divisor + 1))
    164                                     / divisor2;
     163                                    ((base_freq * multiplier) / (divisor + 1)) /
     164                                    divisor2;
    165165                                ddf_msg(LVL_NOTE, "MPU running at %d.%d MHz",
    166166                                    freq / 1000, freq % 1000);
     
    174174                        const unsigned divisor =
    175175                            MPU_CM_CLKSEL1_PLL_MPU_CLK_SRC_VAL(
    176                                 pio_read_32(&mpu->clksel1_pll));
     176                            pio_read_32(&mpu->clksel1_pll));
    177177                        ddf_msg(LVL_NOTE, "MPU DPLL in bypass mode, running at"
    178178                            " CORE CLK / %d MHz", divisor);
     
    226226                            freq / 1000, freq % 1000);
    227227                        const unsigned l3_div =
    228                             pio_read_32(&device->cm.core->clksel)
    229                             & CORE_CM_CLKSEL_CLKSEL_L3_MASK;
     228                            pio_read_32(&device->cm.core->clksel) &
     229                            CORE_CM_CLKSEL_CLKSEL_L3_MASK;
    230230                        if (l3_div == CORE_CM_CLKSEL_CLKSEL_L3_DIVIDED1 ||
    231231                            l3_div == CORE_CM_CLKSEL_CLKSEL_L3_DIVIDED2) {
     
    234234                                    (freq / l3_div) % 1000);
    235235                        } else {
    236                                 ddf_msg(LVL_WARN,"L3 interface clock divisor is"
     236                                ddf_msg(LVL_WARN, "L3 interface clock divisor is"
    237237                                    " invalid: %d", l3_div);
    238238                        }
     
    244244        } else {
    245245                ddf_msg(LVL_WARN, "CORE CLK in bypass mode, fruunig at SYS_CLK"
    246                    " frreq of %d.%d MHz", base_freq / 1000, base_freq % 1000);
     246                    " frreq of %d.%d MHz", base_freq / 1000, base_freq % 1000);
    247247        }
    248248
     
    268268         */
    269269        // TODO setup DPLL5
    270         if ((pio_read_32(&device->cm.clocks->clken2_pll)
    271                 & CLOCK_CONTROL_CM_CLKEN2_PLL_EN_PERIPH2_DPLL_MASK)
    272             != CLOCK_CONTROL_CM_CLKEN2_PLL_EN_PERIPH2_DPLL_LOCK) {
     270        if ((pio_read_32(&device->cm.clocks->clken2_pll) &
     271            CLOCK_CONTROL_CM_CLKEN2_PLL_EN_PERIPH2_DPLL_MASK) !=
     272            CLOCK_CONTROL_CM_CLKEN2_PLL_EN_PERIPH2_DPLL_LOCK) {
    273273                /* Compute divisors and multiplier
    274274                 * See AMDM37x TRM p. 300 for the formula */
     
    278278                const unsigned div = (base_freq / 1000) - 1;
    279279                const unsigned div2 = 1;
    280                 if ( ((base_freq % 1000) != 0) || (div > 127)) {
     280                if (((base_freq % 1000) != 0) || (div > 127)) {
    281281                        ddf_msg(LVL_ERROR, "Rounding error, or divisor to big "
    282282                            "freq: %d, div: %d", base_freq, div);
     
    333333#if 0
    334334                printf("DPLL5 (and everything else) should be on: %"
    335                     PRIx32" %"PRIx32".\n",
     335                    PRIx32 " %" PRIx32 ".\n",
    336336                    pio_read_32(&device->cm.clocks->idlest_ckgen),
    337337                    pio_read_32(&device->cm.clocks->idlest2_ckgen));
     
    369369        pio_set_32(&device->tll->sysconfig, TLL_SYSCONFIG_SOFTRESET_FLAG, 5);
    370370        ddf_msg(LVL_DEBUG2, "Waiting for USB TLL reset");
    371         while (!(pio_read_32(&device->tll->sysstatus) & TLL_SYSSTATUS_RESET_DONE_FLAG));
     371        while (!(pio_read_32(&device->tll->sysstatus) & TLL_SYSSTATUS_RESET_DONE_FLAG))
     372                ;
    372373        ddf_msg(LVL_DEBUG, "USB TLL Reset done.");
    373374
  • uspace/drv/platform/malta/malta.c

    r8ebe212 r18b6a88  
    239239        ret = pio_enable((void *) GT_BASE, GT_SIZE, (void **) &gt);
    240240        if (ret != EOK)
    241                 return ret;
     241                return ret;
    242242        val = uint32_t_le2host(pio_read_32(
    243243            &gt[GT_PCI_CMD / sizeof(ioport32_t)]));
  • uspace/drv/time/cmos-rtc/cmos-rtc.c

    r8ebe212 r18b6a88  
    362362
    363363                /* Now check if it is stable */
    364         } while(t->tm_sec != rtc_register_read(rtc, RTC_SEC) ||
     364        } while (t->tm_sec != rtc_register_read(rtc, RTC_SEC) ||
    365365            t->tm_min != rtc_register_read(rtc, RTC_MIN) ||
    366366            t->tm_mday != rtc_register_read(rtc, RTC_DAY) ||
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